JPS55131864A - Hysteresis information storage unit of logic unit - Google Patents

Hysteresis information storage unit of logic unit

Info

Publication number
JPS55131864A
JPS55131864A JP3915579A JP3915579A JPS55131864A JP S55131864 A JPS55131864 A JP S55131864A JP 3915579 A JP3915579 A JP 3915579A JP 3915579 A JP3915579 A JP 3915579A JP S55131864 A JPS55131864 A JP S55131864A
Authority
JP
Japan
Prior art keywords
unit
hysteresis information
hysteresis
circuit
detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3915579A
Other languages
Japanese (ja)
Inventor
Yozo Izumitani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3915579A priority Critical patent/JPS55131864A/en
Publication of JPS55131864A publication Critical patent/JPS55131864A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To make it possible to record hysteresis information effectively by inhibiting new write operation in an interval from when the memory capacity of a memory unit exceeds a fixed value until the next detection operation and while an error signal is supplied.
CONSTITUTION: When hysteresis information outputted from logic circuit 1 is stored in hysteresis storage unit 2, input register 10 detects 16 whether this hysteresis information is predetermined information. On the detection of circuit 16, storage control circuit 18 starts writing to memory unit 12 and inhibits new writing to unit 12 in an interval from when the memory capacity of unit 12 exceeds a fixed value until the next detection of circuit 16. Further, while an error signal is supplied from unit 1, new writing operation based upon the detection of circuit 16 is inhibited. Consequently, the hysteresis information can effectively be recorded without lowering the recording density as to the supply of the hysteresis information before the error occurrence of unit 1.
COPYRIGHT: (C)1980,JPO&Japio
JP3915579A 1979-03-30 1979-03-30 Hysteresis information storage unit of logic unit Pending JPS55131864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3915579A JPS55131864A (en) 1979-03-30 1979-03-30 Hysteresis information storage unit of logic unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3915579A JPS55131864A (en) 1979-03-30 1979-03-30 Hysteresis information storage unit of logic unit

Publications (1)

Publication Number Publication Date
JPS55131864A true JPS55131864A (en) 1980-10-14

Family

ID=12545211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3915579A Pending JPS55131864A (en) 1979-03-30 1979-03-30 Hysteresis information storage unit of logic unit

Country Status (1)

Country Link
JP (1) JPS55131864A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9771086B2 (en) 2012-01-25 2017-09-26 Kawasaki Jukogyo Kabushiki Kaisha Air-conditioning duct in passenger car and railcar

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9771086B2 (en) 2012-01-25 2017-09-26 Kawasaki Jukogyo Kabushiki Kaisha Air-conditioning duct in passenger car and railcar

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