JPS55114018A - Correctable delay unit - Google Patents

Correctable delay unit

Info

Publication number
JPS55114018A
JPS55114018A JP2104579A JP2104579A JPS55114018A JP S55114018 A JPS55114018 A JP S55114018A JP 2104579 A JP2104579 A JP 2104579A JP 2104579 A JP2104579 A JP 2104579A JP S55114018 A JPS55114018 A JP S55114018A
Authority
JP
Japan
Prior art keywords
gate
delay
output
supplied
delay value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2104579A
Other languages
Japanese (ja)
Other versions
JPS625367B2 (en
Inventor
Yoshichika Ichinomiya
Tsunetaka Sudo
Kenji Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Advantest Corp
Nippon Telegraph and Telephone Corp
Takeda Riken Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp, Nippon Telegraph and Telephone Corp, Takeda Riken Industries Co Ltd filed Critical Advantest Corp
Priority to JP2104579A priority Critical patent/JPS55114018A/en
Publication of JPS55114018A publication Critical patent/JPS55114018A/en
Publication of JPS625367B2 publication Critical patent/JPS625367B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/26—Time-delay networks
    • H03H11/265—Time-delay networks with adjustable delay

Landscapes

  • Pulse Circuits (AREA)

Abstract

PURPOSE:To make it possible to take an accurate measurement of a delay value in a short time and then to correct it to an accurate delay value by placing a delay circuit, which can vary the delay value by an external control signal, in an oscillation state by feeding its output back to its input side. CONSTITUTION:Delay part 11 consists of AND gates 17 and 18, OR gate 22, and delay circuit 23. The delay value of delay circuit 23 can be controlled by a control signal and circuit 27 is constituted which feeds its output back to its input side. Namely, the output of OR gate 22 is supplied to terminal 28 and further to monostable multivibrator 29, whose output is supplied to OR gate 31. When a start pulse is supplied to terminal 33 with switch 32 placed at the OR gate 31 side, the output of OR gate 31 passes through gate 17 or 18 and 22 to drive monostable multivibrator 29, whose output is inputted to delay part 11 by way of gate 31.
JP2104579A 1979-02-23 1979-02-23 Correctable delay unit Granted JPS55114018A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2104579A JPS55114018A (en) 1979-02-23 1979-02-23 Correctable delay unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2104579A JPS55114018A (en) 1979-02-23 1979-02-23 Correctable delay unit

Publications (2)

Publication Number Publication Date
JPS55114018A true JPS55114018A (en) 1980-09-03
JPS625367B2 JPS625367B2 (en) 1987-02-04

Family

ID=12043951

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2104579A Granted JPS55114018A (en) 1979-02-23 1979-02-23 Correctable delay unit

Country Status (1)

Country Link
JP (1) JPS55114018A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57159121A (en) * 1981-03-06 1982-10-01 Itt Utilization for digitla signal mosfet integrated delay circuit and color television reciever
JPS59181819A (en) * 1983-03-23 1984-10-16 テクトロニックス・インコーポレイテッド Programmable delay circuit
JPS61120517A (en) * 1984-11-09 1986-06-07 エルエスアイ　ロジツク　コーポレーシヨン Delay control circuit
JPS6280421U (en) * 1985-11-08 1987-05-22
US5055706A (en) * 1986-10-01 1991-10-08 Kabushiki Kaisha Toshiba Delay circuit that resets after pulse-like noise

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57159121A (en) * 1981-03-06 1982-10-01 Itt Utilization for digitla signal mosfet integrated delay circuit and color television reciever
JPS59181819A (en) * 1983-03-23 1984-10-16 テクトロニックス・インコーポレイテッド Programmable delay circuit
JPH0354898B2 (en) * 1983-03-23 1991-08-21
JPS61120517A (en) * 1984-11-09 1986-06-07 エルエスアイ　ロジツク　コーポレーシヨン Delay control circuit
JPS6280421U (en) * 1985-11-08 1987-05-22
US5055706A (en) * 1986-10-01 1991-10-08 Kabushiki Kaisha Toshiba Delay circuit that resets after pulse-like noise

Also Published As

Publication number Publication date
JPS625367B2 (en) 1987-02-04

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