JPS5495128A - Memory control system - Google Patents
Memory control systemInfo
- Publication number
- JPS5495128A JPS5495128A JP185278A JP185278A JPS5495128A JP S5495128 A JPS5495128 A JP S5495128A JP 185278 A JP185278 A JP 185278A JP 185278 A JP185278 A JP 185278A JP S5495128 A JPS5495128 A JP S5495128A
- Authority
- JP
- Japan
- Prior art keywords
- address
- update
- designation
- memory
- case
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To make it possible to facilitate control with obtaining an addressing identity by using an address, which is the final one before update in case that update was performed by designation, to read data of a memory part.
CONSTITUTION: In main memory unit MMV, plural data which have addresses of main memory part MM in address part ADR and are provided with sub-memory part SUBM are read out. In this case, when the same address in sub-memory address part SMAD of address part ADR is continuously designated, the output of address part SMAD is counted up successively from the same address; and when the address designation is changed from one address to another address, the update from one address to another address is executed. Then, an address which is the final one before update in case that update was performed by designation is used to read data of memory part SUMB. As a result, addressing identity is obtained, so that control can be facilitated.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP185278A JPS6029134B2 (en) | 1978-01-13 | 1978-01-13 | Storage device control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP185278A JPS6029134B2 (en) | 1978-01-13 | 1978-01-13 | Storage device control method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5495128A true JPS5495128A (en) | 1979-07-27 |
JPS6029134B2 JPS6029134B2 (en) | 1985-07-09 |
Family
ID=11513070
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP185278A Expired JPS6029134B2 (en) | 1978-01-13 | 1978-01-13 | Storage device control method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6029134B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5824954A (en) * | 1981-08-06 | 1983-02-15 | Fujitsu Ltd | Address controlling system |
JPS59223880A (en) * | 1983-06-03 | 1984-12-15 | Hitachi Ltd | Picture input device |
-
1978
- 1978-01-13 JP JP185278A patent/JPS6029134B2/en not_active Expired
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5824954A (en) * | 1981-08-06 | 1983-02-15 | Fujitsu Ltd | Address controlling system |
JPH0223892B2 (en) * | 1981-08-06 | 1990-05-25 | Fujitsu Ltd | |
JPS59223880A (en) * | 1983-06-03 | 1984-12-15 | Hitachi Ltd | Picture input device |
JPH059832B2 (en) * | 1983-06-03 | 1993-02-08 | Hitachi Seisakusho Kk |
Also Published As
Publication number | Publication date |
---|---|
JPS6029134B2 (en) | 1985-07-09 |
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