JPS5494886A - High dielectric strength field effect semiconductor device - Google Patents

High dielectric strength field effect semiconductor device

Info

Publication number
JPS5494886A
JPS5494886A JP210478A JP210478A JPS5494886A JP S5494886 A JPS5494886 A JP S5494886A JP 210478 A JP210478 A JP 210478A JP 210478 A JP210478 A JP 210478A JP S5494886 A JPS5494886 A JP S5494886A
Authority
JP
Japan
Prior art keywords
layer
dielectric strength
dose
spacing
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP210478A
Other languages
Japanese (ja)
Other versions
JPS62589B2 (en
Inventor
Toshiaki Yamano
Katsumasa Fujii
Tetsuo Biwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP210478A priority Critical patent/JPS5494886A/en
Publication of JPS5494886A publication Critical patent/JPS5494886A/en
Publication of JPS62589B2 publication Critical patent/JPS62589B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H01L27/0738—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with resistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To make P ion dose to pinch layer adequate and increase dielectric strength by opening a spacing between the end of the effective p channel under gate insulation film and n<-> pinch resistance layer. CONSTITUTION:An n<-> pinch resistance layer 2 is created by opening a hole in the oxide film 2 on a p type substrate 1 through a resist mask 4 and implanting P ions. Dose is set at 7x10<11> to 22x10<12>/cm<2>. The mask is removed and an oxide thick film 3 is created. After selective windowing, the surface is covered with resist 4 and is opened with windows, where an effective channel, i.e., p base layer 5, is formed through ion implantation. The spacing between the layers 5 and 2 is separated by (d). The mask 4 and oxide thin film 6 are removed, an n<+> type source 7 and a drain 8 are made and electrodes 9 thru 11 are attached. If the drift region from the drain up to the base is specified at 30 to 100mum, the spacing becomes d=2 to 15m, thus the layers 5, 2 may be independently determined of their concentrations without mutual offsetting. The dose of P ions is desirably 7x10<11> to 22x10<12>/cm<2>. This constitution makes depletion layer difficult to spread in the layer 5 direction and improves dielectric strength.
JP210478A 1978-01-11 1978-01-11 High dielectric strength field effect semiconductor device Granted JPS5494886A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP210478A JPS5494886A (en) 1978-01-11 1978-01-11 High dielectric strength field effect semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP210478A JPS5494886A (en) 1978-01-11 1978-01-11 High dielectric strength field effect semiconductor device

Publications (2)

Publication Number Publication Date
JPS5494886A true JPS5494886A (en) 1979-07-26
JPS62589B2 JPS62589B2 (en) 1987-01-08

Family

ID=11520028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP210478A Granted JPS5494886A (en) 1978-01-11 1978-01-11 High dielectric strength field effect semiconductor device

Country Status (1)

Country Link
JP (1) JPS5494886A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56110268A (en) * 1980-01-23 1981-09-01 Ibm Method of forming dmoz element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56110268A (en) * 1980-01-23 1981-09-01 Ibm Method of forming dmoz element

Also Published As

Publication number Publication date
JPS62589B2 (en) 1987-01-08

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