JPS5487160A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5487160A
JPS5487160A JP15525577A JP15525577A JPS5487160A JP S5487160 A JPS5487160 A JP S5487160A JP 15525577 A JP15525577 A JP 15525577A JP 15525577 A JP15525577 A JP 15525577A JP S5487160 A JPS5487160 A JP S5487160A
Authority
JP
Japan
Prior art keywords
current
trq3
circuit
trq4
inputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15525577A
Other languages
Japanese (ja)
Inventor
Hiroshi Morito
Kenji Yamashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15525577A priority Critical patent/JPS5487160A/en
Publication of JPS5487160A publication Critical patent/JPS5487160A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To establish the logic circuit in which no leakage current is present when the output logical value is 0 and it is not subject to the effect of load impedance, by operating one of two transistors coupled each other as current mirror. CONSTITUTION:The AND circuit is condituted with a plurality, e.g., two NPN transistors TRQ1 and Q2 and two PNP transistors TRQ3 and Q4 different in the polarity and connecting the power supply V(positive potential) to the emitters. In this case, only when two inputs I1 and I2 are logically 1, current flows to TRQ3, and the current nearly equal to the current of TRQ3 flows to TRQ4 with the current mirror of TRQ4. Accordingly, even if the load impedance is changed, the current flowing to it is constant. Further, among the inputs, if either one had not logical 1, the output logic is 0 and no leakage current through the load Z is caused. Further, by connecting the collector and emitter of TRQ1 and Q2 parallelly, the OR circuit can be obtained.
JP15525577A 1977-12-23 1977-12-23 Logic circuit Pending JPS5487160A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15525577A JPS5487160A (en) 1977-12-23 1977-12-23 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15525577A JPS5487160A (en) 1977-12-23 1977-12-23 Logic circuit

Publications (1)

Publication Number Publication Date
JPS5487160A true JPS5487160A (en) 1979-07-11

Family

ID=15601914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15525577A Pending JPS5487160A (en) 1977-12-23 1977-12-23 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5487160A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883838U (en) * 1981-11-30 1983-06-07 日本電気ホームエレクトロニクス株式会社 gate control circuit
JPS6231219A (en) * 1985-08-02 1987-02-10 Nec Corp Logic circuit
JPH0372715A (en) * 1989-05-26 1991-03-27 Nec Corp Current mirror type level convertor circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883838U (en) * 1981-11-30 1983-06-07 日本電気ホームエレクトロニクス株式会社 gate control circuit
JPS6231219A (en) * 1985-08-02 1987-02-10 Nec Corp Logic circuit
JPH0372715A (en) * 1989-05-26 1991-03-27 Nec Corp Current mirror type level convertor circuit

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