JPS5467780A - High integration ic - Google Patents

High integration ic

Info

Publication number
JPS5467780A
JPS5467780A JP13435977A JP13435977A JPS5467780A JP S5467780 A JPS5467780 A JP S5467780A JP 13435977 A JP13435977 A JP 13435977A JP 13435977 A JP13435977 A JP 13435977A JP S5467780 A JPS5467780 A JP S5467780A
Authority
JP
Japan
Prior art keywords
regions
high concentration
concentration regions
group iii
channel transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13435977A
Other languages
Japanese (ja)
Inventor
Nobuo Shimoma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP13435977A priority Critical patent/JPS5467780A/en
Publication of JPS5467780A publication Critical patent/JPS5467780A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To remove the intricacy of production processes and make possible high integration IC production without causing mask deviation of high concentration regions and conductive members by performing the diffusion process of the group III impurity high concentration regions and the process of the conductive members at one time. CONSTITUTION:After group III impurity low concentration regions 3 are selectively diffused in a silicon substrate 6, group V impurity high concentration regions 5 are selectively diffused by an ion implantation or thermal diffusion process, forming the source and drain regions of n n channel transistors and the channel cut regions of P channel transistors, Next, impurity high concentration regions 8 through diffusion of aluminum being a group III element are formed and at the same time electrical wiring of aluminum 7 is performed. The regions 8 becomes the source and drain regions of the P channel transistors.
JP13435977A 1977-11-09 1977-11-09 High integration ic Pending JPS5467780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13435977A JPS5467780A (en) 1977-11-09 1977-11-09 High integration ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13435977A JPS5467780A (en) 1977-11-09 1977-11-09 High integration ic

Publications (1)

Publication Number Publication Date
JPS5467780A true JPS5467780A (en) 1979-05-31

Family

ID=15126517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13435977A Pending JPS5467780A (en) 1977-11-09 1977-11-09 High integration ic

Country Status (1)

Country Link
JP (1) JPS5467780A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61140164A (en) * 1984-12-12 1986-06-27 Fuji Electric Co Ltd Manufacture of semiconductor ic
WO2006095383A1 (en) * 2005-03-04 2006-09-14 Fujitsu Limited Semiconductor device having p-channel impurity region and method for manufacturing same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61140164A (en) * 1984-12-12 1986-06-27 Fuji Electric Co Ltd Manufacture of semiconductor ic
JPH0369184B2 (en) * 1984-12-12 1991-10-31 Fuji Electric Co Ltd
WO2006095383A1 (en) * 2005-03-04 2006-09-14 Fujitsu Limited Semiconductor device having p-channel impurity region and method for manufacturing same

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