JPS54142556A - Reversible converter - Google Patents

Reversible converter

Info

Publication number
JPS54142556A
JPS54142556A JP4933178A JP4933178A JPS54142556A JP S54142556 A JPS54142556 A JP S54142556A JP 4933178 A JP4933178 A JP 4933178A JP 4933178 A JP4933178 A JP 4933178A JP S54142556 A JPS54142556 A JP S54142556A
Authority
JP
Japan
Prior art keywords
output
detector
thyristor
level
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4933178A
Other languages
Japanese (ja)
Inventor
Nagataka Seki
Hiroo Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4933178A priority Critical patent/JPS54142556A/en
Publication of JPS54142556A publication Critical patent/JPS54142556A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Electrical Variables (AREA)
  • Ac-Ac Conversion (AREA)

Abstract

PURPOSE: To operate a positive-negative change exactly by providing a voltage detector and an output current detector to each arm of the thyristor and by making the detectors operate a positive-negative change.
CONSTITUTION: A signal of over certain level of the output of voltage detector VD is converted into a square wave by the level detector 15, its continuous time is compared with a set time given by the level reference 16. Its output and an output of the pulse shaping circuit 11 are fed to the OR sircuit 18, the output of which changes the positive gate 13 and negative gate circuits 14. Opposite voltage of the thyristor is monitored after the current wave form of load L becomes zero, when the opposite voltage is detected, the level detector 15 operates. When the opposite voltage is applied to the thyristor for more than the time T set by the level reference 16, the output of comparator 17 is inverted to "1", and the output of OR circuit 18 to "0". By this, the operation is changed to the negative side one.
COPYRIGHT: (C)1979,JPO&Japio
JP4933178A 1978-04-27 1978-04-27 Reversible converter Pending JPS54142556A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4933178A JPS54142556A (en) 1978-04-27 1978-04-27 Reversible converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4933178A JPS54142556A (en) 1978-04-27 1978-04-27 Reversible converter

Publications (1)

Publication Number Publication Date
JPS54142556A true JPS54142556A (en) 1979-11-06

Family

ID=12827995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4933178A Pending JPS54142556A (en) 1978-04-27 1978-04-27 Reversible converter

Country Status (1)

Country Link
JP (1) JPS54142556A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5115387A (en) * 1990-08-14 1992-05-19 Polyspede Electronics Corporation Circuitry and method of protecting thyristors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5115387A (en) * 1990-08-14 1992-05-19 Polyspede Electronics Corporation Circuitry and method of protecting thyristors

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