JPS54138326A

JPS54138326A - Recording and reproducing system for television picture

Info

Publication number: JPS54138326A
Application number: JP4586178A
Authority: JP
Inventors: Seishi Kageyama; Masaru Konno; Susumu Yamaguchi
Original assignee: Toshiba Corp; Tokyo Shibaura Electric Co Ltd
Current assignee: Toshiba Corp
Priority date: 1978-04-20
Filing date: 1978-04-20
Publication date: 1979-10-26

Abstract

PURPOSE: To enable to reduce the inconvenience at the override of write-in and readout memories to the degree of once at several hours, by comparing the output of the readout address circuit and the write-in circuit at the detection circuit for detection.

CONSTITUTION: According to the write-in address of the address circuit 42, the signal shrinked at the shrinking circuit 5 with the changeover of an odd number field and an even number field, is memorized in the main memory 7. Further, in the write-in state S,T shrinked, the override phenomenon of the write-in operation S by the readout operation U, for example, a₁ at an odd number field, is detected at the override detection circuit 43, the address a₁ is transferred to the even number field a₂, the shrinked signal of the even number field before one field is reproduced, and the output of the readout address circuit 44 and that of the write-in address circuit 42 are compared at the detection circuit 43 and detected. Thus, the inconvenience at write-in, readout memory override can be reduced to about once at several hours.