JPS54138319A - Frequency conversion circuit - Google Patents

Frequency conversion circuit

Info

Publication number
JPS54138319A
JPS54138319A JP4585778A JP4585778A JPS54138319A JP S54138319 A JPS54138319 A JP S54138319A JP 4585778 A JP4585778 A JP 4585778A JP 4585778 A JP4585778 A JP 4585778A JP S54138319 A JPS54138319 A JP S54138319A
Authority
JP
Japan
Prior art keywords
collector
bias current
commonly
base
conversion circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4585778A
Other languages
Japanese (ja)
Inventor
Shoichi Shimizu
Kenichi Torii
Shigeo Fujimori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4585778A priority Critical patent/JPS54138319A/en
Publication of JPS54138319A publication Critical patent/JPS54138319A/en
Pending legal-status Critical Current

Links

Landscapes

  • Superheterodyne Receivers (AREA)

Abstract

PURPOSE: To suppress the increase in the chip temperature by reducing the bias current, through the cascade connection of the mixing circuit and the local oscillation circuit between the power supply terminal and ground and through the bias current flowing to them commonly.
CONSTITUTION: The emitter of the transistors Tr 13, 16 is commonly connected and is connected to the constant current, and the collector is connected to the common emitter of Tr11, 12 and that of Tr 14, 15. The input signal is fed to the base of Tr11, 12 and Tr14, 15 by feeding back from the collector of Tr13 to the base of Tr16 and from the collector of Tr16 to Tr13, to pick up output from the collector. Thus, the bias current commonly flows to reduce the bias current resulting in suppressing the temperature rise of the chip temperature.
COPYRIGHT: (C)1979,JPO&Japio
JP4585778A 1978-04-20 1978-04-20 Frequency conversion circuit Pending JPS54138319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4585778A JPS54138319A (en) 1978-04-20 1978-04-20 Frequency conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4585778A JPS54138319A (en) 1978-04-20 1978-04-20 Frequency conversion circuit

Publications (1)

Publication Number Publication Date
JPS54138319A true JPS54138319A (en) 1979-10-26

Family

ID=12730869

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4585778A Pending JPS54138319A (en) 1978-04-20 1978-04-20 Frequency conversion circuit

Country Status (1)

Country Link
JP (1) JPS54138319A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59134906A (en) * 1983-01-23 1984-08-02 Rohm Co Ltd Frequency converting circuit
US5715532A (en) * 1995-01-24 1998-02-03 Matsushita Electric Industrial, Co. Frequency converter apparatus with distortion compensating circuit
JP2015082720A (en) * 2013-10-22 2015-04-27 株式会社デンソー Oscillator and signal processing circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59134906A (en) * 1983-01-23 1984-08-02 Rohm Co Ltd Frequency converting circuit
US5715532A (en) * 1995-01-24 1998-02-03 Matsushita Electric Industrial, Co. Frequency converter apparatus with distortion compensating circuit
JP2015082720A (en) * 2013-10-22 2015-04-27 株式会社デンソー Oscillator and signal processing circuit

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