JPS54138318A - Error correction system - Google Patents

Abstract

PURPOSE:To reduce the deterioration in quality of signal in total, by adding the error correction code only to the upper rank bit having greater priority of coded digital signal, and increasing the transmission or recording and reproduction efficiency through the decreased bit length of the correction code. CONSTITUTION:In transmitting or recording and reproduction of analog signal through digital coding, the analog input signal is fed to the sample hold circuit 11 and sampled in a given period, then it is fed to the Ac converter 15 and converted into digital signal. Further, the converted signal is fed to the error detection code additional circuit 13 to add the error detection code only to the bit having higher priority, and the output of the circuit 12 is fed to the modulator 14 to convert it into the signal at the specified band and it is delivered to the receiver 2. Further, the synchronizing signal is picked up from the signal demodulated through the demodulator 21 of the receiver 2 at the synchronizing signal pick up circuit 22, the error of the bit adding the error code is detected by controlling the error detection circuit 23 with the synchronizing signal to correct the coded signal detecting error by using the signal not detecting the error before and after it.