JPS54128640A - Control system for cash memory - Google Patents

Control system for cash memory

Info

Publication number
JPS54128640A
JPS54128640A JP3609678A JP3609678A JPS54128640A JP S54128640 A JPS54128640 A JP S54128640A JP 3609678 A JP3609678 A JP 3609678A JP 3609678 A JP3609678 A JP 3609678A JP S54128640 A JPS54128640 A JP S54128640A
Authority
JP
Japan
Prior art keywords
memory
data
register
cash
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3609678A
Other languages
Japanese (ja)
Inventor
Takashi Rokutanda
Yoshiyuki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3609678A priority Critical patent/JPS54128640A/en
Publication of JPS54128640A publication Critical patent/JPS54128640A/en
Pending legal-status Critical Current

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  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To perform efficient control, by changing the handling of cash memory through the matching of the cash memory for memory cycle and through the nature of the memory access request from CPU. CONSTITUTION:In the data processing unit having the cash memory 105, the address register 101 performing address entry from the CPU 1 performing operation control, address register 102 entrying the address from the high speed bus, and data registers 103 and 104 entrying the data from the CPU 1 and high speed bus, are provided. Further, whether the data from the register 103 is stored to the cash memory 105 or the data of the register 104 is stored in the memory 105 is determined, and the multiplexer 106 determining the size of data and the multiplexer 107 determining the zone control of the output from the memory 105 are provided, and when data is entried in the register 103, the signal finishing the memory cycle is delivered.
JP3609678A 1978-03-30 1978-03-30 Control system for cash memory Pending JPS54128640A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3609678A JPS54128640A (en) 1978-03-30 1978-03-30 Control system for cash memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3609678A JPS54128640A (en) 1978-03-30 1978-03-30 Control system for cash memory

Publications (1)

Publication Number Publication Date
JPS54128640A true JPS54128640A (en) 1979-10-05

Family

ID=12460224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3609678A Pending JPS54128640A (en) 1978-03-30 1978-03-30 Control system for cash memory

Country Status (1)

Country Link
JP (1) JPS54128640A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159554A (en) * 1984-08-31 1986-03-27 Hitachi Ltd Cache memory control circuit
JP2002165693A (en) * 2000-11-30 2002-06-11 S T Chem Co Ltd Deodorization and dehumidification tool

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6159554A (en) * 1984-08-31 1986-03-27 Hitachi Ltd Cache memory control circuit
JP2002165693A (en) * 2000-11-30 2002-06-11 S T Chem Co Ltd Deodorization and dehumidification tool

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