JPS54113269A - Production of junction-type electronic field effect transistor - Google Patents

Production of junction-type electronic field effect transistor

Info

Publication number
JPS54113269A
JPS54113269A JP1983478A JP1983478A JPS54113269A JP S54113269 A JPS54113269 A JP S54113269A JP 1983478 A JP1983478 A JP 1983478A JP 1983478 A JP1983478 A JP 1983478A JP S54113269 A JPS54113269 A JP S54113269A
Authority
JP
Japan
Prior art keywords
region
type
regions
diffusion
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983478A
Other languages
Japanese (ja)
Inventor
Hideki Yasuoka
Motofumi Masaki
Akira Muramatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1983478A priority Critical patent/JPS54113269A/en
Publication of JPS54113269A publication Critical patent/JPS54113269A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To facilitate the control of the pinch off voltage of a J-FET and the saturation drain current at a gate-source short-circuit time, by giving a common property to production processes for the J-FET and a bipolar transistor to produce a semiconductor device.
CONSTITUTION: N+-type buried regions 2A and 2B are formed on P-type Si substrate 1 by diffusion, and P+-type region 3 is formed in region 2B. Next, N-type layer 4 is grown epitaxially throughout the surface, and shallow P+-type regions 5A, 5B and 6 are formed on the surface layer part by diffusion. After that, regions 5A and 5B are caused to reach substrate 1 by heat treatment for a long time, and separation regions 7A and 7B are formed, and simultaneously, the thickness of regions 2A and 2B is increased. Then, regions 3 and 4 are connected to generate region 8. Next, N-type region 9 for channel forming is formed in region 8 by diffusion, and P-type gate region 10 is formed in region 9. Then, base region 12 and emitter region 15 of a bipolar transistor are formed in layer 4 on region 2A.
COPYRIGHT: (C)1979,JPO&Japio
JP1983478A 1978-02-24 1978-02-24 Production of junction-type electronic field effect transistor Pending JPS54113269A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983478A JPS54113269A (en) 1978-02-24 1978-02-24 Production of junction-type electronic field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983478A JPS54113269A (en) 1978-02-24 1978-02-24 Production of junction-type electronic field effect transistor

Publications (1)

Publication Number Publication Date
JPS54113269A true JPS54113269A (en) 1979-09-04

Family

ID=12010301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983478A Pending JPS54113269A (en) 1978-02-24 1978-02-24 Production of junction-type electronic field effect transistor

Country Status (1)

Country Link
JP (1) JPS54113269A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939099A (en) * 1988-06-21 1990-07-03 Texas Instruments Incorporated Process for fabricating isolated vertical bipolar and JFET transistors
US5151765A (en) * 1988-05-20 1992-09-29 Fujitsu Limited Semiconductor device comprising high-speed and high-current transistors formed in a common substrate and having matched characteristics

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS494594A (en) * 1972-04-22 1974-01-16
JPS5265689A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Semiconductor integrated circuit and its production
JPS5268383A (en) * 1975-12-05 1977-06-07 Nec Corp Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS494594A (en) * 1972-04-22 1974-01-16
JPS5265689A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Semiconductor integrated circuit and its production
JPS5268383A (en) * 1975-12-05 1977-06-07 Nec Corp Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5151765A (en) * 1988-05-20 1992-09-29 Fujitsu Limited Semiconductor device comprising high-speed and high-current transistors formed in a common substrate and having matched characteristics
US4939099A (en) * 1988-06-21 1990-07-03 Texas Instruments Incorporated Process for fabricating isolated vertical bipolar and JFET transistors

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