JPS5346279A - Production of semiconductor device - Google Patents
Production of semiconductor deviceInfo
- Publication number
- JPS5346279A JPS5346279A JP12154676A JP12154676A JPS5346279A JP S5346279 A JPS5346279 A JP S5346279A JP 12154676 A JP12154676 A JP 12154676A JP 12154676 A JP12154676 A JP 12154676A JP S5346279 A JPS5346279 A JP S5346279A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- production
- semiconductor elements
- facilitate
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Abstract
PURPOSE: To facilitate position alignment of the electrodes of semiconductor elements and the holes of a heat resistant insulating substrate and facilitate the assembling of a minute semiconductor device such as IC by beforehand providing locating recesses in a bonding layer for bonding and fixing of the semiconductor elements.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12154676A JPS5346279A (en) | 1976-10-08 | 1976-10-08 | Production of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12154676A JPS5346279A (en) | 1976-10-08 | 1976-10-08 | Production of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5346279A true JPS5346279A (en) | 1978-04-25 |
JPS5712537B2 JPS5712537B2 (en) | 1982-03-11 |
Family
ID=14813913
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12154676A Granted JPS5346279A (en) | 1976-10-08 | 1976-10-08 | Production of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5346279A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54144967A (en) * | 1978-05-04 | 1979-11-12 | Matsushita Electric Ind Co Ltd | Electronic circuit apparatus |
-
1976
- 1976-10-08 JP JP12154676A patent/JPS5346279A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54144967A (en) * | 1978-05-04 | 1979-11-12 | Matsushita Electric Ind Co Ltd | Electronic circuit apparatus |
Also Published As
Publication number | Publication date |
---|---|
JPS5712537B2 (en) | 1982-03-11 |
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