JPS5315054A - Logic circuit - Google Patents
Logic circuitInfo
- Publication number
- JPS5315054A JPS5315054A JP8946276A JP8946276A JPS5315054A JP S5315054 A JPS5315054 A JP S5315054A JP 8946276 A JP8946276 A JP 8946276A JP 8946276 A JP8946276 A JP 8946276A JP S5315054 A JPS5315054 A JP S5315054A
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- potential
- fets
- integration
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
Landscapes
- Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
Abstract
PURPOSE:To make possible the generation of potential of an intermediate level with low power consumption and facilitate the integration of circuits without using IG-FETs of a back gate bias state in a logic circuit which outputs more than three potential levels.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8946276A JPS5315054A (en) | 1976-07-27 | 1976-07-27 | Logic circuit |
US05/818,295 US4158786A (en) | 1976-07-27 | 1977-07-22 | Display device driving voltage providing circuit |
DE2733963A DE2733963C3 (en) | 1976-07-27 | 1977-07-27 | Circuit arrangement for generating intermediate potentials for dynamic control of a display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8946276A JPS5315054A (en) | 1976-07-27 | 1976-07-27 | Logic circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5315054A true JPS5315054A (en) | 1978-02-10 |
JPS5649497B2 JPS5649497B2 (en) | 1981-11-21 |
Family
ID=13971362
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8946276A Granted JPS5315054A (en) | 1976-07-27 | 1976-07-27 | Logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5315054A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4852461A (en) * | 1971-10-28 | 1973-07-23 |
-
1976
- 1976-07-27 JP JP8946276A patent/JPS5315054A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4852461A (en) * | 1971-10-28 | 1973-07-23 |
Also Published As
Publication number | Publication date |
---|---|
JPS5649497B2 (en) | 1981-11-21 |
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