JPS5264275A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5264275A
JPS5264275A JP50140665A JP14066575A JPS5264275A JP S5264275 A JPS5264275 A JP S5264275A JP 50140665 A JP50140665 A JP 50140665A JP 14066575 A JP14066575 A JP 14066575A JP S5264275 A JPS5264275 A JP S5264275A
Authority
JP
Japan
Prior art keywords
semiconductor device
costs
reliability
improved
reduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50140665A
Other languages
Japanese (ja)
Inventor
Tatsuo Hiraga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP50140665A priority Critical patent/JPS5264275A/en
Publication of JPS5264275A publication Critical patent/JPS5264275A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: Reliability is improved and costs are reduced by using conductive paste in bonding chips to wiring patterns.
COPYRIGHT: (C)1977,JPO&Japio
JP50140665A 1975-11-21 1975-11-21 Semiconductor device Pending JPS5264275A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50140665A JPS5264275A (en) 1975-11-21 1975-11-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50140665A JPS5264275A (en) 1975-11-21 1975-11-21 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5264275A true JPS5264275A (en) 1977-05-27

Family

ID=15273905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50140665A Pending JPS5264275A (en) 1975-11-21 1975-11-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5264275A (en)

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