JPH1161419A - Production of dielectric thin coating film and device therefor - Google Patents

Production of dielectric thin coating film and device therefor

Info

Publication number
JPH1161419A
JPH1161419A JP9246192A JP24619297A JPH1161419A JP H1161419 A JPH1161419 A JP H1161419A JP 9246192 A JP9246192 A JP 9246192A JP 24619297 A JP24619297 A JP 24619297A JP H1161419 A JPH1161419 A JP H1161419A
Authority
JP
Japan
Prior art keywords
thin film
electrode
dielectric thin
substrate
reaction vessel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9246192A
Other languages
Japanese (ja)
Inventor
Koumin Ri
効 民 李
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP9246192A priority Critical patent/JPH1161419A/en
Publication of JPH1161419A publication Critical patent/JPH1161419A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a dielectric thin coating film capable of reducing damage to be given to a substrate or the like at the time of forming the dielectric thin coating film, capable of forming the dielectric thin coating of a high quality and furthermore easy to realize it by an ordinary plasma CVD device and to provide a producing device therefor. SOLUTION: A substrate S is placed on a lower electrode 14, is heated by a heater 16 while the inside of a reaction vessel 12 is held to a prescribed evacuated state and is held to a prescribed temp. A gaseous starting material obtd. by evaporation by an evaporator is mixed with gaseous O2 and is thereafter fed to a substrate S. Parallelly, a grid electrode 20 is applied with a prescribed potential, and an upper electrode 18 is applied with a high-frequency voltage, by which plasma is generated on a space between the upper electrode 18 and the grid electrode 20. Thus, the gaseous starting material is decomposed and brought to react with to accumulate the reaction product on the substrate S, by which the dielectric thin coating film can be formed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は誘電体薄膜の製造方
法およびその製造装置に関し、特にプラズマCVD法を
用いた誘電体薄膜の低温製造法であり、たとえばマイク
ロ波モノリシックIC(以下、MMICという)等に使
用される誘電体薄膜の製造方法およびその製造装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a dielectric thin film and an apparatus therefor, and more particularly to a method of manufacturing a dielectric thin film at a low temperature using a plasma CVD method, for example, a microwave monolithic IC (hereinafter referred to as MMIC). The present invention relates to a method of manufacturing a dielectric thin film used for the same and the like and an apparatus for manufacturing the same.

【0002】[0002]

【従来の技術】誘電体薄膜を形成する方法は、従来、様
々な提案がなされており、たとえば、特公昭59−37
566号公報、特公昭60−12773号公報、特公昭
61−13995号公報、特公平7−25545号公報
などに開示された方法が知られている。なかには、CV
D法によって酸化チタン薄膜の形成が可能であるという
報告があるが、成膜時の基板温度が一般的に高いという
不都合があった。たとえば、Appl.Phys.Lett.64(11),14
March 1994 に公表されたKim らの論文によれば、誘電
体薄膜としての酸化チタン薄膜をCVD法で形成する場
合、基板温度として500℃以上が必要とされている。
しかしながら、このような高い温度での成膜は、デバイ
スを形成する際に用いる下地基板および基板に形成され
た他の素子に及ぼす悪影響が大きいという問題がある。
たとえば、MMIC用コンデンサを形成する温度が高く
なると、GaAsなどの下地基板やトランジスタの特性
に悪影響を与え、極端な場合、MMICとして機能しな
くなるおそれがあった。そこで、基板温度を下げる目的
でCVD法による成膜の際に成膜室内にプラズマを発生
させて成膜する方法(以下、プラズマCVD法という)
がしばしば用いられている。
2. Description of the Related Art Various methods for forming a dielectric thin film have hitherto been proposed, for example, Japanese Patent Publication No. 59-37.
There are known methods disclosed in Japanese Patent Publication No. 566, Japanese Patent Publication No. Sho 60-12773, Japanese Patent Publication No. 61-13959, Japanese Patent Publication No. Hei 7-25545, and the like. Among them, CV
Although there is a report that a titanium oxide thin film can be formed by the method D, there is a disadvantage that the substrate temperature during film formation is generally high. For example, Appl.Phys.Lett.64 (11), 14
According to a paper by Kim et al. Published in March 1994, when a titanium oxide thin film is formed as a dielectric thin film by a CVD method, a substrate temperature of 500 ° C. or higher is required.
However, there is a problem that film formation at such a high temperature has a large adverse effect on an underlying substrate used for forming a device and other elements formed on the substrate.
For example, when the temperature for forming the MMIC capacitor is increased, the characteristics of the underlying substrate such as GaAs and the transistor are adversely affected, and in extreme cases, the MMIC may not function. Therefore, a method of generating a plasma in a film forming chamber when forming a film by the CVD method for the purpose of lowering the substrate temperature (hereinafter, referred to as a plasma CVD method).
Is often used.

【0003】[0003]

【発明が解決しようとする課題】従来の高周波(13.
56MHz)電源を用いた平行平板型プラズマCVD法
では、上部電極(高周波電源導入電極)と下部電極(ア
ース電極)との間のグロー放電領域中に混合ガスを導入
し、これを活性化して反応させ、下部電極に設置された
基板上に成膜する方法をとるのが一般的である。この
際、ガスを十分に分解させるためにプラズマのパワー密
度をある程度高くしなければならない。しかし、この場
合、膜の成長する基板表面がプラズマ発生領域の近傍に
あるため、プラズマ放電により発生する高速(高エネル
ギ)粒子の衝撃を受けることがしばしばある。基板表面
への粒子の入射はプラズマCVD成膜法においては不可
欠であるが、過剰なエネルギを持つ粒子の衝撃により膜
がダメージを受けたり、異常成長したりすることによっ
て、特性を低下させると問題となる。そこで、この問題
を解決するために、基板付近のセルフバイアスを制御す
るなどの手法によって粒子衝撃の程度を適度に軽減する
方法が報告されている。たとえば、J.Appl.Phys.,43,49
65(1972)に公表されたJ.W.Coburnらの論文には、基板の
置かれた下部電極を接地せずに直流電位を印加し、基板
へ入射してくるイオンやラジカルを制御する方法が提案
されている。また、A.Matsuda らは平行平板電極間にメ
ッシュ電極を挿入した3電極型構造を提案している(Th
in solid Films,92,171(1982))。図4は、従来の3電極
式プラズマCVD装置の原理的構成を示す図解図であ
る。この装置1は、図示しない反応容器中に対向して配
設された下部電極2と上部電極3とを含む。下部電極2
には、直流バイアスを印加するための外部電源4が接続
される。そして、下部電極2上には誘電体薄膜の形成さ
れる基板Sが載置される。一方、上部電極3には、高周
波電源5が接続される。また、下部電極2と上部電極3
との間にはメッシュ電極6が配設される。このメッシュ
電極6を接地電位とし、メッシュ電極6と下部電極2と
の間に直流バイアスが印加される。しかしながら、上記
のいずれの方法も、下部電極を電気的に浮遊させておく
必要がある。ところが、従来から用いられている通常の
プラズマCVD装置の構造は、下部電極が反応容器の本
体に接続されて電気的に接地されているものが一般的で
ある。そのため、上記のいずれの方法も、通常のプラズ
マCVD装置を流用しての実施が容易でなかった。
The conventional high frequency (13.
In a parallel plate type plasma CVD method using a power supply (56 MHz), a mixed gas is introduced into a glow discharge region between an upper electrode (high-frequency power supply introduction electrode) and a lower electrode (earth electrode), and activated to react. In general, a method of forming a film on a substrate provided on a lower electrode is adopted. At this time, the power density of the plasma must be increased to some extent in order to sufficiently decompose the gas. However, in this case, since the substrate surface on which the film is grown is near the plasma generation region, the substrate is often impacted by high-speed (high-energy) particles generated by plasma discharge. Although the incidence of particles on the substrate surface is indispensable in the plasma CVD method, it is problematic if the properties are degraded due to damage or abnormal growth of the film due to impact of particles having excessive energy. Becomes In order to solve this problem, there has been reported a method of appropriately reducing the degree of particle impact by a method such as controlling self-bias near the substrate. For example, J. Appl. Phys., 43, 49
A paper by JW Coburn et al. Published in 65 (1972) proposes a method of controlling ions and radicals entering the substrate by applying a DC potential without grounding the lower electrode on which the substrate is placed. I have. A. Matsuda et al. Have proposed a three-electrode structure in which mesh electrodes are inserted between parallel plate electrodes (Th.
in solid Films, 92,171 (1982)). FIG. 4 is an illustrative view showing a basic configuration of a conventional three-electrode plasma CVD apparatus. This apparatus 1 includes a lower electrode 2 and an upper electrode 3 which are disposed opposite to each other in a reaction vessel (not shown). Lower electrode 2
Is connected to an external power supply 4 for applying a DC bias. Then, a substrate S on which a dielectric thin film is formed is placed on the lower electrode 2. On the other hand, a high frequency power supply 5 is connected to the upper electrode 3. Further, the lower electrode 2 and the upper electrode 3
And a mesh electrode 6 is disposed between them. The mesh electrode 6 is set to the ground potential, and a DC bias is applied between the mesh electrode 6 and the lower electrode 2. However, in any of the above methods, the lower electrode needs to be electrically floated. However, the structure of a conventional plasma CVD apparatus conventionally used generally has a lower electrode connected to the main body of the reaction vessel and electrically grounded. Therefore, it is not easy to carry out any of the above-mentioned methods using a normal plasma CVD apparatus.

【0004】それゆえに、本発明の主たる目的は、誘電
体薄膜形成時に基板などが受けるダメージを軽減でき、
品質の良い誘電体薄膜を形成することができ、しかも通
常のプラズマCVD装置を流用しての実施が容易な、誘
電体薄膜の製造方法および製造装置を提供することであ
る。
Therefore, a main object of the present invention is to reduce damage to a substrate or the like when forming a dielectric thin film,
An object of the present invention is to provide a method and an apparatus for manufacturing a dielectric thin film, which can form a high-quality dielectric thin film and can be easily implemented by using a normal plasma CVD apparatus.

【0005】[0005]

【課題を解決するための手段】本発明にかかる誘電体薄
膜の製造方法は、反応容器、反応容器内に配設され接地
された下部電極、反応容器内において下部電極と対向し
て配設され高周波電源に接続された上部電極、および反
応容器内において下部電極と上部電極との間に配設され
外部電源に接続されたメッシュ電極を含む平行平板型プ
ラズマCVD装置を用いた誘電体薄膜の製造方法であっ
て、下部電極上に基板を載置し、上部電極とメッシュ電
極との間に放電して原料ガスのプラズマを発生させ、プ
ラズマをメッシュ電極を通過させて基板上へ飛翔させ
て、350℃以下の成膜温度において基板上に酸化チタ
ン薄膜を誘電体薄膜として形成する、誘電体薄膜の製造
方法である。本発明にかかる製造方法では、上部電極と
メッシュ電極との間にプラズマを発生させると同時にメ
ッシュ電極の電位を簡便に制御できる。また、プラズマ
放電領域と薄膜成長領域とがメッシュ電極により空間的
に分離されているため、原料ガスの分解および反応のた
めにプラズマ発生密度を高くしても、メッシュ電極の電
位により薄膜成長表面への粒子衝撃を制御できる。した
がって、本発明の方法を用いれば、プラズマの効果を十
分に発揮できるので、従来のCVD法による場合と比較
して薄膜の形成温度を下げることができ、350℃以下
の温度で酸化チタン薄膜を成膜することができるため、
高誘電率でリークの少ない薄膜の低温形成が可能とな
る。そのため、デバイスを形成する場合に基板や基板上
の他の回路に対する影響も抑えることができる。さら
に、本発明にかかる誘電体薄膜の製造方法は、下部電極
を接地してメッシュ電極に外部電源を接続した構造の装
置を用いるので、一般的なプラズマCVD装置を流用し
て実施することが容易である。
According to the present invention, there is provided a method for producing a dielectric thin film, comprising: a reaction vessel, a lower electrode disposed in the reaction vessel and grounded, and disposed in the reaction vessel so as to face the lower electrode. Manufacture of a dielectric thin film using a parallel plate type plasma CVD apparatus including an upper electrode connected to a high frequency power supply and a mesh electrode disposed between the lower electrode and the upper electrode in the reaction vessel and connected to an external power supply A method, wherein a substrate is placed on a lower electrode, a discharge gas is generated between the upper electrode and the mesh electrode to generate a plasma of a raw material gas, and the plasma passes through the mesh electrode and flies onto the substrate, This is a method for manufacturing a dielectric thin film in which a titanium oxide thin film is formed as a dielectric thin film on a substrate at a film formation temperature of 350 ° C. or lower. In the manufacturing method according to the present invention, plasma can be generated between the upper electrode and the mesh electrode, and at the same time, the potential of the mesh electrode can be easily controlled. Further, since the plasma discharge region and the thin film growth region are spatially separated by the mesh electrode, even if the plasma generation density is increased due to decomposition and reaction of the raw material gas, the potential of the mesh electrode causes the thin film growth surface to reach. Particle impact can be controlled. Therefore, when the method of the present invention is used, the effect of the plasma can be sufficiently exhibited, so that the formation temperature of the thin film can be reduced as compared with the case of the conventional CVD method. Because it can form a film,
Low-temperature formation of a thin film having a high dielectric constant and a small leak becomes possible. Therefore, when a device is formed, the influence on the substrate and other circuits on the substrate can be suppressed. Further, since the method for manufacturing a dielectric thin film according to the present invention uses an apparatus having a structure in which the lower electrode is grounded and an external power supply is connected to the mesh electrode, it is easy to use a general plasma CVD apparatus. It is.

【0006】また、本発明にかかる誘電体薄膜の製造方
法において、メッシュ電極の電位を−20〜+10Vの
範囲内にして成膜することが好ましい。メッシュ電極の
電位を−20〜+10Vの範囲内にして成膜することに
より、誘電損失が低く、絶縁抵抗が高いという好ましい
特性を有する酸化チタン薄膜を誘電体薄膜として得るこ
とができる。
In the method of manufacturing a dielectric thin film according to the present invention, it is preferable that the potential of the mesh electrode is formed in a range of -20 to +10 V. By forming the film by setting the potential of the mesh electrode within the range of -20 to +10 V, a titanium oxide thin film having preferable characteristics of low dielectric loss and high insulation resistance can be obtained as a dielectric thin film.

【0007】さらに、本発明にかかる誘電体薄膜の製造
装置は、反応容器と、反応容器内に配設され接地された
下部電極と、反応容器内において下部電極と対向して配
設され高周波電源の接続された上部電極と、反応容器内
において下部電極と上部電極との間に配設されるメッシ
ュ電極と、メッシュ電極に接続され、メッシュ電極の電
位を−50〜+50Vの範囲内に設定するための外部電
源とを含む平行平板型プラズマCVD装置からなる、誘
電体薄膜の製造装置である。本発明にかかる装置では、
−50〜+50Vの範囲内にメッシュ電極の電位を制御
することによってプラズマの状態を好ましい状態に制御
することができる。そのため、誘電体薄膜形成時に基板
等が受けるダメージが軽減され、品質の良い酸化チタン
薄膜を誘電体薄膜として得ることができる。しかも、本
発明にかかる装置は、下部電極を接地してメッシュ電極
に外部電源を接続した構造であるので、一般的なプラズ
マCVD装置を流用して実施することが容易である。
Further, the apparatus for producing a dielectric thin film according to the present invention comprises a reaction vessel, a lower electrode disposed in the reaction vessel and grounded, and a high-frequency power supply disposed opposite to the lower electrode in the reaction vessel. , A mesh electrode provided between the lower electrode and the upper electrode in the reaction vessel, and a potential connected to the mesh electrode and set to a potential in the range of -50 to +50 V. For manufacturing a dielectric thin film, comprising a parallel plate type plasma CVD apparatus including an external power supply for the purpose. In the device according to the present invention,
By controlling the potential of the mesh electrode within the range of −50 to +50 V, the state of the plasma can be controlled to a preferable state. Therefore, damage to the substrate or the like during the formation of the dielectric thin film is reduced, and a high-quality titanium oxide thin film can be obtained as the dielectric thin film. Moreover, since the apparatus according to the present invention has a structure in which the lower electrode is grounded and an external power supply is connected to the mesh electrode, it is easy to use a general plasma CVD apparatus.

【0008】本発明の上述の目的,その他の目的,特徴
および利点は、図面を参照して行う以下の発明の実施の
形態の詳細な説明から一層明らかとなろう。
The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments of the present invention with reference to the accompanying drawings.

【0009】[0009]

【発明の実施の形態】図1は、本発明にかかる誘電体薄
膜の製造装置の一例を示す図解図である。この薄膜製造
装置10は、一般的に使用されている平行平板型プラズ
マCVD装置の構造を含む。したがって、この薄膜製造
装置10は、反応容器12を有する。反応容器12内に
は、下部電極14が配設される。下部電極14上には、
誘電体薄膜の形成されるべき基板Sが載置される。この
下部電極14内には基板Sを加熱するためのヒータ16
が内蔵される。さらに、反応容器12内には、下部電極
14の基板Sの載置された面と対向して平行に上部電極
18が配設される。さらに、この薄膜製造装置10で
は、下部電極14と上部電極18との間にメッシュ電極
20が平行に配設される。メッシュ電極20は、複数の
開口部を有する網目状の電極であり、たとえば7×14
mmの菱形の網目を有するSUS304製のエキスパン
ドメタルで形成される。上部電極18とメッシュ電極2
0との間には、プラズマを好ましく発生させるために所
定の間隔があけられる。
FIG. 1 is an illustrative view showing one example of an apparatus for manufacturing a dielectric thin film according to the present invention. The thin film manufacturing apparatus 10 includes a structure of a generally used parallel plate type plasma CVD apparatus. Therefore, the thin film manufacturing apparatus 10 has the reaction vessel 12. A lower electrode 14 is provided in the reaction vessel 12. On the lower electrode 14,
A substrate S on which a dielectric thin film is to be formed is placed. A heater 16 for heating the substrate S is provided in the lower electrode 14.
Is built-in. Further, in the reaction vessel 12, an upper electrode 18 is provided in parallel with the surface of the lower electrode 14 on which the substrate S is mounted. Further, in the thin film manufacturing apparatus 10, a mesh electrode 20 is disposed between the lower electrode 14 and the upper electrode 18 in parallel. The mesh electrode 20 is a mesh electrode having a plurality of openings, for example, 7 × 14
It is formed of expanded metal made of SUS304 having a rhombic mesh of mm. Upper electrode 18 and mesh electrode 2
There is a predetermined interval between 0 and 0 to preferably generate a plasma.

【0010】また、図1に示すように、上部電極18に
は、高周波電源22が接続される。一方、下部電極14
は接地される。そして、下部電極14とメッシュ電極2
0との間にはメッシュ電極20の電位を−50〜+50
Vの範囲内で調整するための可変抵抗器24が接続され
る。さらに、下部電極14とメッシュ電極20との間に
は、保護抵抗26を介してグリッドに電位を印加するた
めの外部直流電源28が接続される。この外部直流電源
28もメッシュ電極20の電位を調整するために可変の
ものが用いられる。外部直流電源28によって可変抵抗
器24に電位を印加することによってメッシュ電極20
の電位を制御し、基板Sの表面に育成される薄膜表面へ
の粒子衝撃を調整することにより、品質の高い誘電体薄
膜を得ることができる。なお、ここで説明しなかった部
分については、従来、通常に用いられているプラズマC
VD装置の構造と同様である。
As shown in FIG. 1, a high frequency power supply 22 is connected to the upper electrode 18. On the other hand, the lower electrode 14
Is grounded. Then, the lower electrode 14 and the mesh electrode 2
Between 0 and 0, the potential of the mesh electrode 20 is changed from -50 to +50.
A variable resistor 24 for adjusting within the range of V is connected. Further, an external DC power supply 28 for applying a potential to the grid is connected between the lower electrode 14 and the mesh electrode 20 via a protective resistor 26. The external DC power supply 28 is also variable to adjust the potential of the mesh electrode 20. By applying a potential to the variable resistor 24 by an external DC power source 28,
Of the thin film grown on the surface of the substrate S to adjust the particle impact on the surface of the thin film grown on the surface of the substrate S, whereby a high quality dielectric thin film can be obtained. The parts not described here are the plasma C
The structure is the same as that of the VD device.

【0011】次に、この薄膜製造装置10によって誘電
体薄膜を製造する方法について説明する。まず、基板S
が反応容器12内の下部電極14上に載置される。そし
て、反応容器12内を所定の減圧状態に保持しつつ、基
板Sがヒータ16によって加熱され、所定温度に保持さ
れる。その後、気化器(図示せず)で気化させて得られ
た原料ガスがO2 ガスと混合された後、原料ガス導入口
(図示せず)から反応容器12内へ導入され、上部電極
18内に形成された複数の原料ガス導出口(図示せず)
から基板Sへ向かって供給される。これと並行して、メ
ッシュ電極20には、外部直流電源28によって所定の
電位が印加される。また、上部電極18にたとえば1
3.56MHzの高周波電圧が印加され、上部電極18
とメッシュ電極20との間に放電してプラズマを発生さ
せる。そして、プラズマをメッシュ電極20の開口部を
通過させて基板S上へ飛翔させる。こうして、原料ガス
を分解・反応させて基板S上に反応生成物を堆積させる
ことにより誘電体薄膜が形成される。
Next, a method of manufacturing a dielectric thin film by the thin film manufacturing apparatus 10 will be described. First, the substrate S
Is placed on the lower electrode 14 in the reaction vessel 12. Then, while maintaining the inside of the reaction vessel 12 at a predetermined reduced pressure, the substrate S is heated by the heater 16 and maintained at a predetermined temperature. Then, after the source gas obtained by vaporizing with a vaporizer (not shown) is mixed with O 2 gas, it is introduced into the reaction vessel 12 from the source gas inlet (not shown), and Source gas outlets (not shown)
To the substrate S. At the same time, a predetermined potential is applied to the mesh electrode 20 by the external DC power supply 28. In addition, for example, 1
A high frequency voltage of 3.56 MHz is applied, and the upper electrode 18
And discharge between the mesh electrode 20 to generate plasma. Then, the plasma is made to fly over the substrate S through the opening of the mesh electrode 20. In this way, a dielectric thin film is formed by decomposing and reacting the source gas and depositing a reaction product on the substrate S.

【0012】[0012]

【実施例】以下に、本発明にかかる誘電体薄膜の製造方
法の一実施例を説明する。この実施例は、上述の薄膜製
造装置10を用いて誘電体薄膜としての酸化チタン薄膜
を形成したものである。原料としては、Ti(O−i−
3 7 4 を用いた。この原料は、液体であるので、
40〜45℃に加熱しておいてArガスをキャリアとし
てバブリングしてガス化させた。そして、表1に示す条
件で厚さ200nm前後の酸化チタン薄膜を形成し、そ
の電気特性を評価した。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the method for producing a dielectric thin film according to the present invention will be described below. In this embodiment, a titanium oxide thin film as a dielectric thin film is formed using the above-described thin film manufacturing apparatus 10. As a raw material, Ti (O-i-
C 3 H 7 ) 4 was used. Since this raw material is liquid,
The mixture was heated to 40 to 45 ° C. and gasified by bubbling using Ar gas as a carrier. Then, a titanium oxide thin film having a thickness of about 200 nm was formed under the conditions shown in Table 1, and its electrical characteristics were evaluated.

【0013】[0013]

【表1】 [Table 1]

【0014】図2は、メッシュ電極の電位と誘電体膜の
誘電損失(tanδ)および絶縁抵抗(logIR)と
の相関を示したグラフである。図2から明らかなよう
に、メッシュ電極の電位によって誘電体薄膜の特性は大
きく変わる。メッシュ電極の電位が−20〜+10Vの
ときに好ましい特性を持つ酸化チタン薄膜を得ることが
でき、特にメッシュ電極の電位が−10〜−15Vのと
きに、誘電損失が低く(tanδ=2.4%)かつ絶縁
抵抗が高い(logIR=12.42Ω・cm)という
特性を持つ良好な酸化チタン薄膜が得られた。この酸化
チタン薄膜について、V−I特性を測定したところ、6
Vの印加電圧に対して、漏れ電流は、5.8×10-4
/cm2 であった。
FIG. 2 is a graph showing the correlation between the potential of the mesh electrode and the dielectric loss (tan δ) and the insulation resistance (logIR) of the dielectric film. As is apparent from FIG. 2, the characteristics of the dielectric thin film greatly change depending on the potential of the mesh electrode. When the potential of the mesh electrode is -20 to +10 V, a titanium oxide thin film having favorable characteristics can be obtained. In particular, when the potential of the mesh electrode is -10 to -15 V, the dielectric loss is low (tan δ = 2.4). %) And a good titanium oxide thin film having characteristics of high insulation resistance (logIR = 12.42 Ω · cm). The VI characteristics of this titanium oxide thin film were measured.
With respect to the applied voltage of V, the leakage current is 5.8 × 10 −4 A
/ Cm 2 .

【0015】図3はメッシュ電極の電位を−10Vにし
て形成した酸化チタン薄膜の組成分析結果を示したグラ
フである。オージェ分析を用いた膜のディプスプロファ
イルを見ると、吸着によるものと思われる膜表面のカー
ボンを除き、原料ガス中のカーボンに由来する膜中の残
留カーボンが存在しないことがわかる。また、膜は1.
94〜2.03のO/Ti比を持った均質な酸化チタン
であることがわかる。また、従来の製造方法による比較
例として、メッシュ電極を用いないプラズマCVD法で
酸化チタン薄膜を形成した。表2に実施例と比較例とを
比較して示す。
FIG. 3 is a graph showing the result of composition analysis of a titanium oxide thin film formed by setting the potential of the mesh electrode to -10 V. Looking at the depth profile of the film using Auger analysis, it is understood that there is no residual carbon in the film derived from carbon in the source gas, except for carbon on the film surface which is considered to be due to adsorption. In addition, the film is 1.
It can be seen that this is a homogeneous titanium oxide having an O / Ti ratio of 94 to 2.03. As a comparative example using a conventional manufacturing method, a titanium oxide thin film was formed by a plasma CVD method without using a mesh electrode. Table 2 shows a comparison between the example and the comparative example.

【0016】[0016]

【表2】 [Table 2]

【0017】表2に示すように、本発明のメッシュ電極
の電位を制御した膜は比較例と対比すると、残留カーボ
ンがほとんど無くなり、かつ絶縁抵抗(IR)および耐
圧が飛躍的に向上し良好な特性を示すことがわかる。
As shown in Table 2, the film of the present invention, in which the potential of the mesh electrode was controlled, had almost no residual carbon, and the insulation resistance (IR) and the withstand voltage were significantly improved. It turns out that it shows a characteristic.

【0018】以上の通り、本発明の製造方法および製造
装置によれば、従来の方法および装置では達成できなか
った350℃という低い成膜温度でも良好な特性を有す
る誘電体薄膜を得ることができる。
As described above, according to the manufacturing method and the manufacturing apparatus of the present invention, a dielectric thin film having good characteristics can be obtained even at a film forming temperature as low as 350 ° C., which cannot be achieved by the conventional method and apparatus. .

【0019】なお、上述した実施例において用いたメッ
シュ電極は、7×14mmの網目を持つSUS304製
の菱形のエキスパンドメタルを用いているが、これに限
るものではなく、膜へのコンタミネーションの無いもの
であればどのような材質のものを用いてもよい。また、
メッシュ電極の網目の形や寸法は分解されたガスが基板
表面に到達できるように選べればよい。また、酸化チタ
ン薄膜を形成する原料としては、上述したTi(O−i
−C37 4 に限るものではなく、たとえばTi(O
−n−C3 7 4 、Ti(O−i−C4 9 4 、T
i(O−t−C4 9 4 などのTiの有機化合物を適
宜選択して用いることができる。
The mesh electrode used in the above-mentioned embodiment is made of a SUS304 diamond-shaped expanded metal having a mesh of 7 × 14 mm. However, the present invention is not limited to this. Any material may be used as long as it is a material. Also,
The shape and size of the mesh of the mesh electrode may be selected so that the decomposed gas can reach the substrate surface. In addition, as a raw material for forming a titanium oxide thin film, the above-described Ti (O-i
-C 3 H 7 ) 4 , for example, Ti (O
-N-C 3 H 7) 4 , Ti (O-i-C 4 H 9) 4, T
An organic compound of Ti such as i (OtC 4 H 9 ) 4 can be appropriately selected and used.

【0020】[0020]

【発明の効果】以上の説明で明らかなように、本発明に
かかる誘電体薄膜の製造方法およびその製造装置によれ
ば、通常使用されている平行平板型プラズマCVD装置
を流用して実施することが容易であり、なおかつプラズ
マのパワー密度を上げると同時にメッシュ電極の電位を
制御することによって、350℃以下の低い温度におい
て、高誘電率でしかも高絶縁抵抗を有する誘電体薄膜と
しての酸化チタン薄膜を得ることができる。したがっ
て、誘電体薄膜を形成する際、基板や他の部品に対する
熱や高速粒子によるダメージを抑えることができ、品質
の優れたMMICなどのデバイスを得ることができる。
As is apparent from the above description, according to the method for manufacturing a dielectric thin film and the apparatus for manufacturing the same according to the present invention, it is possible to divert a commonly used parallel plate type plasma CVD apparatus. A titanium oxide thin film as a dielectric thin film having a high dielectric constant and a high insulation resistance at a low temperature of 350 ° C. or less by increasing the power density of the plasma and controlling the potential of the mesh electrode at the same time. Can be obtained. Therefore, when a dielectric thin film is formed, damage to the substrate and other components due to heat and high-speed particles can be suppressed, and a device such as an MMIC having excellent quality can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明にかかる誘電体薄膜の製造装置の一例を
示す図解図である。
FIG. 1 is an illustrative view showing one example of an apparatus for producing a dielectric thin film according to the present invention;

【図2】本発明にかかる誘電体薄膜の製造方法における
メッシュ電極の電位と誘電体膜の誘電損失(tanδ)
および絶縁抵抗(logIR)との相関を示したグラフ
である。
FIG. 2 shows the potential of the mesh electrode and the dielectric loss (tan δ) of the dielectric film in the method for producing a dielectric thin film according to the present invention.
4 is a graph showing a correlation between the measured values and the insulation resistance (logIR).

【図3】本発明にかかる誘電体薄膜の製造方法において
メッシュ電極の電位を−10Vにして形成した酸化チタ
ン薄膜の組成分析結果を示したグラフである。
FIG. 3 is a graph showing a composition analysis result of a titanium oxide thin film formed by setting a potential of a mesh electrode to −10 V in the method of manufacturing a dielectric thin film according to the present invention.

【図4】従来の製造方法に用いられる3電極式プラズマ
CVD装置の原理的構成を示す図解図である。
FIG. 4 is an illustrative view showing a principle configuration of a three-electrode type plasma CVD apparatus used in a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

10 薄膜製造装置 12 反応容器 14 下部電極 16 ヒータ 18 上部電極 20 メッシュ電極 22 高周波電源 24 可変抵抗器 26 保護抵抗 28 外部直流電源 DESCRIPTION OF SYMBOLS 10 Thin film manufacturing apparatus 12 Reaction vessel 14 Lower electrode 16 Heater 18 Upper electrode 20 Mesh electrode 22 High frequency power supply 24 Variable resistor 26 Protection resistance 28 External DC power supply

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 FI H01L 21/316 H01L 21/316 X ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 6 Identification code FI H01L 21/316 H01L 21/316 X

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 反応容器、前記反応容器内に配設され接
地された下部電極、前記反応容器内において前記下部電
極と対向して配設され高周波電源に接続された上部電
極、および前記反応容器内において前記下部電極と前記
上部電極との間に配設され外部電源に接続されたメッシ
ュ電極を含む平行平板型プラズマCVD装置を用いた誘
電体薄膜の製造方法であって、 前記下部電極上に基板を載置し、前記上部電極と前記メ
ッシュ電極との間に放電して原料ガスのプラズマを発生
させ、前記プラズマを前記メッシュ電極を通過させて前
記基板上へ飛翔させて、350℃以下の成膜温度におい
て前記基板上に酸化チタン薄膜を誘電体薄膜として形成
する、誘電体薄膜の製造方法。
1. A reaction vessel, a lower electrode disposed in the reaction vessel and grounded, an upper electrode disposed in the reaction vessel opposite to the lower electrode and connected to a high frequency power supply, and the reaction vessel A method for manufacturing a dielectric thin film using a parallel plate type plasma CVD apparatus including a mesh electrode disposed between the lower electrode and the upper electrode and connected to an external power supply, wherein A substrate is placed, and discharge is generated between the upper electrode and the mesh electrode to generate a plasma of a source gas, and the plasma is passed through the mesh electrode to fly onto the substrate, and is heated to 350 ° C. or less. Forming a titanium oxide thin film as a dielectric thin film on the substrate at a film forming temperature.
【請求項2】 前記メッシュ電極の電位を−20〜+1
0Vの範囲内にして成膜する、請求項1に記載の誘電体
薄膜の製造方法。
2. The electric potential of the mesh electrode is set to -20 to +1.
The method for producing a dielectric thin film according to claim 1, wherein the film is formed within a range of 0V.
【請求項3】 反応容器、 前記反応容器内に配設され接地された下部電極、 前記反応容器内において前記下部電極と対向して配設さ
れ高周波電源の接続された上部電極、 前記反応容器内において前記下部電極と前記上部電極と
の間に配設されるメッシュ電極、および前記メッシュ電
極に接続され、メッシュ電極の電位を−50〜+50V
の範囲内に設定するための外部電源を含む平行平板型プ
ラズマCVD装置からなる、誘電体薄膜の製造装置。
3. A reaction vessel, a lower electrode disposed in the reaction vessel and grounded, an upper electrode disposed opposite to the lower electrode in the reaction vessel and connected to a high-frequency power supply, and inside the reaction vessel. And a mesh electrode provided between the lower electrode and the upper electrode, and a potential of the mesh electrode connected to the mesh electrode of -50 to +50 V
An apparatus for manufacturing a dielectric thin film, comprising a parallel plate type plasma CVD apparatus including an external power supply for setting the thickness within the range described above.
JP9246192A 1997-08-26 1997-08-26 Production of dielectric thin coating film and device therefor Pending JPH1161419A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9246192A JPH1161419A (en) 1997-08-26 1997-08-26 Production of dielectric thin coating film and device therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9246192A JPH1161419A (en) 1997-08-26 1997-08-26 Production of dielectric thin coating film and device therefor

Publications (1)

Publication Number Publication Date
JPH1161419A true JPH1161419A (en) 1999-03-05

Family

ID=17144892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9246192A Pending JPH1161419A (en) 1997-08-26 1997-08-26 Production of dielectric thin coating film and device therefor

Country Status (1)

Country Link
JP (1) JPH1161419A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001036031A (en) * 1999-06-25 2001-02-09 Hyundai Electronics Ind Co Ltd Capacitor of semiconductor memory device and its manufacture
KR20010088087A (en) * 2000-03-10 2001-09-26 장 진 Selective deposition method of carbon nanotubes
KR20030028296A (en) * 2001-09-28 2003-04-08 학교법인 한양학원 Plasma enhanced chemical vapor deposition apparatus and method of producing a cabon nanotube using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001036031A (en) * 1999-06-25 2001-02-09 Hyundai Electronics Ind Co Ltd Capacitor of semiconductor memory device and its manufacture
JP4486735B2 (en) * 1999-06-25 2010-06-23 株式会社ハイニックスセミコンダクター Manufacturing method of capacitor of semiconductor memory device
KR20010088087A (en) * 2000-03-10 2001-09-26 장 진 Selective deposition method of carbon nanotubes
KR20030028296A (en) * 2001-09-28 2003-04-08 학교법인 한양학원 Plasma enhanced chemical vapor deposition apparatus and method of producing a cabon nanotube using the same

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