JPH11354836A - Full color semiconductor light emitting device - Google Patents
Full color semiconductor light emitting deviceInfo
- Publication number
- JPH11354836A JPH11354836A JP15730798A JP15730798A JPH11354836A JP H11354836 A JPH11354836 A JP H11354836A JP 15730798 A JP15730798 A JP 15730798A JP 15730798 A JP15730798 A JP 15730798A JP H11354836 A JPH11354836 A JP H11354836A
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- diode
- light
- semiconductor light
- emitting elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Led Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、Ｒ，Ｇ，Ｂの各色
の半導体発光素子を含む発光装置に係り、特に発光素子
の静電耐圧性を向上させるための静電気保護素子に回路
パターンを複合することによってアセンブリが簡単でし
かも薄型化が図れるようにしたフルカラー発光の半導体
発光装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light-emitting device including semiconductor light-emitting elements of R, G, and B colors, and more particularly, to combining a circuit pattern with an electrostatic protection element for improving the electrostatic breakdown voltage of the light-emitting element. The present invention relates to a full-color light-emitting semiconductor light-emitting device whose assembly is simple and thin.
【０００２】[0002]
【従来の技術】ＬＥＤランプやチップ型ＬＥＤ等のよう
に半導体発光素子を利用した発光装置は、たとえばパネ
ルにこれらのＬＥＤランプやチップ型ＬＥＤを多数配列
したＬＥＤディスプレイに広く利用されている。半導体
発光素子は、化合物半導体を同一の化合物半導体の基板
の上に積層してｐ型層及びｎ型層を形成したｐ−ｎ接合
のものが一般的であり、化合物半導体の種類によって赤
（Ｒ）や緑（Ｇ）等の発光が得られる。そして近来で
は、主としてＧａＮ系の化合物半導体を絶縁性であって
透明のサファイアの基板に積層した青（Ｂ）や緑（Ｇ）
の発光素子が開発され、発光輝度が高い製品として提供
されるようになった。2. Description of the Related Art Light-emitting devices using semiconductor light-emitting elements, such as LED lamps and chip-type LEDs, are widely used in, for example, LED displays in which a large number of these LED lamps and chip-type LEDs are arranged on a panel. A semiconductor light emitting element is generally a pn junction in which a compound semiconductor is stacked on the same compound semiconductor substrate to form a p-type layer and an n-type layer. Depending on the type of the compound semiconductor, a red (R ) Or green (G). In recent years, blue (B) and green (G) in which a GaN-based compound semiconductor is mainly laminated on an insulating and transparent sapphire substrate are used.
Have been developed and are now offered as products with high light emission luminance.
【０００３】ＬＥＤディスプレイの場合では、単色表示
のものでは１個のＬＥＤによって１画素が構成される
が、たとえば赤，橙，緑の３色の表示の場合では、赤色
ＬＥＤ１個及び緑色ＬＥＤ１個を１画素とし、橙は赤Ｌ
ＥＤと緑ＬＥＤを同時に発光させて混色化することによ
って表示される。これに対し、近来では、フルカラー表
示のために、光の３原色であるＲ，Ｇ，Ｂの組み合わせ
を１画素とする発光表示装置が主流となっている。この
ようなＲ，Ｇ，Ｂを１画素とするフルカラーの発光装置
の一般的な製造は、化合物半導体を基板上に成長積層さ
せた各色の発光素子について別々にダイスボンドし、こ
れらの発光素子のそれぞれに対して独立して電気的に接
続するためにワイヤボンディングするという工程とした
ものが一般的である。In the case of an LED display, one pixel is constituted by one LED in the case of a single color display. For example, in the case of three colors of red, orange and green, one red LED and one green LED are used. One pixel, orange is red L
This is displayed by causing the ED and the green LED to emit light at the same time to mix colors. On the other hand, recently, for full-color display, a light-emitting display device using a combination of R, G, and B, which are three primary colors of light, as one pixel has become mainstream. In general manufacture of such a full-color light-emitting device having R, G, and B as one pixel, a light-emitting element of each color in which a compound semiconductor is grown and laminated on a substrate is separately die-bonded, and these light-emitting elements are formed. In general, a process of performing wire bonding to electrically connect each of them independently is generally performed.
【０００４】光の３原色のＲ，Ｇ，Ｂの発光素子のう
ち、Ｇ，Ｂは高い発光輝度を得るためにＧａＮ系化合物
半導体が用いられる。ところが、ＧａＮ系化合物半導体
は、発光素子形成のための他の種類の化合物半導体と比
べると、静電耐圧が低いという性質がある。このため、
Ｒの発光素子と比較すると、Ｇ，Ｂの発光素子について
は静電耐圧が低いため、静電気やサージ等の高電圧が印
加されたときに静電破壊されやすく、特にＧａＮ系の化
合物半導体が必須のＢの発光素子についてはこの静電破
壊による影響は無視できない。[0004] Of the light emitting elements of the three primary colors R, G, and B, GaN-based compound semiconductors are used for G and B in order to obtain high emission luminance. However, GaN-based compound semiconductors have a property of lowering the electrostatic withstand voltage as compared with other types of compound semiconductors for forming light-emitting elements. For this reason,
Compared to the R light emitting element, the G and B light emitting elements have a lower electrostatic withstand voltage, and thus are more likely to be destroyed by electrostatic discharge when a high voltage such as static electricity or surge is applied. In particular, a GaN-based compound semiconductor is essential. Regarding the light emitting element B, the effect of this electrostatic breakdown cannot be ignored.
【０００５】このように、Ｇ，Ｂの発光素子が静電破壊
しやすい傾向にあることから、ＲとＧの発光素子または
ＲとＢ発光素子の組み合わせを１画素としたり、Ｒ，
Ｇ，Ｂの発光素子の組み合わせを１画素単位とした多色
発光にも影響を及ぼす。すなわち、Ｒの発光素子につい
ては静電破壊の心配がないのに対して、これと組み合わ
せられたＧ，Ｂは静電気等の過電流によって静電破壊し
てしまうので、Ｒの発光素子による赤だけの発光とな
り、光の３原色によるフルカラーの発光機能は失われて
しまう。As described above, since the G and B light emitting elements tend to be easily destroyed by electrostatic discharge, the combination of the R and G light emitting elements or the combination of the R and B light emitting elements is regarded as one pixel,
It also affects multicolor light emission in which the combination of the G and B light emitting elements is a pixel unit. That is, while the R light emitting element is free from electrostatic destruction, the G and B combined therewith are electrostatically destroyed by an overcurrent such as static electricity. And the full-color light emitting function of the three primary colors of light is lost.
【０００６】このようなＧ，Ｂの発光素子の静電破壊に
対しては、特開平９−１４８６２５号公報に記載されて
いるように、ＧａＮ系化合物半導体を用いた発光素子の
静電耐圧を向上させるための逆耐圧補償用の補償ダイオ
ードを備えることが一つの有効な手段となり得る。ま
た、たとえばｎ型のシリコン基板を用いたツェナーダイ
オードに発光素子をｐ側及びｎ側が逆極性となるように
導通接続することによっても、静電破壊を防止できるこ
とが既に知られている。As described in Japanese Patent Application Laid-Open No. 9-148625, the electrostatic breakdown voltage of a light-emitting element using a GaN-based compound semiconductor is reduced against the electrostatic breakdown of the G and B light-emitting elements. Providing a compensating diode for reverse breakdown voltage compensation for improvement can be one effective means. It is also known that electrostatic breakdown can be prevented by, for example, electrically connecting a light-emitting element to a Zener diode using an n-type silicon substrate so that the p-side and the n-side have opposite polarities.
【０００７】図４は静電保護素子としてツェナーダイオ
ードを利用したＲ，Ｇ，Ｂのフルカラー発光装置として
適用可能な構成例を示す概略図であり、同図の（ａ）は
側面図、同図の（ｂ）は平面図である。FIG. 4 is a schematic diagram showing a configuration example applicable to a full-color R, G, B light emitting device using a Zener diode as an electrostatic protection element. FIG. 4A is a side view, and FIG. (B) is a plan view.
【０００８】図において、配線パターン５１ａ，５１
ｂ，５１ｃを予めウエハー段階で形成したプリント基板
５１を主材として、各配線パターン５１ａ，５１ｂ，５
１ｃのそれぞれに、図示の例では３個ずつのＲ，Ｇ，Ｂ
の発光素子５２，５３，５４を配置している。そして、
これらの発光素子５２〜５４の静電耐圧を保つために、
各配線パターン５１ａ〜５１ｃに導通させたツェナーダ
イオード５５，５６，５７に搭載されている。In the figure, wiring patterns 51a, 51
Each of the wiring patterns 51a, 51b, and 5c is mainly composed of a printed circuit board 51 in which b and 51c are formed in advance at a wafer stage.
1c, three R, G, B in the illustrated example.
Of light emitting elements 52, 53, 54 are arranged. And
In order to maintain the electrostatic withstand voltage of these light emitting elements 52 to 54,
The zener diodes are mounted on zener diodes 55, 56 and 57 which are electrically connected to the respective wiring patterns 51a to 51c.
【０００９】ツェナーダイオード５５〜５７はたとえば
ｎ型のシリコン基板を利用したものであり、その底面に
ｎ電極を形成して配線パターン５１ａ〜５１ｃに導通さ
せて搭載されている。そして、上面側にはｐ型半導体領
域を部分的に拡散形成し、ｎ型シリコン基板及びｐ型半
導体領域のそれぞれにｎ側電極及びｐ側電極が接合形成
され、ｐ側電極はワイヤによって配線パターン５１ａ〜
５１ｃにボンディングされる。一方、発光素子５２〜５
４はフリップチップ型であって、ｎ側及びｐ側の電極を
逆極性としてツェナーダイオード５５〜５７に導通させ
ている。The Zener diodes 55 to 57 use, for example, an n-type silicon substrate, and have an n-electrode formed on the bottom surface thereof and are mounted to be conductive to the wiring patterns 51a to 51c. A p-type semiconductor region is partially diffused and formed on the upper surface, and an n-side electrode and a p-side electrode are joined to the n-type silicon substrate and the p-type semiconductor region, respectively. 51a-
Bonded to 51c. On the other hand, the light emitting elements 52 to 5
Reference numeral 4 denotes a flip-chip type, in which the n-side and p-side electrodes are made to be conductive to the zener diodes 55 to 57 with opposite polarities.
【００１０】このように各発光素子５２〜５４をｐ側と
ｎ側の電極を逆極性としてツェナーダイオード５５〜５
７に搭載することによって、静電気等の過電流が流れた
ときでも発光素子５２〜５４の破壊を防止することがで
きる。As described above, the zener diodes 55 to 5 are connected to the light-emitting elements 52 to 54 by setting the p-side and n-side electrodes to opposite polarities.
By mounting the light-emitting elements 7 on the light-emitting elements 7, the light-emitting elements 52 to 54 can be prevented from being destroyed even when an overcurrent such as static electricity flows.
【００１１】[0011]
【発明が解決しようとする課題】ところが、発光素子５
２〜５４はツェナーダイオード５５〜５７に搭載されて
複合素子化されるので、発光素子５２〜５４をプリント
基板５１の上に搭載するだけの場合に比べると、ツェナ
ーダイオード５５〜５７の組込み分だけ高さ寸法が大き
くなる。このため、プリント基板５１と全ての発光素子
５２〜５４とによるＲ，Ｇ，Ｂのフルカラー発光用の発
光装置のユニットでは、特に静電耐圧が低いＧとＢの発
光素子５３，５４の静電気保護が図れるものの、薄型化
の自由度が小さくなり、製品の小型化に支障を招く。However, the light emitting element 5
Since the elements 2 to 54 are mounted on the Zener diodes 55 to 57 to form a composite element, compared to the case where the light emitting elements 52 to 54 are simply mounted on the printed circuit board 51, only the amount of the embedded Zener diodes 55 to 57 is required. The height dimension increases. For this reason, in the unit of the light emitting device for full-color light emission of R, G, and B by the printed board 51 and all the light emitting elements 52 to 54, the electrostatic protection of the light emitting elements 53 and 54 of G and B, which have particularly low electrostatic withstand voltage. However, the degree of freedom in thinning is reduced, which hinders miniaturization of the product.
【００１２】また、アセンブリにおいては、プリント基
板５１へのツェナーダイオード５５〜５７の搭載とワイ
ヤによるボンディングの工程と、ツェナーダイオード５
５〜５７への各発光素子５２〜５４の搭載の工程とが必
要となる。この場合、たとえばツェナーダイオード５５
〜５７をウエハー状態で形成しておきこの上に発光素子
５２〜５４を搭載したものをダイシングし予め複合化素
子として準備しておけば、プリント基板５１にはこの複
合化素子を搭載するだけで済むので、見掛け上の工数は
減る。In the assembly, the steps of mounting the Zener diodes 55 to 57 on the printed circuit board 51 and bonding by wires are performed.
A step of mounting each of the light emitting elements 52 to 54 on 5 to 57 is required. In this case, for example, the Zener diode 55
To 57 are formed in a wafer state, and the light emitting elements 52 to 54 mounted thereon are diced and prepared in advance as a composite element. As a result, apparent man-hours are reduced.
【００１３】しかしながら、プリント基板５１、発光素
子５２〜５４及びツェナーダイオード５５〜５７の３部
材の組み合わせであることに変わりはなく、アセンブリ
のための工程数の削減には限界がある。また、組立て工
数が多いことと、各ツェナーダイオード５５〜５７に対
する発光素子５２〜５４の搭載精度等を厳しく管理しな
ければならないので、製造歩留りにも大きく影響する。However, the combination of the three members, that is, the printed board 51, the light emitting elements 52 to 54, and the zener diodes 55 to 57 remains unchanged, and there is a limit to the reduction in the number of steps for assembly. Further, since the number of assembling steps is large and the mounting accuracy of the light emitting elements 52 to 54 with respect to each of the zener diodes 55 to 57 has to be strictly controlled, the production yield is greatly affected.
【００１４】このようにフルカラー対応のためのＲ，
Ｇ，Ｂの組み合わせを１画素とする発光表示装置におい
て、ツェナーダイオードを利用して静電耐圧を補償しよ
うとするとき、製品の薄型化や製造歩留りの点で改善す
べき問題が残っている。As described above, R,
In a light-emitting display device having a combination of G and B as one pixel, when compensating for the electrostatic withstand voltage by using a Zener diode, there remains a problem to be solved in terms of thinning a product and manufacturing yield.
【００１５】本発明において解決すべき課題は、電気的
接続が簡単でかつ静電気やサージ等の高電圧の印加に対
する耐圧の向上によって信頼性を向上し得るフルカラー
発光が可能な発光装置を提供することにある。The problem to be solved in the present invention is to provide a light emitting device capable of full-color light emission, which is simple in electrical connection and can improve reliability by improving withstand voltage against application of a high voltage such as static electricity or surge. It is in.
【００１６】[0016]
【課題を解決するための手段】本発明は、静電気保護用
のＳｉダイオードと、このＳｉダイオードの上に導通搭
載される赤，緑，青の各色の半導体発光素子との組み合
わせからなるフルカラーの半導体発光装置であって、前
記Ｓｉダイオードには、前記半導体発光素子を外部の電
気回路に導通接続させる回路パターンを形成してなるこ
とを特徴とする。SUMMARY OF THE INVENTION The present invention provides a full-color semiconductor comprising a combination of a Si diode for electrostatic protection and semiconductor light emitting devices of red, green and blue colors which are conductively mounted on the Si diode. A light emitting device, wherein the Si diode is formed with a circuit pattern for electrically connecting the semiconductor light emitting element to an external electric circuit.
【００１７】この構成では、静電気保護用のＳｉダイオ
ードが従来の回路基板を兼ねた部材とすることができる
ので、Ｓｉダイオードに発光素子を実装するだけのアセ
ンブリで済むほか、高さ寸法も短くすることができる。In this configuration, since the Si diode for electrostatic protection can be a member that also serves as a conventional circuit board, an assembly in which the light emitting element is mounted on the Si diode is sufficient, and the height dimension is reduced. be able to.
【００１８】[0018]
【発明の実施の形態】請求項１の発明は、静電気保護用
のＳｉダイオードと、このＳｉダイオードの上に導通搭
載される赤，緑，青の各色の半導体発光素子との組み合
わせからなるフルカラーの半導体発光装置であって、前
記Ｓｉダイオードには、前記半導体発光素子を外部の電
気回路に導通接続させる回路パターンを形成してなるも
のであり、Ｓｉダイオードに発光素子を実装するだけの
アセンブリで済み、高さ寸法も短い製品が得られる。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention of claim 1 is a full-color combination of a Si diode for static electricity protection and semiconductor light-emitting elements of red, green and blue which are conductively mounted on the Si diode. A semiconductor light emitting device, wherein the Si diode is formed with a circuit pattern for electrically connecting the semiconductor light emitting element to an external electric circuit, and only an assembly for mounting the light emitting element on the Si diode is sufficient. A product with a short height can be obtained.
【００１９】請求項２の発明は、前記Ｓｉダイオード
は、前記各色の半導体発光素子を落とし込んで搭載する
凹部を形成してなる請求項１記載のフルカラー半導体発
光装置であり、発光素子を凹部の中に収めることで、Ｓ
ｉダイオードと半導体発光素子との積層高さを小さく抑
えるという作用を有する。According to a second aspect of the present invention, in the full-color semiconductor light emitting device according to the first aspect, the Si diode has a recess for mounting the semiconductor light emitting element of each color. By putting in
This has the effect of reducing the stacking height of the i-diode and the semiconductor light emitting element.
【００２０】以下に、本発明の実施の形態の具体例を図
面を参照しながら説明する。図１は本発明の一実施の形
態によるフルカラー半導体発光装置の要部を示す概略平
面図、図２は発光素子を含む面で切った要部の縦断面図
である。Hereinafter, specific examples of the embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a schematic plan view showing a main part of a full-color semiconductor light emitting device according to an embodiment of the present invention, and FIG. 2 is a longitudinal sectional view of the main part taken along a plane including a light emitting element.
【００２１】本発明の発光装置は、１枚のＳｉダイオー
ド１をプリント基板兼用の部材として備え、このＳｉダ
イオード１の上に後述するＲ，Ｇ，Ｂの発光素子を画素
単位として３組配列したものである。The light emitting device of the present invention includes one Si diode 1 as a member that also serves as a printed board, and three sets of R, G, and B light emitting elements described later are arranged on the Si diode 1 in pixel units. Things.
【００２２】Ｓｉダイオード１はたとえばｎ型シリコン
基板を利用したもので、図２に示すように、Ｒ，Ｇ，Ｂ
の発光素子をそれぞれ搭載する部分に凹部１ａ，１ｂ，
１ｂ−１を形成している。そして、これらの凹部１ａ〜
１ｂ−１に対応して、配線パターン２ａ，２ｂ，２ｃ及
びこれらにそれぞれ導通させた電極３ａ，３ｂ，３ｃの
パターンを設けている。The Si diode 1 uses, for example, an n-type silicon substrate, and as shown in FIG.
The recesses 1a, 1b,
1b-1. And these recesses 1a to
Corresponding to 1b-1, wiring patterns 2a, 2b, and 2c and patterns of electrodes 3a, 3b, and 3c that are electrically connected to these are provided.
【００２３】凹部１ａ〜１ｂ−１にそれぞれ搭載される
Ｒ，Ｇ，Ｂの発光素子４，５，６は、フリップチップ型
のものであり、図３にＢの発光素子６の搭載導通構造を
示す。The R, G, and B light emitting elements 4, 5, and 6 mounted in the recesses 1a to 1b-1, respectively, are of a flip chip type, and FIG. Show.
【００２４】Ｓｉダイオード１は、図３に示すように、
ｎ型シリコン基板１ｃを基材とし、図２で説明した配線
パターン２ａ〜２ｃ及び電極３ａ〜３ｃを表面側に形成
したものである。そして、凹部１ｂ−１の底面部の一部
を除いて被覆する酸化膜１ｄを形成し、この酸化膜１ｄ
で被覆されていない部分を拡散窓としてｐ型不純物イオ
ンを注入することによって、ｐ型半導体領域１ｅを拡散
形成している。The Si diode 1, as shown in FIG.
The wiring pattern 2a to 2c and the electrodes 3a to 3c described with reference to FIG. 2 are formed on the surface side using an n-type silicon substrate 1c as a base material. Then, an oxide film 1d is formed to cover except for a part of the bottom surface of the concave portion 1b-1, and the oxide film 1d is formed.
The p-type semiconductor region 1e is diffused and formed by implanting p-type impurity ions using a portion not covered by the above as a diffusion window.
【００２５】ｎ型シリコン基板１ｃの表面には、ｎ電極
１ｆとｐ電極１ｇをそれぞれ金属蒸着法によって形成す
る。ｎ電極１ｆは凹部１ｂ−１の右端部に偏って傾斜面
までに亘って形成され、酸化膜１ｄが形成されていない
部分によってｎ型シリコン基板１ｃに導通している。こ
のｎ電極１ｆはたとえばアルミを利用することができ、
傾斜面部分をｎ電極１ｆによる光の反射層として利用す
る。一方、ｐ電極１ｇはｎ型シリコン基板１ｃに拡散形
成したｐ型半導体領域１ｅに接合されている。On the surface of the n-type silicon substrate 1c, an n-electrode 1f and a p-electrode 1g are respectively formed by a metal deposition method. The n-electrode 1f is formed so as to be biased toward the right end of the concave portion 1b-1 and extends up to the inclined surface, and is electrically connected to the n-type silicon substrate 1c by a portion where the oxide film 1d is not formed. This n-electrode 1f can use aluminum, for example.
The inclined surface portion is used as a light reflection layer by the n-electrode 1f. On the other hand, the p-electrode 1g is joined to the p-type semiconductor region 1e formed by diffusion in the n-type silicon substrate 1c.
【００２６】Ｂの発光素子６は、ＧａＮ系化合物半導体
を絶縁性のサファイア基板に積層してその中の１つの層
として形成されるＩｎＧａＮ活性層を発光層とし、フリ
ップチップ型としてＳｉダイオード１の上面に搭載され
るものである。The light emitting element 6 of B has a GaN-based compound semiconductor laminated on an insulating sapphire substrate, and an InGaN active layer formed as one of the layers is used as a light emitting layer. It is mounted on the upper surface.
【００２７】すなわち、図３に示すように、発光素子６
は透明のサファイア基板６ａに積層したｎ型層及びｐ型
層のそれぞれの表面にｎ側電極６ｂ及びｐ側電極６ｃを
蒸着法によって形成したものである。また、これらのｎ
側電極６ｂ及びｐ側電極６ｃの表面にはそれぞれマイク
ロバンプ６ｄ，６ｅが形成されている。そして、Ｓｉダ
イオード１のｎ電極１ｆとｐ電極１ｇとに跨がる配置と
して発光素子６を搭載し、ｎ側電極６ｂ及びｐ側電極６
ｃをそれぞれｐ電極１ｇ及びｎ電極１ｆにマウント接合
する。That is, as shown in FIG.
Is formed by forming an n-side electrode 6b and a p-side electrode 6c on the respective surfaces of an n-type layer and a p-type layer laminated on a transparent sapphire substrate 6a by a vapor deposition method. In addition, these n
Micro bumps 6d and 6e are formed on the surfaces of the side electrode 6b and the p-side electrode 6c, respectively. Then, the light emitting element 6 is mounted so as to straddle the n-electrode 1f and the p-electrode 1g of the Si diode 1, and the n-side electrode 6b and the p-side electrode 6
c is mounted on the p electrode 1g and the n electrode 1f, respectively.
【００２８】Ｓｉダイオード１に形成されたｐ電極１ｇ
は、発光素子６のｎ側電極６ｂ及び配線パターン２ｃと
導通している。また、ｎ電極１ｆ及びｐ電極１ｇは、ア
ルミニウム等の光反射率の高い金属を蒸着によって形成
したものとし、凹部１ｂ−１の内周壁部分の傾斜面を発
光方向への反射面として利用する。P-electrode 1g formed on Si diode 1
Are electrically connected to the n-side electrode 6b of the light emitting element 6 and the wiring pattern 2c. The n-electrode 1f and the p-electrode 1g are formed by vapor deposition of a metal having high light reflectivity such as aluminum, and use the inclined surface of the inner peripheral wall portion of the concave portion 1b-1 as a reflecting surface in the light emitting direction.
【００２９】以上のような搭載構造はＲ，Ｇの発光素子
４，５の凹部１ａ，１ｂへの組込みについても全く同様
である。The mounting structure described above is exactly the same when the R and G light emitting elements 4 and 5 are incorporated into the concave portions 1a and 1b.
【００３０】以上の構成において、Ｒ，Ｇ，Ｂの各発光
素子４，５，６へ通電されると、それぞれの発光層から
の光が放出される。そして、下側及び側方に抜ける光の
成分もあるが、サファイア基板が透明であることから図
３において上側を向いた面を主光取出し面とした発光が
得られる。したがって、Ｒ，Ｇ，Ｂの光の３原色の発光
素子４，５，６のそれぞれの発光色とこれらの組み合わ
せによって、フルカラーの発光が得られる。In the above configuration, when the R, G, and B light emitting elements 4, 5, and 6 are energized, light is emitted from each of the light emitting layers. Although there is a component of light that goes down and to the side, light is emitted with the surface facing upward in FIG. 3 being the main light extraction surface because the sapphire substrate is transparent. Therefore, full-color light emission can be obtained by the respective light-emitting colors of the light-emitting elements 4, 5, and 6 of the three primary colors of R, G, and B light and a combination thereof.
【００３１】また、Ｓｉダイオード１を備えることによ
って、各発光素子４，５，６の静電破壊を防止でき、特
に静電耐圧が低いＧａＮ系半導体化合物を必須とするＢ
の発光素子６の耐久性も向上するので、Ｒ，Ｇ，Ｂの発
光素子４，５，６の組み合わせのフルカラー対応画素を
有効に利用した発光表示が可能となる。Further, the provision of the Si diode 1 can prevent the electrostatic breakdown of each of the light emitting elements 4, 5, and 6, and in particular, requires a GaN-based semiconductor compound having a low electrostatic withstand voltage.
Since the durability of the light-emitting element 6 is also improved, a light-emitting display that effectively utilizes the full-color-compatible pixels of the combination of the R, G, and B light-emitting elements 4, 5, and 6 can be performed.
【００３２】このように、Ｒ，Ｇ，Ｂの発光素子４，
５，６をそれぞれ凹部１ａ，１ｂ，１ｂ−１の中に落と
し込むように組み込むことによって、各発光素子４，
５，６どうしの間の光学的な干渉を受けることがない。
このため、各発光素子４，５，６に使用する材料のバン
ドギャップエネルギの違いによる光吸収が抑えられ、そ
れぞれの発光色がより一層鮮明化するとともに高い発光
出力が得られる。また、各凹部１ａ〜１ｂ−１の傾斜面
に設ける電極を利用した光の反射によって光を主光取出
し面方向へ反射させるので、発光輝度を更に向上させる
こともできる。As described above, the R, G, and B light emitting elements 4,
By incorporating the light emitting elements 4, 5 into the recesses 1a, 1b, 1b-1 respectively,
There is no optical interference between 5 and 6.
For this reason, light absorption due to the difference in band gap energy of the material used for each of the light emitting elements 4, 5, and 6 is suppressed, so that each emission color is further sharpened and a high emission output is obtained. Further, since light is reflected in the direction of the main light extraction surface by reflection of light using an electrode provided on the inclined surface of each of the recesses 1a to 1b-1, light emission luminance can be further improved.
【００３３】ここで、本発明においては、Ｓｉダイオー
ド１自身に配線パターン２ａ〜２ｃ及び電極３ａ〜３ｃ
を形成して、各発光素子４〜６を導通搭載する。すなわ
ち、Ｓｉダイオード1 を回路基板として兼用することが
できるので、このＳｉダイオード１に配線パターン２ａ
〜２ｃ及び電極３ａ〜３ｃを形成したものを予め作製し
ておけば、発光素子４〜６の搭載のチップ接合だけの工
程で済む。Here, in the present invention, the wiring patterns 2a to 2c and the electrodes 3a to 3c
Is formed, and each of the light emitting elements 4 to 6 is conductively mounted. That is, since the Si diode 1 can be used also as a circuit board, the wiring pattern 2a
2c and the electrodes 3a to 3c are prepared in advance, and only the process of chip bonding for mounting the light emitting elements 4 to 6 is required.
【００３４】また、発光素子４〜６はいずれも凹部１ａ
〜１ｂ−１の中に落とし込まれて、Ｓｉダイオード１の
表面から突き出ないように組み込まれるので、全体の高
さ寸法を小さくでき、最終的に製作される発光装置の薄
型化が可能となる。Each of the light emitting elements 4 to 6 has a concave portion 1a.
-1b-1 and incorporated so as not to protrude from the surface of the Si diode 1, so that the overall height dimension can be reduced and the light emitting device finally manufactured can be made thinner. .
【００３５】[0035]
【発明の効果】請求項１の発明では、静電気保護用のＳ
ｉダイオードが従来の回路基板を兼ねた部材とすること
ができるので、Ｓｉダイオードに発光素子を実装するだ
けのアセンブリで済み、従来の基板の上に静電気保護素
子を搭載し更にその上に発光素子を搭載する構造に比べ
ると製造歩留りが向上する。また、Ｓｉダイオードと発
光素子との積層なので、その高さ寸法も小さくなり発光
装置を薄型化することができる。According to the first aspect of the present invention, the S for static electricity protection is provided.
Since the i-diode can be a member that also serves as a conventional circuit board, an assembly that simply mounts the light-emitting element on the Si diode is sufficient, and the static electricity protection element is mounted on the conventional board, and the light-emitting element is further mounted thereon. The manufacturing yield is improved as compared with the structure in which the is mounted. Further, since the Si diode and the light emitting element are stacked, the height dimension is reduced, and the light emitting device can be made thin.
【００３６】請求項２の発明では、発光素子をＳｉダイ
オードの凹部の中に収めることで、Ｓｉダイオードと半
導体発光素子との積層高さを更に低くすることができ、
凹部の中に発光素子の全体が落ち込む構成とすれば、Ｓ
ｉダイオードだけの厚さの製品が得られる。According to the second aspect of the present invention, since the light emitting element is housed in the recess of the Si diode, the stack height of the Si diode and the semiconductor light emitting element can be further reduced.
If the configuration is such that the entire light emitting element falls into the concave portion, S
A product having a thickness of only the i-diode is obtained.
【図１】本発明の一実施の形態によるフルカラー半導体
発光装置を示す概略平面図FIG. 1 is a schematic plan view showing a full-color semiconductor light emitting device according to an embodiment of the present invention.
【図２】図１において発光素子を含む面で切った要部の
縦断面図FIG. 2 is a longitudinal sectional view of an essential part taken along a plane including a light emitting element in FIG.
【図３】青色発光用の発光素子の搭載構造の要部を示す
概略図FIG. 3 is a schematic view showing a main part of a mounting structure of a light emitting element for emitting blue light.
【図４】（ａ）はツェナーダイオードおよび発光素子を
複合素子化した従来例を示す概略側面図 （ｂ）は（ａ）の平面図FIG. 4 (a) is a schematic side view showing a conventional example in which a Zener diode and a light emitting element are combined, and FIG. 4 (b) is a plan view of FIG.
１ Ｓｉダイオード １ａ，１ｂ，１ｂ−１ 凹部 １ｃ ｎ型シリコン基板 １ｄ 酸化膜 １ｅ ｐ型半導体領域 １ｆ ｎ電極 １ｇ ｐ電極 ２ａ，２ｂ，２ｃ 配線パターン ３ａ，３ｂ，３ｃ 電極 ４ 発光素子 ５ 発光素子 ６ 発光素子 ６ａ サファイア基板 ６ｂ ｎ側電極 ６ｃ ｐ側電極 ６ｄ，６ｅ マイクロバンプ DESCRIPTION OF SYMBOLS 1 Si diode 1a, 1b, 1b-1 Concave part 1c n-type silicon substrate 1d oxide film 1ep p-type semiconductor region 1f n-electrode 1g p-electrode 2a, 2b, 2c Wiring pattern 3a, 3b, 3c electrode 4 Light-emitting element 5 Light-emitting element 6 Light emitting element 6a Sapphire substrate 6b n-side electrode 6c p-side electrode 6d, 6e Micro bump
Claims (2)
Ｓｉダイオードの上に導通搭載される赤，緑，青の各色
の半導体発光素子との組み合わせからなるフルカラーの
半導体発光装置であって、前記Ｓｉダイオードには、前
記半導体発光素子を外部の電気回路に導通接続させる回
路パターンを形成してなるフルカラー半導体発光装置。1. A full-color semiconductor light-emitting device comprising a combination of an Si diode for electrostatic protection and semiconductor light-emitting elements of red, green, and blue conductively mounted on the Si diode, A full-color semiconductor light-emitting device in which a diode is formed with a circuit pattern for electrically connecting the semiconductor light-emitting element to an external electric circuit.
体発光素子を落とし込んで搭載する凹部を形成してなる
請求項１記載のフルカラー半導体発光装置。2. The full-color semiconductor light emitting device according to claim 1, wherein the Si diode has a concave portion in which the semiconductor light emitting element of each color is dropped and mounted.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15730798A JP4042213B2 (en) | 1998-06-05 | 1998-06-05 | Full color semiconductor light emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15730798A JP4042213B2 (en) | 1998-06-05 | 1998-06-05 | Full color semiconductor light emitting device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11354836A true JPH11354836A (en) | 1999-12-24 |
| JP4042213B2 JP4042213B2 (en) | 2008-02-06 |
Family
ID=15646818
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15730798A Expired - Fee Related JP4042213B2 (en) | 1998-06-05 | 1998-06-05 | Full color semiconductor light emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4042213B2 (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002033410A (en) * | 2000-05-11 | 2002-01-31 | Mitsutoyo Corp | Function device unit and its manufacturing method |
| EP1587151A2 (en) | 2004-04-17 | 2005-10-19 | Lg Electronics Inc. | Semiconductor light emitting device and fabrication method thereof |
| JP2006186354A (en) * | 2004-12-15 | 2006-07-13 | Lg Electronics Inc | Zener diode, its manufacturing method and packaging method |
| KR100685504B1 (en) * | 2002-06-21 | 2007-02-27 | 어드밴스드 옵토일렉트로닉 테크놀로지 인코포레이티드 | Led package |
| JP2007535130A (en) * | 2003-12-09 | 2007-11-29 | クリー インコーポレイテッド | Semiconductor light emitting device and submount, and method for forming the same |
| WO2009001671A1 (en) * | 2007-06-22 | 2008-12-31 | Nippon Seiki Co., Ltd. | Printed wiring board |
| US7554126B2 (en) | 2004-09-27 | 2009-06-30 | Panasonic Corporation | Semiconductor light-emitting element, manufacturing method and mounting method of the same and light-emitting device |
| JP2010129728A (en) * | 2008-11-27 | 2010-06-10 | Kyocera Corp | Light-emitting device, and lighting system using the same |
| US8344973B2 (en) | 2006-04-05 | 2013-01-01 | Lg Display Co., Ltd. | Electrostatic discharge preventing apparatus for light emitting diodes for backlighting |
| JP2013034025A (en) * | 2006-02-28 | 2013-02-14 | Lg Electronics Inc | Light emitting device package and method of manufacturing the same |
-
1998
- 1998-06-05 JP JP15730798A patent/JP4042213B2/en not_active Expired - Fee Related
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4555504B2 (en) * | 2000-05-11 | 2010-10-06 | 株式会社ミツトヨ | Functional device unit and manufacturing method thereof |
| JP2002033410A (en) * | 2000-05-11 | 2002-01-31 | Mitsutoyo Corp | Function device unit and its manufacturing method |
| KR100685504B1 (en) * | 2002-06-21 | 2007-02-27 | 어드밴스드 옵토일렉트로닉 테크놀로지 인코포레이티드 | Led package |
| JP4870572B2 (en) * | 2003-12-09 | 2012-02-08 | クリー インコーポレイテッド | Semiconductor light emitting device and submount, and method for forming the same |
| JP2007535130A (en) * | 2003-12-09 | 2007-11-29 | クリー インコーポレイテッド | Semiconductor light emitting device and submount, and method for forming the same |
| EP1587151A3 (en) * | 2004-04-17 | 2011-09-28 | LG Electronics, Inc. | Semiconductor light emitting device and fabrication method thereof |
| US7408203B2 (en) | 2004-04-17 | 2008-08-05 | Lg Electronics Inc. | Light emitting device and fabrication method thereof and light emitting system using the same |
| US8008677B2 (en) | 2004-04-17 | 2011-08-30 | Lg Electronics Inc. | Light emitting device and fabrication method thereof and light emitting system using the same |
| EP1587151A2 (en) | 2004-04-17 | 2005-10-19 | Lg Electronics Inc. | Semiconductor light emitting device and fabrication method thereof |
| US8263996B2 (en) | 2004-04-17 | 2012-09-11 | Lg Electronics Inc. | Light emitting device and fabrication method thereof and light emitting system using the same |
| US7554126B2 (en) | 2004-09-27 | 2009-06-30 | Panasonic Corporation | Semiconductor light-emitting element, manufacturing method and mounting method of the same and light-emitting device |
| JP2006186354A (en) * | 2004-12-15 | 2006-07-13 | Lg Electronics Inc | Zener diode, its manufacturing method and packaging method |
| JP2013034025A (en) * | 2006-02-28 | 2013-02-14 | Lg Electronics Inc | Light emitting device package and method of manufacturing the same |
| US8344973B2 (en) | 2006-04-05 | 2013-01-01 | Lg Display Co., Ltd. | Electrostatic discharge preventing apparatus for light emitting diodes for backlighting |
| KR101248457B1 (en) * | 2006-04-05 | 2013-03-28 | 엘지디스플레이 주식회사 | Backlight inculding electro static discharge protection circuit for light emitting diodes |
| WO2009001671A1 (en) * | 2007-06-22 | 2008-12-31 | Nippon Seiki Co., Ltd. | Printed wiring board |
| JP2009004612A (en) * | 2007-06-22 | 2009-01-08 | Nippon Seiki Co Ltd | Printed wiring board |
| JP2010129728A (en) * | 2008-11-27 | 2010-06-10 | Kyocera Corp | Light-emitting device, and lighting system using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4042213B2 (en) | 2008-02-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9741640B2 (en) | Semiconductor device | |
| US7514720B2 (en) | White light emitting device | |
| US5557115A (en) | Light emitting semiconductor device with sub-mount | |
| US9793453B2 (en) | Light emitting device | |
| US8384091B2 (en) | Thin film light emitting diode | |
| US7420217B2 (en) | Thin film LED | |
| US10431567B2 (en) | White ceramic LED package | |
| JP3627822B2 (en) | Semiconductor light emitting device and manufacturing method thereof | |
| JP2001298216A (en) | Surface-mounting semiconductor light-emitting device | |
| JP3893735B2 (en) | Light emitting device | |
| JP2001217461A (en) | Compound light-emitting device | |
| JP4042213B2 (en) | Full color semiconductor light emitting device | |
| JP2002270905A (en) | Composite light emitting device | |
| JP3911839B2 (en) | Semiconductor light emitting device | |
| JPH11214747A (en) | Semiconductor light-emitting device | |
| KR20020026619A (en) | Light-emitting compound semiconductor divice and method of manufacturing the same | |
| KR102161006B1 (en) | Semiconductor light emitting device and method for manufacturing the same | |
| US20220209088A1 (en) | Light emitting device package | |
| JP3938337B2 (en) | Semiconductor light emitting device and manufacturing method thereof | |
| US20220069184A1 (en) | Semiconductor light emitting device and method for manufacturing the same | |
| JP3938350B2 (en) | Mounting method of semiconductor light emitting device | |
| WO2013027413A1 (en) | Protection element and light emitting device using same | |
| KR101806789B1 (en) | Semiconductor light emitting device | |
| KR101806790B1 (en) | Semiconductor light emitting device | |
| JPH10190063A (en) | Semiconductor light emitting element and semiconductor light emitting device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040906 |
|
| RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20041014 |
|
| RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20050627 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070314 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070327 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070517 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20071023 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20071105 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101122 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111122 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121122 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121122 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131122 Year of fee payment: 6 |
|
| LAPS | Cancellation because of no payment of annual fees |