JPH11330343A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH11330343A JPH11330343A JP15074698A JP15074698A JPH11330343A JP H11330343 A JPH11330343 A JP H11330343A JP 15074698 A JP15074698 A JP 15074698A JP 15074698 A JP15074698 A JP 15074698A JP H11330343 A JPH11330343 A JP H11330343A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- resin
- mounting surface
- semiconductor device
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は樹脂封止型半導体装
置に係り、特にリードの実装面を封止樹脂の外部に露出
させた樹脂封止型半導体装置の構造に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device, and more particularly to a structure of a resin-sealed semiconductor device in which a mounting surface of a lead is exposed outside a sealing resin.
【０００２】[0002]
【従来の技術】近年、携帯電話などのマルチメディア電
子機器の普及に伴い、それらに使用される半導体装置も
より一層の小型化が要求されている。この要求を満たす
ものとして、ＳＯＮ(Small Outline Non-lead Package)
やＱＦＮ(Quad Flat Non-leadPackage)と指称される半
導体装置が注目されている。これらの半導体装置は、従
来のリードフレームをそのまま利用することができるの
で、比較的低コストに製作できるという利点がある。2. Description of the Related Art In recent years, with the spread of multimedia electronic devices such as mobile phones, further miniaturization of semiconductor devices used for them has been demanded. To satisfy this requirement, SON (Small Outline Non-lead Package)
A semiconductor device called QFN (Quad Flat Non-lead Package) has attracted attention. These semiconductor devices have the advantage that they can be manufactured at a relatively low cost because a conventional lead frame can be used as it is.
【０００３】図４にＱＦＮ型半導体装置の一例を示す。
ここで示す半導体装置１においては、半導体素子搭載部
２はリード３と同一材料からプレスまたはエッチング加
工によって一体的に形成されており、また半導体素子搭
載部２は、リード３の実装面３ａに対して高さ方向に段
差をなして形成されている。この半導体素子搭載部２の
リード３の実装面３ａに面する側に半導体素子４がＡｇ
ペーストなどの接着剤によって固着される。FIG. 4 shows an example of a QFN type semiconductor device.
In the semiconductor device 1 shown here, the semiconductor element mounting portion 2 is integrally formed by pressing or etching from the same material as the lead 3, and the semiconductor element mounting portion 2 is mounted on the mounting surface 3 a of the lead 3. It is formed with a step in the height direction. The semiconductor element 4 is made of Ag on the side of the semiconductor element mounting portion 2 facing the mounting surface 3a of the lead 3.
It is fixed by an adhesive such as a paste.
【０００４】また、リード３の一端部のワイヤボンディ
ング面３ｂは、他端部である実装面３ａに対して上方に
変位されており、このワイヤボンディング面３ｂと半導
体素子４の電極パッドとがボンディングワイヤ５によっ
て電気的に接続される。その後半導体素子搭載部２、半
導体素子４、ボンディングワイヤ５及びリード３のワイ
ヤボンディング面３ｂを封止樹脂６によって封止し、半
導体装置１が形成される。The wire bonding surface 3b at one end of the lead 3 is displaced upward with respect to the mounting surface 3a at the other end, and the wire bonding surface 3b and the electrode pad of the semiconductor element 4 are bonded. They are electrically connected by wires 5. Thereafter, the semiconductor element mounting portion 2, the semiconductor element 4, the bonding wires 5, and the wire bonding surfaces 3b of the leads 3 are sealed with the sealing resin 6, and the semiconductor device 1 is formed.
【０００５】なお、ここでリード３の実装面３ａは樹脂
封止されず、封止樹脂６の底面に露出するような構成と
なっている。この実装面３ａは、半導体装置１と図示し
ない実装基板の配線パターンとの接続面となる。[0005] Here, the mounting surface 3a of the lead 3 is not resin-sealed, but is exposed on the bottom surface of the sealing resin 6. The mounting surface 3a serves as a connection surface between the semiconductor device 1 and a wiring pattern of a mounting board (not shown).
【０００６】このような構成の半導体装置１によれば、
従来のリードフレームを流用しつつも、一層の小型化及
び薄型化を図ることが可能となり、また実装面のリード
のばらつきを抑制することができるため、実装不良を低
減することができる。According to the semiconductor device 1 having such a configuration,
It is possible to further reduce the size and thickness while diverting the conventional lead frame, and it is possible to suppress variations in leads on the mounting surface, thereby reducing mounting defects.
【０００７】[0007]
【発明が解決しようとする課題】しかし前述したＱＦＮ
型の半導体装置１においては、封止樹脂６の底面とリー
ド３の実装面３ａとの境界部７がフラットであり、また
リード３の実装面３ａは曲げ加工によって形成されるた
め、曲げ加工時の引っ張り応力により、リード３の封止
樹脂６との境界部７に位置する箇所は、図４に示すよう
にＲ部となる。このため樹脂封止工程の際、図３に示す
ように、リード３の封止樹脂６との境界部７に位置する
Ｒ部から、封止樹脂６がリード３の実装面３ａに流れ出
してしまうことがある。However, the above-mentioned QFN
In the semiconductor device 1 of the mold, the boundary 7 between the bottom surface of the sealing resin 6 and the mounting surface 3a of the lead 3 is flat, and the mounting surface 3a of the lead 3 is formed by bending. Due to the tensile stress, the portion of the lead 3 located at the boundary 7 with the sealing resin 6 becomes an R portion as shown in FIG. Therefore, at the time of the resin sealing step, as shown in FIG. Sometimes.
【０００８】このように実装面３ａに封止樹脂６が流れ
出してしまうと、例えば半導体装置１を図示しない実装
基板に接合する際の接合材として半田を使用した場合
に、半田のぬれ不良が発生し、これにより半導体装置１
と実装基板との電気的接続が損なわれ、製品の品質を低
下させる大きな原因となってしまっていた。また接合材
として半田以外の材料を使用した場合にも、封止樹脂６
の実装面３ａへの流れ出しによって実装面３ａの実装面
積が縮小することにより、同じく実装不良が頻発してい
た。If the sealing resin 6 flows out onto the mounting surface 3a in this manner, for example, when solder is used as a bonding material when the semiconductor device 1 is bonded to a mounting substrate (not shown), poor wetting of the solder occurs. And thereby the semiconductor device 1
The electrical connection between the board and the mounting board has been impaired, which has been a major cause of lowering product quality. Also, when a material other than solder is used as the bonding material, the sealing resin 6 may be used.
As a result, the mounting area of the mounting surface 3a is reduced by flowing out to the mounting surface 3a.
【０００９】[0009]
【課題を解決するための手段】上記の問題点を解決する
ために、本発明は、リードの露出部の封止樹脂との境界
部近傍に樹脂の流れ止め部を設けることにより、リード
の実装面への封止樹脂の流れ出しを防止するようにして
いる。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a method for mounting a lead by providing a resin flow stopping portion near a boundary between an exposed portion of the lead and a sealing resin. The sealing resin is prevented from flowing to the surface.
【００１０】[0010]
【発明の実施の形態】本発明は、半導体装置のリードの
露出部の封止樹脂との境界部近傍に凹部を形成したもの
である。DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a concave portion is formed in the vicinity of a boundary between an exposed portion of a lead of a semiconductor device and a sealing resin.
【００１１】上記凹部を形成する箇所は、リード露出部
の実装面の実装面積を十分に確保できる箇所ならばどこ
でも良い。また凹部の断面形状も、例えばＶ字形状、Ｕ
字形状とするなど、適宜選択可能であり、更に凹部の幅
及び深さも適宜設定することができる。なお、凹部はリ
ードの幅方向に貫通させて形成するのが望ましい。ま
た、凹部を複数設けるようにしてもよい。The recess may be formed anywhere as long as the mounting area of the mounting surface of the lead exposed portion can be sufficiently secured. Also, the cross-sectional shape of the recess is, for example, V-shaped, U-shaped.
The width and the depth of the concave portion can be appropriately set, such as a letter shape. It is desirable that the recess be formed so as to penetrate in the width direction of the lead. Further, a plurality of concave portions may be provided.
【００１２】[0012]
【実施例】以下、本発明の半導体装置及びその製造方法
について、図面を参照して説明する。なお、従来と同一
の箇所については同一の符号を使用して説明する。図１
は本発明の半導体装置を示す断面図である。本実施例の
半導体装置１ａにおいては、半導体素子搭載部２は、従
来同様に、Ａ１９４などの銅系合金やＡ４２などの鉄系
合金など、リード３と同一材料からプレスまたはエッチ
ング加工によって一体的に形成される。なお本実施例に
おいては、この半導体素子搭載部２及びリード３の形成
工程と同時に、リード３の実装面３ａの封止樹脂との境
界部近傍に対応する箇所に、断面Ｖ字形状の溝状の凹部
が、プレスまたはハーフエッチング加工により、リード
３の幅方向に貫通するように形成されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device and a method of manufacturing the same according to the present invention will be described below with reference to the drawings. The same parts as those in the related art will be described using the same reference numerals. FIG.
1 is a sectional view showing a semiconductor device of the present invention. In the semiconductor device 1a of the present embodiment, the semiconductor element mounting portion 2 is integrally formed by pressing or etching from the same material as the lead 3, such as a copper alloy such as A194 or an iron alloy such as A42, as in the related art. It is formed. In this embodiment, at the same time as the step of forming the semiconductor element mounting portion 2 and the lead 3, a V-shaped cross-sectional groove is formed at a position corresponding to the vicinity of the boundary between the mounting surface 3 a of the lead 3 and the sealing resin. Are formed so as to penetrate in the width direction of the lead 3 by pressing or half etching.
【００１３】次に、半導体素子搭載部２をディプレスな
どによってリード３の実装面３ａに対して上方に変位さ
せるとともに、リード３の一端部のワイヤボンディング
面３ｂも、プレスによる曲げ加工などによって上方に変
形させる。そしてこの半導体素子搭載部２のリード３の
実装面３ａに面する側に、半導体素子４をＡｇペースト
などの接着剤によって固着し、その後半導体素子４の電
極パッドとリード３のワイヤボンディング面３ｂとを、
Ａｕ、Ａｌ線などからなるボンディングワイヤ５によっ
て電気的に接続する。Next, the semiconductor element mounting section 2 is displaced upward with respect to the mounting surface 3a of the lead 3 by depressing or the like, and the wire bonding surface 3b at one end of the lead 3 is also bent upward by pressing or the like. To be deformed. Then, the semiconductor element 4 is fixed to the side of the semiconductor element mounting portion 2 facing the mounting surface 3a of the lead 3 with an adhesive such as Ag paste, and then the electrode pad of the semiconductor element 4 and the wire bonding surface 3b of the lead 3 are connected. To
Electrical connection is made by a bonding wire 5 made of Au, Al wire or the like.
【００１４】それから半導体素子搭載部２、半導体素子
４、ボンディングワイヤ５及びリード３のワイヤボンデ
ィング面３ｂをエポキシなどの封止樹脂６によって封止
する。なお、ここでリード３の実装面３ａは、半導体装
置１ａと図示しない実装基板の配線パターンとの接続面
とするために、従来同様樹脂封止されず、封止樹脂６の
底面に露出するような構成となっている。なお、実装面
３ａと封止樹脂６の底面との境界部７はフラットになる
よう設定されており、更にリード３の封止樹脂６との境
界部７に位置する箇所はＲ部となっている。Then, the semiconductor element mounting portion 2, the semiconductor element 4, the bonding wires 5, and the wire bonding surfaces 3b of the leads 3 are sealed with a sealing resin 6 such as epoxy. Here, the mounting surface 3a of the lead 3 is not resin-encapsulated as in the conventional case, but is exposed on the bottom surface of the encapsulating resin 6 in order to be a connection surface between the semiconductor device 1a and a wiring pattern of a mounting board (not shown). Configuration. The boundary 7 between the mounting surface 3a and the bottom surface of the sealing resin 6 is set to be flat, and the portion of the lead 3 located at the boundary 7 with the sealing resin 6 is an R portion. I have.
【００１５】ここで本発明においては、リード３の実装
面３ａの封止樹脂６との境界部７近傍に対応する箇所
に、樹脂封止工程に先立って凹部８が形成されているの
で、樹脂封止工程の際に、境界部７に位置するリード３
のＲ部から封止樹脂６が実装面３側に流れ出してしまう
ような場合にも、図２に示すように、この凹部８が樹脂
の流れ止めとして機能するため、実装面３ａへの封止樹
脂６の流れ出しを防止することができる。In the present invention, since the recess 8 is formed at a location corresponding to the vicinity of the boundary 7 between the mounting surface 3a of the lead 3 and the sealing resin 6 prior to the resin sealing step, In the sealing process, the lead 3 located at the boundary 7
In the case where the sealing resin 6 flows out from the R portion to the mounting surface 3 side, as shown in FIG. 2, since the concave portion 8 functions as a resin stop, the sealing to the mounting surface 3a is performed. The outflow of the resin 6 can be prevented.
【００１６】なお、本実施例においては、凹部８の形成
を半導体素子搭載部２及びリード３の形成と同時に行っ
たが、これらの形成前または後に行ってもよい。また本
実施例においては、４方向に伸長するリード３の実装面
３ａを底面に露出したＱＦＮ型半導体装置１ａについて
説明したが、これは例えばＳＯＮ型半導体装置などにも
適用可能であることは言うまでもないし、更に本発明は
リードを封止樹脂の側面または上面に露出した半導体装
置にも適用可能である。In this embodiment, the recess 8 is formed simultaneously with the formation of the semiconductor element mounting portion 2 and the lead 3, but may be formed before or after the formation. Further, in this embodiment, the QFN type semiconductor device 1a in which the mounting surface 3a of the lead 3 extending in four directions is exposed on the bottom surface has been described, but it is needless to say that this is applicable to, for example, an SON type semiconductor device. In addition, the present invention is also applicable to a semiconductor device in which a lead is exposed on a side surface or an upper surface of a sealing resin.
【００１７】[0017]
【発明の効果】本発明は、以上説明したような形態で実
施され、以下に記載されるような効果を奏する。The present invention is embodied in the form described above and has the following effects.
【００１８】リードの露出部の封止樹脂との境界部近傍
に凹部を設けることにより、リードの実装面への封止樹
脂の流れ出しを防止することができるので、リードの実
装面の実装面積を十分に確保することが可能となり、よ
って実装不良がなく信頼性の高い半導体装置を得ること
ができる。By providing a concave portion near the boundary between the exposed portion of the lead and the sealing resin, it is possible to prevent the sealing resin from flowing out to the mounting surface of the lead, so that the mounting area of the mounting surface of the lead is reduced. Sufficient security can be obtained, and a highly reliable semiconductor device without mounting defects can be obtained.
【図１】本発明の半導体装置を示す断面図。FIG. 1 is a cross-sectional view illustrating a semiconductor device of the present invention.
【図２】本発明の半導体装置を示す底面図。FIG. 2 is a bottom view showing the semiconductor device of the present invention.
【図３】従来の半導体装置を示す底面図。FIG. 3 is a bottom view showing a conventional semiconductor device.
【図４】従来の半導体装置を示す断面図。FIG. 4 is a cross-sectional view illustrating a conventional semiconductor device.
１、１ａ 半導体装置 ２ 半導体素子搭載部 ３ リード ３ａ 実装面 ３ｂ ワイヤボンディング面 ４ 半導体素子 ５ ボンディングワイヤ ６ 封止樹脂 ７ 境界部 ８ 凹部 DESCRIPTION OF SYMBOLS 1, 1a Semiconductor device 2 Semiconductor element mounting part 3 Lead 3a Mounting surface 3b Wire bonding surface 4 Semiconductor element 5 Bonding wire 6 Sealing resin 7 Boundary part 8 Depression
Claims (1)
してなる樹脂封止型半導体装置において、前記リードの
露出部の封止樹脂との境界部近傍に凹部が形成されてな
ることを特徴とする樹脂封止型半導体装置。1. A resin-encapsulated semiconductor device in which a mounting surface of a lead is exposed outside a sealing resin, wherein a recess is formed near a boundary between the exposed portion of the lead and the sealing resin. A resin-sealed semiconductor device characterized by the above-mentioned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15074698A JP3424184B2 (en) | 1998-05-13 | 1998-05-13 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15074698A JP3424184B2 (en) | 1998-05-13 | 1998-05-13 | Resin-sealed semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11330343A true JPH11330343A (en) | 1999-11-30 |
| JP3424184B2 JP3424184B2 (en) | 2003-07-07 |
Family
ID=15503524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15074698A Expired - Fee Related JP3424184B2 (en) | 1998-05-13 | 1998-05-13 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3424184B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002291196A (en) * | 2001-03-26 | 2002-10-04 | Matsushita Electric Ind Co Ltd | Surface mount motor and electronic equipment having the same |
| US6838315B2 (en) | 2000-08-30 | 2005-01-04 | Renesas Technology Corporation | Semiconductor device manufacturing method wherein electrode members are exposed from a mounting surface of a resin encapsulator |
| US6893898B2 (en) | 2002-06-07 | 2005-05-17 | Renesas Technology Corp. | Semiconductor device and a method of manufacturing the same |
| JP2014027045A (en) * | 2012-07-25 | 2014-02-06 | Denso Corp | Semiconductor device |
-
1998
- 1998-05-13 JP JP15074698A patent/JP3424184B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6838315B2 (en) | 2000-08-30 | 2005-01-04 | Renesas Technology Corporation | Semiconductor device manufacturing method wherein electrode members are exposed from a mounting surface of a resin encapsulator |
| JP2002291196A (en) * | 2001-03-26 | 2002-10-04 | Matsushita Electric Ind Co Ltd | Surface mount motor and electronic equipment having the same |
| US6893898B2 (en) | 2002-06-07 | 2005-05-17 | Renesas Technology Corp. | Semiconductor device and a method of manufacturing the same |
| JP2014027045A (en) * | 2012-07-25 | 2014-02-06 | Denso Corp | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3424184B2 (en) | 2003-07-07 |
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