JPH1126640A - Ceramic-metal composite circuit board - Google Patents
Ceramic-metal composite circuit boardInfo
- Publication number
- JPH1126640A JPH1126640A JP18891497A JP18891497A JPH1126640A JP H1126640 A JPH1126640 A JP H1126640A JP 18891497 A JP18891497 A JP 18891497A JP 18891497 A JP18891497 A JP 18891497A JP H1126640 A JPH1126640 A JP H1126640A
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- circuit board
- less
- composite circuit
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
Landscapes
- Ceramic Products (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は回路上の半導体素子
からの発熱量を回路から効率よく除去できるセラミック
ス−金属複合回路基板を提供することを目的とする。BACKGROUND OF THE INVENTION An object of the present invention is to provide a ceramic-metal composite circuit board capable of efficiently removing heat generated from a semiconductor element on a circuit from the circuit.
【０００２】[0002]
【従来の技術】従来、セラミックス部材と金属部材とを
接合する方法として、これらの両部材を直接接触させて
接合する直接接合法やセラミックス部材と金属部材との
間に中間層を介在させて接合する中間材法が実用化され
ている。このうち直接接合法としては、例えばアルミナ
基板と銅板とを不活性雰囲気中において直接接触させ、
これを加熱・冷却することにより接合体を得る方法（Ｕ
ＳＰ４８１１８９３号等）が知られている。2. Description of the Related Art Conventionally, as a method of joining a ceramic member and a metal member, a direct joining method in which the two members are brought into direct contact with each other or a joint by interposing an intermediate layer between the ceramic member and the metal member. An intermediate material method has been put to practical use. Among them, as a direct bonding method, for example, an alumina substrate and a copper plate are brought into direct contact in an inert atmosphere,
A method of obtaining a joined body by heating and cooling this (U
SP48111893) is known.
【０００３】一方、中間材法としては、活性金属法やメ
タライズ法等があり、この内活性金属法は、ＴｉやＺｒ
等の第ＩＶ族元素または第ＩＶ族元素を含む合金を中間
材とし、この中間材をセラミックス部材と金属部材との
間に挟んで接合する方法である。例えば、窒化ケイ素と
ステンレスとの接合においてはＡｇ−Ｃｕ−Ｔｉ系合金
をアルミナと銅との接合にはＣｕ−Ｔｉ系合金を中間材
として用いていた。On the other hand, as an intermediate material method, there are an active metal method, a metallizing method, and the like.
In this method, a group IV element or an alloy containing a group IV element is used as an intermediate material, and the intermediate material is sandwiched between a ceramic member and a metal member for joining. For example, an Ag-Cu-Ti alloy has been used as an intermediate material for bonding silicon nitride and stainless steel, and a Cu-Ti alloy has been used as an intermediate material for bonding alumina and copper.
【０００４】[0004]
【発明が解決しようとする課題】然しながら、近年、半
導体装置を含む電子機器のより小型化に伴い内部に設置
される半導体素子自体の高集積化及び高出力化が求めら
れ、この結果、動作時における半導体素子からの発熱量
も増大するという問題が発生してきた。However, in recent years, as electronic devices including semiconductor devices have become smaller, higher integration and higher output of semiconductor elements installed therein have been demanded. However, there has been a problem that the amount of heat generated from the semiconductor element in the above also increases.
【０００５】本発明は上述のような従来の技術上の問題
点を解決し、放熱性の劣化や重量の増大がなく、パター
ンサイズの変更や基板面積の増大を行なわなくとも熱抵
抗を小さくする為回路用金属板とセラミックス基板との
接合界面のボイド（空洞）を極力小さく抑え、半導体素
子からの発熱量を効率よく逃し得る新規なセラミックス
−金属複合回路基板を開発することを目的とするもので
ある。SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems in the prior art, does not deteriorate heat dissipation and does not increase the weight, and reduces the thermal resistance without changing the pattern size or increasing the substrate area. The purpose of this study is to develop a new ceramic-metal composite circuit board that can minimize the voids (cavities) at the bonding interface between the circuit metal plate and the ceramic substrate and minimize the amount of heat generated by the semiconductor element. It is.
【０００６】[0006]
【課題を解決するための手段】本発明者等は斯かる課題
を解決するために鋭意研究したところ、セラミックス基
板と金属板との接合界面のボイド（空洞）率及び直径を
制御することによって半導体素子からの発生熱を問題な
く逃し得ることを見い出し、本発明を提供することがで
きた。Means for Solving the Problems The inventors of the present invention have made intensive studies to solve the above-mentioned problems, and found that the semiconductor material is controlled by controlling the void (cavity) ratio and the diameter of the bonding interface between the ceramic substrate and the metal plate. It has been found that heat generated from the element can be released without any problem, and the present invention has been provided.
【０００７】即ち、本発明の第１は、セラミックス基板
とその少なくとも一方の主面上に接合された金属板とか
らなり、少なくとも該金属板上の半導体搭載部分の接合
界面における単位面積当りのボイドの率が１．５％以
下、且つ、直径０．７ｍｍ以下、好ましくは０．５ｍｍ
以下であることを特徴とするセラミックス−金属複合回
路基板である。That is, a first aspect of the present invention is to provide a ceramic substrate and a metal plate bonded on at least one main surface thereof, and at least a void per unit area at a bonding interface of a semiconductor mounting portion on the metal plate. Is 1.5% or less, and the diameter is 0.7 mm or less, preferably 0.5 mm
A ceramic-metal composite circuit board characterized by the following.
【０００８】本発明の第２は、上記接合がセラミックス
基板と金属板の直接接合である場合においては、セラミ
ックス基板表面のうねりが表面粗さ計で１５μｍ／２０
ｍｍ以下であるセラミックス基板を用いることを特徴と
するものである。A second aspect of the present invention is that, when the above-mentioned joining is a direct joining between a ceramic substrate and a metal plate, the undulation of the ceramic substrate surface is measured by a surface roughness meter of 15 μm / 20.
mm or less is used.
【０００９】本発明の第３は、上記接合がセラミックス
基板と金属板の活性金属ろう接合である場合において、
Ｔｉ，Ｚｒ，Ｈｆ，Ｎｂから選択される少なくとも１種
以上の活性金属を含有するろう材を介して接合すること
を特徴とするものである。A third aspect of the present invention is that, in the case where the joining is an active metal brazing joint between a ceramic substrate and a metal plate,
The bonding is performed via a brazing material containing at least one or more active metals selected from Ti, Zr, Hf, and Nb.
【００１０】本発明の第４は、上記セラミックス基板
は、Ａｌ2 Ｏ3 ，ＡｌＮ，ＢｅＯ，ＳｉＣ，Ｓｉ
3 Ｎ4 ，ＺｒＯ2 から選択される少なくとも１種のセラ
ミックス基板であることを特徴とするものである。A fourth aspect of the present invention is that the ceramic substrate is made of Al 2 O 3 , AlN, BeO, SiC, Si
3 is characterized in that N 4, is at least one ceramic substrate selected from ZrO 2.
【００１１】本発明の第５は、上記接合がセラミックス
基板と金属板の接合である場合において、６００℃以上
で２時間以上加熱処理することによって、バインダー中
のカーボンが除去されていることを特徴とするものであ
る。A fifth feature of the present invention is that, in the case where the above-mentioned joining is joining of a ceramic substrate and a metal plate, carbon in the binder is removed by heat treatment at 600 ° C. or more for 2 hours or more. It is assumed that.
【００１２】（作用）(Action)
【００１３】本発明で用いられるセラミックス−金属複
合回路基板は、セラミックス部材としてＡｌ2 Ｏ3 ，Ａ
ｌＮ，ＢｅＯ，ＳｉＣ，Ｓｉ3 Ｎ4 ，ＺｒＯ2 から選ば
れる少なくとも１種の部材であり、一方、金属板として
は銅、アルミニウム等の導電特性に優れた部材である。The ceramic-metal composite circuit board used in the present invention has a ceramic member of Al 2 O 3 , A
It is at least one member selected from the group consisting of 1N, BeO, SiC, Si 3 N 4 , and ZrO 2 , while the metal plate is a member having excellent conductive properties such as copper and aluminum.
【００１４】本発明において、セラミックス部材として
アルミナ基板を用いる場合においては、基板表面のうね
りを表面粗さ計で測定して１５μｍ／２０ｍｍ以下であ
ることを要する。逆にこの数値より多い場合には、ボイ
ド（空洞）の最大径が大きくなると共に、径１００μｍ
以上のボイド数も増え、結果として単位面積当たりのボ
イド率が比例して増えるためである。In the present invention, when an alumina substrate is used as the ceramic member, it is necessary that the undulation of the substrate surface is 15 μm / 20 mm or less as measured by a surface roughness meter. On the other hand, when the value is larger than this value, the maximum diameter of the void (cavity) increases and the diameter is 100 μm.
This is because the number of voids also increases, and as a result, the void ratio per unit area increases in proportion.
【００１５】また、セラミックス部材として上記のアル
ミナ基板に代え窒化アルミニウム基板や炭化珪素基板等
を用いる場合には、活性金属としてＴｉ，Ｚｒ，Ｈｆ，
Ｎｂから選ばれる少なくとも１種を含有するＡｇ−Ｃｕ
系ろう材を介して接合するが、この場合、ろう材をペー
スト化して塗布する方法で行なわれる。When an aluminum nitride substrate, a silicon carbide substrate, or the like is used instead of the alumina substrate as the ceramic member, Ti, Zr, Hf,
Ag-Cu containing at least one selected from Nb
Joining is performed through a brazing material. In this case, the brazing material is formed into a paste and applied.
【００１６】上記ろう材をペースト化するには、ろう材
の混合粉末に有機溶剤（テルピネオール、ＢＣＡ、ＤＢ
Ｐ、メチルセルソルブ等）や有機結合剤（エチルセルソ
ーズ等）を所定量配合してペーストとしている。このペ
ーストをセラミックス基板上にスクリーン印刷してその
上に金属板を接合するが、この場合、加熱炉中で加熱す
ると温度や時間によってバインダーの除去、特にバイン
ダー中に含有されるカーボンの除去量に変化があること
を発見した。In order to make the brazing material into a paste, an organic solvent (terpineol, BCA, DB) is added to the mixed powder of the brazing material.
P, methylcellosolve, etc.) and an organic binder (ethylcelloses, etc.) are blended in predetermined amounts to form a paste. This paste is screen-printed on a ceramic substrate and a metal plate is bonded on it. In this case, when the paste is heated in a heating furnace, the removal of the binder, especially the amount of carbon contained in the binder, depends on the temperature and time. Discovered that there was a change.
【００１７】加熱炉中の温度域を５５０℃，６００℃，
６５０℃と３段階に分けて夫々保持時間を変えたものの
ボイドを調べたところ、５５０℃での脱バインダー温度
ではボイド径の大きいものが見られるのに対し、脱バイ
ンダー温度が上昇するに従ってこの径が小さくなり、更
に同一温度でも保持時間を長くして脱バインダー処理を
行なって、バインダー中のカーボンを除去すると同様に
ボイド径が小さくなり、結果として単位面積当たりのボ
イド率が低下することが測定できた。The temperature range in the heating furnace is 550 ° C., 600 ° C.,
When the retention time was changed in three stages at 650 ° C., and the retention time was changed, voids were examined at a debinding temperature of 550 ° C., whereas a void having a large void diameter was observed. Even if the temperature is the same, the retention time is extended and the binder is removed to remove the carbon in the binder. Similarly, the void diameter is reduced, and as a result, the void ratio per unit area is reduced. did it.
【００１８】加熱炉の中の温度域を６００℃以下にした
場合は、ボイド径の大きいものが見られるのに対し、６
００℃以上では径の小さいものが多い。また、保持時間
についても２時間以下ではボイド径が大きいものが見ら
れるのに対し、２時間以上では小さいものが多い。この
結果、６００℃以上で２時間以上の加熱処理することに
よって、ボイド径が０．７ｍｍ以下となり、結果として
単位面積当たりのボイド率を低下することが測定でき
た。When the temperature range in the heating furnace is set to 600 ° C. or less, a large void diameter is observed, whereas
If the temperature is higher than 00 ° C., the diameter is often small. Regarding the holding time, those having a large void diameter are seen when the holding time is 2 hours or less, whereas those having a small void diameter are often found when the holding time is 2 hours or more. As a result, it was measured that by performing the heat treatment at 600 ° C. or more for 2 hours or more, the void diameter was reduced to 0.7 mm or less, and as a result, the void ratio per unit area was reduced.
【００１９】[0019]
【発明の実施の形態】以下実施例により本発明法を更に
詳細に説明するが、本発明の範囲は以下の実施例により
制限されものではない。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in more detail with reference to the following examples, but the scope of the present invention is not limited by the following examples.
【００２０】（実施例１）(Embodiment 1)
【００２１】先ず、金属部材として厚さ０．３ｍｍの回
路側用の銅板と、厚さ０．２５ｍｍのヒートシンク側用
の銅板とを用意し、セラミックス部材として３０×５０
×０．６３５ｍｍの大きさである表面のうねり幅の異な
るアルミナ基板を用意した。次いで、用意したアルミナ
基板の両主面に銅板を接触配置し、これを不活性ガス雰
囲気中において加熱及び冷却して接合体を得た後、所定
の回路形状にエッチング処理して目的とする金属−セラ
ミックス複合回路基板を得た。First, a copper plate for the circuit side having a thickness of 0.3 mm and a copper plate for the heat sink side having a thickness of 0.25 mm were prepared as metal members.
An alumina substrate having a size of 0.635 mm and having a different waviness width on the surface was prepared. Next, a copper plate is placed in contact with both main surfaces of the prepared alumina substrate, heated and cooled in an inert gas atmosphere to obtain a joined body, and then etched into a predetermined circuit shape to perform a desired metal etching. -A ceramic composite circuit board was obtained.
【００２２】これらの金属−セラミックス複合回路基板
のうち、Ｓｉチップ等の半導体素子を搭載する部分の回
路用銅板とアルミナ基板との接合界面を日立建機製の超
音波探傷装置（ｍｉ−ｓｃｏｐｅ−ｉ）を用いてボイド
最大径、１５ｃｍ2 当たりの径１００μｍ以上のボイド
数及びボイド率を夫々測定し、これらの結果を表１に併
せて示した。なお、超音波探傷装置で得られたボイドの
画像は、実際のボイド箇所の切断面観察で得られたボイ
ド径と一致するように超音波探傷条件を設定した。Of these metal-ceramic composite circuit boards, a bonding interface between a circuit copper plate and an alumina substrate at a portion where a semiconductor element such as a Si chip is mounted is connected to an ultrasonic flaw detector (mi-scope-i manufactured by Hitachi Construction Machinery). ) Was used to measure the maximum void diameter, the number of voids having a diameter of 100 μm or more per 15 cm 2 , and the void fraction, and the results are shown in Table 1. The ultrasonic flaw detection conditions were set so that the image of the void obtained by the ultrasonic flaw detector was equal to the void diameter obtained by observing the actual cut surface of the void.
【００２３】[0023]
【表１】 [Table 1]
【００２４】上記表１において、試料ＮＯ．６以外のも
のは好ましいものである。In Table 1 above, sample No. Those other than 6 are preferred.
【００２５】（実施例２）(Embodiment 2)
【００２６】金属部材として厚さ０．３ｍｍの回路側用
の銅板と、厚さ０．２５ｍｍのヒートシンク側用の銅板
とを用意し、セラミックス部材として３０×５０×０．
６３５ｍｍの窒化アルミニウム基板に予めＡｇ−Ｃｕ−
Ｔｉ系のペーストろう材をスクリーン印刷して乾燥した
ものを９枚用意した。A copper plate for the circuit side having a thickness of 0.3 mm and a copper plate for the heat sink side having a thickness of 0.25 mm were prepared as metal members, and 30 × 50 × 0.
Ag-Cu- on a 635 mm aluminum nitride substrate
Nine sheets were prepared by screen printing and drying a Ti-based paste brazing material.
【００２７】次いで、上記窒化アルミニウム基板を加熱
炉中で加熱温度、保持時間を夫々変えて脱バインダー処
理を行ない、バインダー中に含まれるカーボンを除去し
た後、更に８５０℃一定にして銅板を基板の上下面に接
合した接合体を得、所定の回路形状にエッチング処理し
て目的とする金属−セラミックス複合回路基板を得た。Next, the aluminum nitride substrate is subjected to a debinding treatment by changing the heating temperature and the holding time in a heating furnace, and carbon contained in the binder is removed. A joined body joined to the upper and lower surfaces was obtained, and an etching treatment was performed into a predetermined circuit shape to obtain a target metal-ceramic composite circuit board.
【００２８】これらの金属−セラミックス複合回路基板
のうち、Ｓｉチップ等の半導体素子を搭載する部分の回
路用銅板と窒化アルミニウム基板とのろう材接合による
接合界面を実施例１に示す超音波探傷装置を用いてボイ
ド最大径、１５ｃｍ2 当たりの径１００μｍ以上のボイ
ド数及びボイド率を夫々測定し、これらの結果を表２に
併せて示した。An ultrasonic flaw detector according to the first embodiment shows a bonding interface between a circuit copper plate and an aluminum nitride substrate at a portion on which a semiconductor element such as a Si chip is mounted by using a brazing material. Was used to measure the maximum void diameter, the number of voids having a diameter of 100 μm or more per 15 cm 2 , and the void fraction, and these results are also shown in Table 2.
【００２９】[0029]
【表２】 [Table 2]
【００３０】測定後の複合基板の回路面に半導体素子と
してＳｉチップを搭載して電力を通す試験を行なったと
ころ、少なくとも６００℃以上で、２時間以上加熱処理
してバインダー中のカーボンを除去したものが実施例１
同様にボイド率は１．５％以下で且つ、直径が０．７ｍ
ｍ以下であった。A test was conducted in which an Si chip was mounted as a semiconductor element on the circuit surface of the composite substrate after the measurement and power was passed. As a result, the carbon in the binder was removed by heat treatment at a temperature of at least 600 ° C. for at least 2 hours. What is Example 1
Similarly, the void ratio is 1.5% or less and the diameter is 0.7 m.
m or less.
【００３１】[0031]
【発明の効果】本発明のセラミックス−金属複合回路基
板の開発により、同一の素材を用いて接合する場合にお
いても、接合界面のボイド率を１．５％以下で且つ、直
径０．７ｍｍ以下に制御することができた。これにより
熱抵抗に優れた回路基板を低コストで製造でき、商業的
価値の極めて高いものである。According to the development of the ceramic-metal composite circuit board of the present invention, even when the same material is used for bonding, the void ratio at the bonding interface is reduced to 1.5% or less and the diameter is reduced to 0.7 mm or less. Could be controlled. As a result, a circuit board having excellent thermal resistance can be manufactured at low cost, which is extremely high in commercial value.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 高原 昌也 東京都千代田区丸の内一丁目８番２号 同 和鉱業株式会社内 ────────────────────────────────────────────────── ─── Continued on front page (72) Inventor Masaya Takahara 1-8-2 Marunouchi, Chiyoda-ku, Tokyo Dowa Mining Co., Ltd.
Claims (6)
の主面上に接合された金属板とからなり、少なくとも該
金属板上の半導体搭載部分の接合界面における単位面積
当りのボイドの率が１．５％以下で且つ、各ボイドの直
径が０．７ｍｍ以下であることを特徴とするセラミック
ス−金属複合回路基板。1. A ceramic substrate and a metal plate bonded to at least one main surface thereof, wherein a rate of voids per unit area at least at a bonding interface of a semiconductor mounting portion on the metal plate is 1.5%. And a diameter of each void is 0.7 mm or less.
直接接合である場合において、セラミックス基板表面の
うねりが表面粗さ計で１５μｍ／２０ｍｍ以下であるセ
ラミックス基板を用いることを特徴とする請求項１記載
のセラミックス−金属複合回路基板。2. The method according to claim 1, wherein when the bonding is a direct bonding between the ceramic substrate and the metal plate, a ceramic substrate having a surface roughness of 15 μm / 20 mm or less as measured by a surface roughness meter is used. The ceramic-metal composite circuit board according to the above.
活性金属ろう接合である場合において、Ｔｉ，Ｚｒ，Ｈ
ｆ，Ｎｂから選択される少なくとも１種以上の活性金属
を含有するろう材を介して接合することを特徴とする請
求項１記載のセラミックス−金属複合回路基板。3. The method according to claim 1, wherein the joining is an active metal brazing joint between the ceramic substrate and the metal plate.
2. The ceramic-metal composite circuit board according to claim 1, wherein the bonding is performed via a brazing material containing at least one or more active metals selected from f and Nb.
イドの率が１．５％以下とされていることを特徴とする
請求項１または３記載のセラミックス−金属複合回路基
板。4. The ceramic-metal composite circuit board according to claim 1, wherein the binder is removed at a temperature of 600 ° C. or more to reduce the void ratio to 1.5% or less.
ることによってバインダー中のカーボンが除去されてい
ることを特徴とする請求項１，３，または４記載のセラ
ミックス−金属複合回路基板。5. The ceramic-metal composite circuit board according to claim 1, wherein carbon in the binder is removed by heat treatment at 600 ° C. or more for 2 hours or more.
ＡｌＮ，ＢｅＯ，ＳｉＣ，Ｓｉ3 Ｎ4 ，ＺｒＯ2 から選
択される少なくとも１種のセラミックス基板であること
を特徴とする請求項１，２，３，４または５記載のセラ
ミックス−金属複合回路基板。6. The ceramic substrate is made of Al 2 O 3 ,
AlN, BeO, SiC, Si 3 N 4, characterized in that at least one of ceramic substrate selected from ZrO 2 claims 1, 2, 3, 4 or 5, wherein the ceramic - metal composite circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18891497A JPH1126640A (en) | 1997-07-01 | 1997-07-01 | Ceramic-metal composite circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18891497A JPH1126640A (en) | 1997-07-01 | 1997-07-01 | Ceramic-metal composite circuit board |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006331846A Division JP4408889B2 (en) | 2006-12-08 | 2006-12-08 | Method for manufacturing ceramic-metal composite circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1126640A true JPH1126640A (en) | 1999-01-29 |
Family
ID=16232101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18891497A Withdrawn JPH1126640A (en) | 1997-07-01 | 1997-07-01 | Ceramic-metal composite circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1126640A (en) |
-
1997
- 1997-07-01 JP JP18891497A patent/JPH1126640A/en not_active Withdrawn
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