JPH11235015A - Voltage-driven power semiconductor device and method of controlling the gate of the same - Google Patents
Voltage-driven power semiconductor device and method of controlling the gate of the sameInfo
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- JPH11235015A JPH11235015A JP10031401A JP3140198A JPH11235015A JP H11235015 A JPH11235015 A JP H11235015A JP 10031401 A JP10031401 A JP 10031401A JP 3140198 A JP3140198 A JP 3140198A JP H11235015 A JPH11235015 A JP H11235015A
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、電圧駆動型電力用
半導体装置およびそのゲート制御方法に係り、特に複数
個の電圧駆動型電力用半導体素子が並列接続あるいは直
列接続された電圧駆動型電力用半導体装置およびそのゲ
ート制御方法に関するもので、例えば高電力型の絶縁ゲ
ート型バイポーラトランジスタ（ＩＧＢＴ）に適用され
る。The present invention relates to a voltage-driven power semiconductor device and a gate control method thereof, and more particularly to a voltage-driven power semiconductor device in which a plurality of voltage-driven power semiconductor elements are connected in parallel or in series. The present invention relates to a semiconductor device and a gate control method thereof, and is applied to, for example, a high power type insulated gate bipolar transistor (IGBT).
【０００２】[0002]
【従来の技術】電力用半導体素子は、インバータやコン
バータ等の電力変換や電力制御等の用途に多く使われて
おり、近年の電力の大容量化、高周波スイッチング化に
伴い、電力用半導体素子の大容量化、スイッチングの高
速化が求められている。2. Description of the Related Art Power semiconductor elements are widely used for power conversion and power control of inverters and converters, etc. With the recent increase in power capacity and high-frequency switching, power semiconductor elements have been developed. Higher capacity and faster switching are required.
【０００３】従来、大容量の電力用半導体素子として、
ＧＴＯ（ゲートターンオフ）サイリスタに代表される電
流駆動型素子が使われているが、機器の小型化や高周波
スイッチング等の面で問題があり、ＩＧＢＴに代表され
る電圧駆動型電力用半導体素子の使用が増加している。Conventionally, as a large-capacity power semiconductor device,
Current-driven elements such as GTO (gate turn-off) thyristors are used, but there are problems in terms of downsizing of equipment and high-frequency switching, and the use of voltage-driven power semiconductor elements such as IGBTs. Is increasing.
【０００４】近年には、４．５ｋＶクラスのＩＧＢＴが
発表され、さらに、モジュールからの平型パッケージ
化、ゲートのトレンチ構造化、エミッタ側のキャリア蓄
積効果を利用したＩＥＧＴ（Injection Enhanced Gate
Transistor）の開発等、ポストＧＴＯへ向かっての電圧
駆動型電力用半導体素子の進歩は著しい。In recent years, a 4.5 kV class IGBT has been announced, and furthermore, an IEGT (Injection Enhanced Gate) utilizing a flat package from a module, a gate trench structure, and a carrier accumulation effect on the emitter side.
The progress of voltage-driven power semiconductor devices toward post-GTO, such as the development of Transistors, is remarkable.
【０００５】図５は、従来の電圧駆動型電力用半導体装
置の一部を示す。図中、５１は電圧駆動型電力用半導体
素子（例えばＩＧＢＴ）、５２はパルス発生回路５２１
およびゲート駆動回路５２２を含むゲート回路、５３は
ゲート抵抗素子である。FIG. 5 shows a part of a conventional voltage-driven power semiconductor device. In the figure, reference numeral 51 denotes a voltage-driven power semiconductor element (for example, IGBT), and 52 denotes a pulse generation circuit 521.
And a gate circuit including a gate drive circuit 522, and 53 is a gate resistance element.
【０００６】この半導体装置においては、パルス発生回
路５２１でＰＷＭ（パルス幅変調）形式のゲート駆動制
御パルス信号を発生し、それを受けてゲート駆動回路５
２２がＩＧＢＴ５１のゲートを駆動する。このような構
成によれば、ゲート回路５２の構成を簡単化、小型化す
ることができるという利点がある。In this semiconductor device, a pulse generating circuit 521 generates a gate drive control pulse signal of a PWM (pulse width modulation) type, and upon receiving the signal, the gate drive circuit 5
22 drives the gate of the IGBT 51. According to such a configuration, there is an advantage that the configuration of the gate circuit 52 can be simplified and downsized.
【０００７】一般に、ＩＧＢＴを用いた電力用半導体装
置は、ＧＴＯを用いる場合に比べてスナバ損失を非常に
小さく低減でき、その方法として、電圧クランプ型スナ
バを用いたり、スナバレスで運転する場合もある。さら
に、前記ゲート抵抗素子５３の抵抗値を小さくして単位
時間当りの電圧変化ｄＶ／ｄｔを大きくすることによ
り、スイッチング損失もＧＴＯを用いる場合に比べて非
常に小さく低減できる。In general, a power semiconductor device using an IGBT can reduce a snubber loss very small as compared with a case using a GTO. As a method, a voltage clamp type snubber may be used, or a snubberless operation may be used. . Further, by reducing the resistance value of the gate resistance element 53 to increase the voltage change per unit time dV / dt, the switching loss can be reduced to a very small value as compared with the case where the GTO is used.
【０００８】しかし、ＩＧＢＴのスイッチング速度が速
くなることにより、素子毎のスイッチング特性のばらつ
きがスイッチング動作時に大きく影響することになる。
例えば複数個のＩＧＢＴを並列接続して運転する場合に
は、素子（ＩＧＢＴ）毎の電流バランスが悪くなり、特
定の１素子に負荷電流が集中して流れるおそれがある。
また、複数個のＩＧＢＴを直列接続して運転する場合に
は、素子毎の電圧分担が悪くなり、特定の１素子に電源
電圧が集中して印加されるおそれがある。これらのいず
れの場合も、ＩＧＢＴが破壊にいたるおそれがある。[0008] However, as the switching speed of the IGBT increases, variations in the switching characteristics of each element greatly affect the switching operation.
For example, when a plurality of IGBTs are connected in parallel and operated, the current balance of each element (IGBT) is deteriorated, and there is a possibility that the load current flows intensively to one specific element.
Further, when a plurality of IGBTs are connected in series for operation, the voltage sharing for each element is deteriorated, and the power supply voltage may be applied to one specific element in a concentrated manner. In any of these cases, the IGBT may be broken.
【０００９】[0009]
【発明が解決しようとする課題】上記したように従来の
電圧駆動型電力用半導体装置は、複数個の電力用半導体
素子を並列接続して運転する場合には素子毎の電流バラ
ンスが悪くなり、直列接続して運転する場合には素子毎
の電圧分担が悪くなり、ＩＧＢＴが破壊にいたるおそれ
があるという問題があった。As described above, in the conventional voltage-driven power semiconductor device, when a plurality of power semiconductor devices are connected in parallel and operated, the current balance of each device is deteriorated. When the operation is performed by connecting in series, there is a problem that the voltage sharing for each element is deteriorated and the IGBT may be broken.
【００１０】本発明は上記の問題点を解決すべくなされ
たもので、複数個の電力用半導体素子を並列接続して運
転する場合に素子毎の電流バランスが良好になるように
駆動し得る電圧駆動型電力用半導体装置およびそのゲー
ト制御方法を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. When a plurality of power semiconductor devices are connected in parallel and operated, a voltage which can be driven so that the current balance of each device becomes good. An object of the present invention is to provide a driving type power semiconductor device and a gate control method thereof.
【００１１】また、本発明は、複数個の電力用半導体素
子を直列接続して運転する場合に素子毎の電圧分担が良
好になるように駆動し得る電圧駆動型電力用半導体装置
およびそのゲート制御方法を提供することを目的とす
る。Further, the present invention provides a voltage-driven power semiconductor device which can be driven so that the voltage sharing of each of the plurality of power semiconductor devices is improved when connected in series and a gate control thereof. The aim is to provide a method.
【００１２】[0012]
【課題を解決するための手段】本発明の電圧駆動型電力
用半導体装置は、並列接続された複数個の電圧駆動型電
力用半導体素子と、前記複数個の半導体素子の各ゲート
電流を対応して制御するための複数個のゲート電流制御
回路と、前記複数個の半導体素子が組み込まれる実機に
おいて予め前記複数個の半導体素子のオン時あるいはオ
フ時の電源電圧値・負荷電流値・ゲート電圧値・素子温
度値のうちの少なくとも１つの条件を変えてスイッチン
グを行うことによって各条件におけるオン時の前記複数
個の半導体素子間の電流バランスが良好になる前記複数
個の半導体素子の各ゲート電流値を測定したデータを記
憶しておく記憶装置と、前記実機の実際の運転時におけ
る前記複数個の半導体素子のオン時あるいはオフ時にお
ける電源電圧値・負荷電流値・ゲート電圧値・素子温度
のうちの少なくとも１つの条件に応じて前記記憶装置の
記憶データに基づいて前記複数個の半導体素子間の電流
バランスが良好になるように前記複数個のゲート電流制
御回路をそれぞれ制御するゲート駆動回路を具備するこ
とを特徴とする。According to a first aspect of the present invention, there is provided a voltage-driven power semiconductor device in which a plurality of voltage-driven power semiconductor elements connected in parallel correspond to respective gate currents of the plurality of semiconductor elements. A plurality of gate current control circuits for controlling the power supply voltage, a load current value, and a gate voltage value when the plurality of semiconductor elements are turned on or off in an actual machine in which the plurality of semiconductor elements are incorporated. A gate current value of each of the plurality of semiconductor elements, in which the switching is performed while changing at least one of the element temperature values so that a current balance between the plurality of semiconductor elements at the time of turning on under each condition is good; A storage device for storing data obtained by measuring the power supply voltage value when the plurality of semiconductor elements are turned on or off during the actual operation of the actual machine. The plurality of gates are arranged such that a current balance among the plurality of semiconductor elements is improved based on data stored in the storage device according to at least one of a load current value, a gate voltage value, and an element temperature. A gate drive circuit for controlling each of the current control circuits is provided.
【００１３】また、本発明の電圧駆動型電力用半導体装
置は、直列接続された複数個の電圧駆動型電力用半導体
素子と、前記複数個の半導体素子の各ゲート電流を対応
して制御するための複数個のゲート電流制御回路と、前
記複数個の半導体素子が組み込まれる実機において予め
前記複数個の半導体素子のオン時の電源電圧値・負荷電
流値・ゲート電圧値・素子温度値のうちの少なくとも１
つの条件を変えてスイッチングを行うことによって各条
件におけるオン時あるいはオフ時の前記複数個の半導体
素子間の電圧分担が良好になる前記複数個の半導体素子
の各ゲート電流値を測定したデータを記憶しておく記憶
装置と、前記実機の実際の運転時における前記複数個の
半導体素子のオン時あるいはオフ時における電源電圧値
・負荷電流値・ゲート電圧値・素子温度のうちの少なく
とも１つの条件に応じて前記記憶装置の記憶データに基
づいて前記複数個の半導体素子間の電圧分担が良好にな
るように前記複数個のゲート電流制御回路をそれぞれ制
御するゲート駆動回路を具備することを特徴とする。Further, the voltage-driven power semiconductor device of the present invention is for controlling a plurality of voltage-driven power semiconductor elements connected in series and corresponding gate currents of the plurality of semiconductor elements. A plurality of gate current control circuits, and in a real machine in which the plurality of semiconductor elements are incorporated, a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are turned on in advance. At least one
The data obtained by measuring the gate current value of each of the plurality of semiconductor elements when the switching is performed while changing one of the conditions, whereby the voltage sharing between the plurality of semiconductor elements at the time of on or off under each condition is improved. A storage device to be stored and at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned on or off during an actual operation of the actual machine. A gate drive circuit for controlling each of the plurality of gate current control circuits so that voltage sharing among the plurality of semiconductor elements becomes good based on data stored in the storage device. .
【００１４】また、本発明は、並列接続された複数個の
電圧駆動型電力用半導体素子の各ゲート電流を複数個の
ゲート電流制御回路により対応して制御する電圧駆動型
電力用半導体装置のゲート制御方法において、複数個の
半導体素子が組み込まれる実機において予め前記複数個
の半導体素子のオン時あるいはオフ時の電源電圧値・負
荷電流値・ゲート電圧値・素子温度値のうちの少なくと
も１つの条件を変えてスイッチングを行うことによって
各条件におけるオン時の前記複数個の半導体素子間の電
流バランスが良好になる前記複数個の半導体素子の各ゲ
ート電流値を測定し、測定結果のデータを記憶装置に記
憶しておくステップと、前記実機の実際の運転時におけ
る前記複数個の半導体素子のオン時あるいはオフ時にお
ける電源電圧値・負荷電流値・ゲート電圧値・素子温度
のうちの少なくとも１つの条件を検知し、検知出力に応
じて前記記憶装置の記憶データに基づいて前記複数個の
半導体素子間の電流バランスが良好になるように前記複
数個のゲート電流制御回路をそれぞれ制御するステップ
を具備することを特徴とする。The present invention also provides a gate of a voltage-driven power semiconductor device in which each gate current of a plurality of voltage-driven power semiconductor elements connected in parallel is controlled by a plurality of gate current control circuits. In the control method, at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are turned on or off in a real machine in which a plurality of semiconductor elements are incorporated. By changing the switching, the current balance between the plurality of semiconductor elements at the time of ON under each condition is improved. Each gate current value of the plurality of semiconductor elements is measured, and data of the measurement result is stored in the storage device. And a power supply voltage value when the plurality of semiconductor elements are turned on or off during an actual operation of the actual machine. At least one condition among a load current value, a gate voltage value, and an element temperature is detected, and a current balance among the plurality of semiconductor elements is improved based on data stored in the storage device according to the detected output. Controlling each of the plurality of gate current control circuits.
【００１５】また、本発明は、直列接続された複数個の
電圧駆動型電力用半導体素子の各ゲート電流を複数個の
ゲート電流制御回路により対応して制御する電圧駆動型
電力用半導体装置のゲート制御方法において、複数個の
半導体素子が組み込まれる実機において予め前記複数個
の半導体素子のオン時あるいはオフ時の電源電圧値・負
荷電流値・ゲート電圧値・素子温度値のうちの少なくと
も１つの条件を変えてスイッチングを行うことによって
各条件におけるオン時の前記複数個の半導体素子間の電
圧分担が良好になる前記複数個の半導体素子の各ゲート
電流値を測定し、測定結果のデータを記憶装置に記憶し
ておくステップと、前記実機の実際の運転時における前
記複数個の半導体素子のオン時あるいはオフ時における
電源電圧値・負荷電流値・ゲート電圧値・素子温度のう
ちの少なくとも１つの条件を検知し、検知出力に応じて
前記記憶装置の記憶データに基づいて前記複数個の半導
体素子間の電圧分担が良好になるように前記複数個のゲ
ート電流制御回路をそれぞれ制御するステップを具備す
ることを特徴とする。Further, the present invention provides a gate of a voltage-driven power semiconductor device in which each gate current of a plurality of voltage-driven power semiconductor devices connected in series is controlled by a plurality of gate current control circuits. In the control method, at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are turned on or off in a real machine in which a plurality of semiconductor elements are incorporated. The gate current value of each of the plurality of semiconductor elements at which the voltage sharing between the plurality of semiconductor elements at the time of on under each condition becomes good by performing switching by changing the condition is measured, and data of the measurement result is stored in the storage device. And a power supply voltage value / load when the plurality of semiconductor elements are turned on or off during an actual operation of the actual machine. At least one condition among a flow value, a gate voltage value, and an element temperature is detected, and voltage sharing among the plurality of semiconductor elements is improved based on data stored in the storage device according to the detected output. Controlling the plurality of gate current control circuits.
【００１６】[0016]
【発明の実施の形態】以下、図面を参照して本発明の実
施の形態を詳細に説明する。まず、本発明の電圧駆動型
電力用半導体装置の第１の実施の形態に係る並列接続型
のＩＧＢＴ装置を説明する。Embodiments of the present invention will be described below in detail with reference to the drawings. First, a parallel-connected IGBT device according to a first embodiment of a voltage-driven power semiconductor device of the present invention will be described.
【００１７】＜第１実施例＞図１は、第１実施例に係る
２個のＩＧＢＴが並列接続されてなるＩＧＢＴ装置の一
例を示している。<First Embodiment> FIG. 1 shows an example of an IGBT device according to a first embodiment in which two IGBTs are connected in parallel.
【００１８】図１において、１１および１２はそれぞれ
別チップに形成された第１のＩＧＢＴおよび第２のＩＧ
ＢＴであり、それぞれのコレクタ電極端子が電源線１３
により一括接続されて外部電源（図示せず）に接続され
ている。In FIG. 1, reference numerals 11 and 12 denote a first IGBT and a second IGBT formed on separate chips, respectively.
BT, and each collector electrode terminal is connected to the power supply line 13.
And are connected collectively to an external power supply (not shown).
【００１９】１５は前記２個のＩＧＢＴに対して共通に
設けられた不揮発性の記憶装置、例えばＲＯＭ（読み出
し専用半導体メモリ）である。１６および１７は前記２
個のＩＧＢＴ１１、１２に対応して設けられた第１のゲ
ート電流制御回路および第２のゲート電流制御回路であ
る。Reference numeral 15 denotes a nonvolatile storage device commonly provided for the two IGBTs, for example, a ROM (read only semiconductor memory). 16 and 17 correspond to the above
A first gate current control circuit and a second gate current control circuit provided for each of the IGBTs 11 and 12;
【００２０】１８は前記２個のＩＧＢＴ１１、１２に対
して共通に設けられ、前記ＲＯＭ１５から読み出された
データに基づいて、前記２個のＩＧＢＴ１１、１２間の
電流バランスが良好になるように前記２個のゲート電流
制御回路１６、１７をそれぞれ制御するゲート回路であ
る。The reference numeral 18 is provided in common to the two IGBTs 11 and 12, and based on the data read from the ROM 15, the reference numeral 18 is used to improve the current balance between the two IGBTs 11 and 12. This is a gate circuit that controls the two gate current control circuits 16 and 17, respectively.
【００２１】このゲート回路１８は、上記データに応じ
てパルス幅変調されたＰＷＭ形式のゲート駆動制御パル
ス信号を発生するパルス発生回路１８１と、上記制御パ
ルス信号を受けて前記２個のゲート電流制御回路１６、
１７を介して２個のＩＧＢＴ１１、１２のゲートを駆動
するゲート駆動回路１８２とを具備する。The gate circuit 18 includes a pulse generation circuit 181 for generating a PWM-type gate drive control pulse signal pulse-width-modulated according to the data, and the two gate current control circuits receiving the control pulse signal. Circuit 16,
And a gate drive circuit 182 for driving the gates of the two IGBTs 11 and 12 via the gate drive circuit 17.
【００２２】１９は前記電源線１３に流れる２個のＩＧ
ＢＴ１１、１２のコレクタ電流（負荷電流）Ｉc を検知
してデータを出力する電流検出器である。前記ＲＯＭ１
５は、前記２個のＩＧＢＴ１１、１２が組み込まれる実
機において予め２個のＩＧＢＴ１１、１２のオン時の電
源電圧値・負荷電流値・ゲート電圧値・素子温度値のう
ちの少なくとも１つの動作条件（本例では全ての動作条
件）を様々に変えてスイッチングを行うことによって各
条件におけるオン時の前記２個のＩＧＢＴ間の電流バラ
ンスが良好になる２個のＩＧＢＴ１１、１２の各ゲート
電流値を測定したデータを記憶しておく。Reference numeral 19 denotes two IGs flowing through the power supply line 13.
This is a current detector that detects the collector current (load current) Ic of the BTs 11 and 12 and outputs data. ROM1
Reference numeral 5 denotes at least one operating condition (power supply voltage value, load current value, gate voltage value, element temperature value) of the two IGBTs 11 and 12 when the two IGBTs 11 and 12 are turned on in advance in an actual machine in which the two IGBTs 11 and 12 are incorporated. In this example, the gate current value of each of the two IGBTs 11 and 12 at which the current balance between the two IGBTs is improved when the switching is performed under various conditions is measured by performing various switching operations. The stored data is stored.
【００２３】そして、前記ＲＯＭ１５は、前記電流検出
器１９の検出出力信号（負荷電流値）、前記外部電源の
電源電圧値（図示しない電圧検出器で電源電圧を検出し
て出力したデータ）、前記２個のＩＧＢＴ１１、１２の
素子温度値（図示しない温度検出器で２個のＩＧＢＴの
それぞれの温度を検出して出力したデータ）、前記２個
のＩＧＢＴ１１、１２の各ゲート電圧値のうちの少なく
とも１つの動作条件の検出出力データに応じて（本例で
は全ての動作条件の各検出出力データを内容とするアド
レスを受けて）記憶データが読み出される。The ROM 15 stores a detection output signal (load current value) of the current detector 19, a power supply voltage value of the external power supply (data obtained by detecting a power supply voltage by a voltage detector (not shown) and outputting), At least one of the element temperature values of the two IGBTs 11 and 12 (data output by detecting the respective temperatures of the two IGBTs with a temperature detector (not shown)) and the gate voltage values of the two IGBTs 11 and 12 The stored data is read in accordance with the detection output data of one operation condition (in this example, receiving an address having the content of each detection output data of all operation conditions).
【００２４】なお、前記ＲＯＭ１５は、前記ＩＧＢＴ１
１または１２またはゲート回路１８と同一チップ上に設
けることができる。図１の電圧駆動型電力用半導体装置
のゲート制御方法は、２個のＩＧＢＴ１１、１２が組み
込まれる実機において予め前記２個のＩＧＢＴ１１、１
２のオン時の電源電圧値・負荷電流値・ゲート電圧値・
素子温度値のうちの少なくとも１つの条件を変えてスイ
ッチングを行うことによって各条件におけるオン時の前
記２個のＩＧＢＴ間の電流バランスが良好になる前記２
個のＩＧＢＴの各ゲート電流値を測定し、測定結果のデ
ータをＲＯＭ１５に記憶しておくステップと、前記実機
の実際の運転時における前記２個のＩＧＢＴ１１、１２
のオン時における電源電圧値・負荷電流値・ゲート電圧
値・素子温度のうちの少なくとも１つの条件を検知し、
検知出力に応じてＲＯＭ１５の記憶データに基づいて２
個のＩＧＢＴ間の電流バランスが良好になるように２個
のゲート電流制御回路１６、１７をそれぞれ制御するス
テップを具備する。The ROM 15 stores the IGBT 1
1 or 12 or the gate circuit 18 can be provided on the same chip. The gate control method for the voltage-driven power semiconductor device of FIG. 1 is based on the two IGBTs 11 and 1 in a real machine in which the two IGBTs 11 and 12 are incorporated.
Power supply voltage value, load current value, gate voltage value,
By performing switching by changing at least one of the element temperature values, the current balance between the two IGBTs at the time of ON under each condition is improved.
Measuring each gate current value of each of the IGBTs and storing data of the measurement results in the ROM 15; and determining whether the two IGBTs 11 and 12 are in actual operation of the actual machine.
Detecting at least one condition among a power supply voltage value, a load current value, a gate voltage value, and an element temperature at the time of ON of
2 based on the data stored in the ROM 15 according to the detection output.
Controlling the two gate current control circuits 16 and 17 so that the current balance between the two IGBTs is good.
【００２５】従って、上記第１実施例のＩＧＢＴ装置お
よびそのゲート制御方法によれば、実機の実際の運転時
における２個のＩＧＢＴ１１、１２のオン時における電
源電圧値・負荷電流値・ゲート電圧値・素子温度のうち
の少なくとも１つのデータに応じて、そのデータを内容
とするアドレスを指定してＲＯＭ１５の記憶データを読
み出し、この読み出しデータに基づいて２個のＩＧＢＴ
間の電流バランスが良好になるように駆動することがで
きる。Therefore, according to the IGBT device of the first embodiment and the gate control method thereof, the power supply voltage value, the load current value and the gate voltage value when the two IGBTs 11 and 12 are turned on during the actual operation of the actual machine. In accordance with at least one of the element temperatures, an address containing the data is designated to read the stored data in the ROM 15, and two IGBTs are read based on the read data.
It can be driven so that the current balance between them becomes good.
【００２６】＜第１実施例の変形例＞第１実施例の変形
例では、２個のＩＧＢＴ１１、１２のオフ時に着目し、
予めオフ時の条件を変えて２個のＩＧＢＴ間の電流バラ
ンスが良好になる各ゲート電流値を測定したデータをＲ
ＯＭ１５に記憶しておき、実際の運転時におけるオフ時
の条件を検知した出力に応じて記憶データを読み出し、
この読み出しデータに基づいて２個のＩＧＢＴ１１、１
２の各ゲート電流を制御するように変更する。これによ
り、実際の運転時におけるオフ時に２個のＩＧＢＴ間の
電流バランスが良好になるように駆動することができ
る。<Modification of First Embodiment> In a modification of the first embodiment, attention is focused on when the two IGBTs 11 and 12 are off,
The data obtained by measuring the respective gate current values at which the current balance between the two IGBTs is improved by changing the conditions at the time of OFF in advance is represented by R
The stored data is stored in the OM 15 and the stored data is read out in accordance with an output obtained by detecting an OFF condition during an actual operation,
Based on the read data, two IGBTs 11, 1
2 to control each gate current. Thus, it is possible to drive the two IGBTs so that the current balance between the two IGBTs is good when the power is turned off during the actual operation.
【００２７】＜第２実施例＞図２は、第２実施例に係る
３個以上の複数個のＩＧＢＴが並列接続されてなるＩＧ
ＢＴ装置の一例を示している。<Second Embodiment> FIG. 2 shows an IG in which three or more IGBTs according to a second embodiment are connected in parallel.
1 shows an example of a BT device.
【００２８】第２実施例のＩＧＢＴ装置は、前記第１実
施例のＩＧＢＴ装置と比べて、（１）３個以上のＩＧＢ
Ｔ２１、…２ｎが並列接続され、それぞれに対応してゲ
ート電流制御回路１６１、１６２が設けられている点、
（２）前記３個以上のＩＧＢＴが組み込まれる実機にお
いて予め３個以上のＩＧＢＴのオン時の電源電圧値・負
荷電流値・ゲート電圧値・素子温度値のうちの少なくと
も１つの条件を変えてスイッチングを行うことによって
各条件におけるオン時の３個以上のＩＧＢＴ間の電流バ
ランスが良好になる３個以上のＩＧＢＴの各ゲート電流
値を測定したデータをＲＯＭ１５に記憶しておく点、
（３）実機の実際の運転時における３個以上のＩＧＢＴ
のオン時における電源電圧値・負荷電流値・ゲート電圧
値・素子温度のうちの少なくとも１つのデータに応じて
ＲＯＭの記憶データを読み出し、この読み出しデータに
基づいて３個以上のＩＧＢＴ間の電流バランスが良好に
なるように駆動する点が異なり、その他は同じであるの
で図１中と同一符号を付している。The IGBT device of the second embodiment has (1) three or more IGBTs compared to the IGBT device of the first embodiment.
.. 2n are connected in parallel, and gate current control circuits 161 and 162 are provided correspondingly, respectively.
(2) In an actual machine in which three or more IGBTs are incorporated, switching is performed by changing at least one condition among a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when three or more IGBTs are turned on in advance. The data obtained by measuring the respective gate current values of three or more IGBTs at which the current balance between the three or more IGBTs at the time of ON under each condition is improved by performing the above is stored in the ROM 15.
(3) Three or more IGBTs during actual operation of the actual machine
ROM data is read in accordance with at least one of power supply voltage value, load current value, gate voltage value, and element temperature at the time of turning on the IGBT, and a current balance among three or more IGBTs based on the read data. Are different from each other, and the other components are the same.
【００２９】この第２実施例によれば、実際の運転時に
おけるオン時に３個以上のＩＧＢＴ間の電流バランスが
良好になるように駆動することができる。 ＜第２実施例の変形例＞第２実施例の変形例では、前記
３個以上のＩＧＢＴ２１、…２ｎのオフ時に着目し、予
めオフ時の条件を変えて３個以上のＩＧＢＴ間の電流バ
ランスが良好になる各ゲート電流値を測定したデータを
記憶しておき、実際の運転時におけるオフ時の条件を検
知した出力に応じて記憶データを読み出し、この読み出
しデータに基づいて各ゲート電流を制御するように変更
する。これにより、実際の運転時におけるオフ時に３個
以上のＩＧＢＴ間の電流バランスが良好になるように駆
動することができる。According to the second embodiment, the drive can be performed such that the current balance among three or more IGBTs becomes good when turned on during the actual operation. <Modification of Second Embodiment> In a modification of the second embodiment, attention is focused on when the three or more IGBTs 21,..., 2n are off, and the current balance between the three or more IGBTs is changed in advance by changing the off condition. The data obtained by measuring each gate current value that improves the performance is stored, and the stored data is read out according to the output that detects the OFF condition during actual operation, and each gate current is controlled based on the read data. Change to Thus, it is possible to drive the three or more IGBTs so that the current balance is good when the IGBT is turned off during the actual operation.
【００３０】次に、本発明の電圧駆動型電力用半導体装
置の第２の実施の形態に係る直列接続型のＩＧＢＴ装置
を説明する。 ＜第３実施例＞図３は、第３実施例に係る２個のＩＧＢ
Ｔが直列接続されてなるＩＧＢＴ装置の一例を示してい
る。Next, a series-connected IGBT device according to a second embodiment of the voltage-driven power semiconductor device of the present invention will be described. <Third Embodiment> FIG. 3 shows two IGBs according to a third embodiment.
1 shows an example of an IGBT device in which T is connected in series.
【００３１】図３において、３１および３２はそれぞれ
別チップに形成された第１のＩＧＢＴおよび第２のＩＧ
ＢＴであり、上記第１のＩＧＢＴ３１のエミッタ電極端
子に第２のＩＧＢＴ３２のコレクタ電極端子が接続（両
者は直列接続）されている。そして、第１のＩＧＢＴ３
１のコレクタ電極端子は電源線３３により外部電源に接
続されている。In FIG. 3, reference numerals 31 and 32 denote a first IGBT and a second IGBT formed on separate chips, respectively.
A BT, and the collector electrode terminal of the second IGBT 32 is connected to the emitter electrode terminal of the first IGBT 31 (both are connected in series). And the first IGBT3
One collector electrode terminal is connected to an external power supply by a power supply line 33.
【００３２】３５は前記２個のＩＧＢＴに対して共通に
設けられた不揮発性の記憶装置、例えばＲＯＭである。
３６および３７は前記２個のＩＧＢＴ３１、３２に対応
して設けられた第１のゲート電流制御回路および第２の
ゲート電流制御回路である。Reference numeral 35 denotes a non-volatile storage device, for example, a ROM provided commonly to the two IGBTs.
Reference numerals 36 and 37 denote a first gate current control circuit and a second gate current control circuit provided corresponding to the two IGBTs 31, 32, respectively.
【００３３】３８は前記２個のＩＧＢＴ３１、３２に対
して共通に設けられ、前記ＲＯＭ３５から読み出された
データに基づいて、前記２個のＩＧＢＴ３１、３２間の
電圧分担が良好になるように前記２個のゲート電流制御
回路３６、３７をそれぞれ制御するゲート回路である。The reference numeral 38 is provided in common to the two IGBTs 31 and 32, and based on the data read from the ROM 35, the reference numeral 38 indicates that the voltage sharing between the two IGBTs 31 and 32 is good. This is a gate circuit that controls the two gate current control circuits 36 and 37, respectively.
【００３４】このゲート回路３８は、上記データに応じ
てパルス幅変調されたＰＷＭ形式のゲート駆動制御パル
ス信号を発生するパルス発生回路３８１と、上記制御パ
ルス信号を受けて前記ゲート電流制御回路３６を介して
ＩＧＢＴ３１のゲートを駆動するとともにゲート電流制
御回路３７を介してＩＧＢＴ３２のゲートを駆動するゲ
ート駆動回路３８２とを具備する。The gate circuit 38 includes a pulse generation circuit 381 for generating a gate drive control pulse signal of a PWM format pulse-width modulated according to the data, and a gate current control circuit 36 receiving the control pulse signal. A gate drive circuit 382 that drives the gate of the IGBT 32 through the gate current control circuit 37 and drives the gate of the IGBT 31 through the gate current control circuit 37.
【００３５】３９は前記電源線３３に流れるＩＧＢＴ３
１、３２のコレクタ電流（負荷電流）Ｉc を検知してデ
ータ信号を出力する電流検出器である。前記ＲＯＭ３５
は、前記２個のＩＧＢＴ３１、３２が組み込まれる実機
において予め２個のＩＧＢＴ３１、３２のオン時の電源
電圧値・負荷電流値・ゲート電圧値・素子温度値のうち
の少なくとも１つの条件を変えてスイッチングを行うこ
とによって各条件におけるオン時の前記２個のＩＧＢＴ
間の電圧分担が良好になる２個のＩＧＢＴ３１、３２の
各ゲート電流値を測定したデータを記憶しておく。Reference numeral 39 denotes an IGBT 3 flowing through the power supply line 33.
This is a current detector that detects the collector currents (load currents) Ic of the first and the second and outputs a data signal. ROM 35
In an actual machine in which the two IGBTs 31 and 32 are incorporated, at least one of the power supply voltage value, the load current value, the gate voltage value, and the element temperature value when the two IGBTs 31 and 32 are turned on is changed in advance. The two IGBTs at the time of ON under each condition by performing switching
Data obtained by measuring the respective gate current values of the two IGBTs 31 and 32 in which the voltage sharing between them becomes favorable is stored.
【００３６】そして、前記ＲＯＭ３５は、前記電流検出
器３９の検出出力（負荷電流値）、前記外部電源の電源
電圧値（電圧検出器で電源電圧を検出して出力したデー
タ）、前記２個のＩＧＢＴ３１、３２の素子温度値（温
度検出器で２個のＩＧＢＴのそれぞれの温度を検出して
出力したデータ）、前記２個のＩＧＢＴ３１、３２のゲ
ート電圧値のうちの少なくとも１つのデータに応じて、
そのデータを内容とするアドレスが指定されて記憶デー
タが読み出される。The ROM 35 stores the detection output (load current value) of the current detector 39, the power supply voltage value of the external power supply (data output by detecting the power supply voltage with a voltage detector), and the two In accordance with at least one of the element temperature values of the IGBTs 31 and 32 (data output by detecting the temperatures of the two IGBTs with the temperature detector) and the gate voltage values of the two IGBTs 31 and 32 ,
An address containing the data is specified, and the stored data is read.
【００３７】図３の電圧駆動型電力用半導体装置のゲー
ト制御方法は、２個のＩＧＢＴ３１、３２が組み込まれ
る実機において予め前記２個のＩＧＢＴ３１、３２のオ
ン時の電源電圧値・負荷電流値・ゲート電圧値・素子温
度値のうちの少なくとも１つの条件を変えてスイッチン
グを行うことによって各条件におけるオン時の前記２個
のＩＧＢＴ間の電圧分担が良好になる前記２個のＩＧＢ
Ｔ３１、３２の各ゲート電流値を測定し、測定結果のデ
ータをＲＯＭ３５に記憶しておくステップと、前記実機
の実際の運転時における前記２個のＩＧＢＴ３１、３２
のオン時における電源電圧値・負荷電流値・ゲート電圧
値・素子温度のうちの少なくとも１つの条件を検知し、
検知出力に応じてＲＯＭ３５の記憶データに基づいて前
記２個のＩＧＢＴ間の電圧分担が良好になるように前記
２個のゲート電流制御回路３６、３７をそれぞれ制御す
るステップを具備する。The gate control method for the voltage-driven power semiconductor device shown in FIG. 3 is based on the premise that the two IGBTs 31, 32 are turned on in advance in a real machine in which the two IGBTs 31, 32 are turned on. By switching at least one of the conditions of the gate voltage value and the element temperature value to perform switching, the two IGBs become good in voltage sharing between the two IGBTs when on under each condition.
Measuring the respective gate current values of T31 and T32 and storing the data of the measurement results in the ROM 35; and setting the two IGBTs 31 and 32 during the actual operation of the actual machine.
Detecting at least one condition among a power supply voltage value, a load current value, a gate voltage value, and an element temperature at the time of ON of
A step of controlling the two gate current control circuits and 37 so that the voltage sharing between the two IGBTs becomes good based on the data stored in the ROM 35 in response to the detection output.
【００３８】従って、上記第１実施例のＩＧＢＴ装置お
よびそのゲート制御方法によれば、実機の実際の運転時
における２個のＩＧＢＴ３１、３２のオン時における電
源電圧値・負荷電流値・ゲート電圧値・素子温度のうち
の少なくとも１つのデータに応じてＲＯＭ３５の記憶デ
ータを読み出し、この読み出しデータに基づいて２個の
ＩＧＢＴ間の電圧分担が良好になるように駆動すること
ができる。Therefore, according to the IGBT device and the gate control method of the first embodiment, the power supply voltage value, the load current value, and the gate voltage value when the two IGBTs 31 and 32 are turned on during the actual operation of the actual machine. Data stored in the ROM 35 is read in accordance with at least one of the element temperatures, and driving can be performed based on the read data so that the voltage sharing between the two IGBTs is good.
【００３９】＜第３実施例の変形例＞第３実施例の変形
例では、２個のＩＧＢＴ３１、３２のオフ時に着目し、
予めオフ時の条件を変えて２個のＩＧＢＴ間の電圧分担
が良好になる各ゲート電流値を測定したデータをＲＯＭ
３５に記憶しておき、実際の運転時におけるオフ時の条
件を検知した出力に応じて記憶データを読み出し、この
読み出しデータに基づいて２個のＩＧＢＴ３１、３２の
各ゲート電流を制御するように変更する。<Modification of Third Embodiment> In a modification of the third embodiment, attention is focused on when the two IGBTs 31 and 32 are off,
The data obtained by measuring the respective gate current values at which the voltage sharing between the two IGBTs becomes good by changing the conditions of the off-state in advance is stored in the ROM.
The stored data is read out in accordance with an output obtained by detecting an off condition in an actual operation, and the gate currents of the two IGBTs 31 and 32 are controlled based on the read data. I do.
【００４０】これにより、実際の運転時におけるオフ時
に２個のＩＧＢＴ間の電圧分担が良好になるように駆動
することができる。 ＜第４実施例＞図４は、第４実施例に係る３個以上の複
数個のＩＧＢＴが直列接続されてなるＩＧＢＴ装置の一
例を示している。As a result, it is possible to drive the IGBT so that the voltage sharing between the two IGBTs becomes good when the IGBT is turned off during the actual operation. <Fourth Embodiment> FIG. 4 shows an example of an IGBT device according to a fourth embodiment in which three or more IGBTs are connected in series.
【００４１】第４実施例のＩＧＢＴ装置は、前記第３実
施例のＩＧＢＴ装置と比べて、（１）３個以上のＩＧＢ
Ｔ４１、…４ｎが直列接続され、それぞれに対応してゲ
ート電流制御回路３６１、３６２が設けられている点、
（２）前記３個以上のＩＧＢＴ４１、…４ｎが組み込ま
れる実機において予め３個以上のＩＧＢＴのオン時の電
源電圧値・負荷電流値・ゲート電圧値・素子温度値のう
ちの少なくとも１つの条件を変えてスイッチングを行う
ことによって各条件におけるオン時の３個以上のＩＧＢ
Ｔ間の電圧分担が良好になる３個以上のＩＧＢＴの各ゲ
ート電流値を測定したデータをＲＯＭ３５に記憶してお
く点、（３）実機の実際の運転時における３個以上のＩ
ＧＢＴ４１、…４ｎのオン時における電源電圧値・負荷
電流値・ゲート電圧値・素子温度のうちの少なくとも１
つのデータに応じてＲＯＭ３５の記憶データを読み出
し、この読み出しデータに基づいて３個以上のＩＧＢＴ
間の電圧分担が良好になるように駆動する点が異なり、
その他は同じであるので図３中と同一符号を付してい
る。The IGBT device of the fourth embodiment differs from the IGBT device of the third embodiment in that (1) three or more IGBTs
.. 4n are connected in series, and gate current control circuits 361 and 362 are provided correspondingly thereto.
(2) In an actual machine in which the three or more IGBTs 41,..., 4n are incorporated, at least one condition among a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when three or more IGBTs are turned on is determined in advance. By changing the switching, three or more IGBs at the time of on under each condition
The point that data obtained by measuring the respective gate current values of three or more IGBTs at which the voltage sharing between T becomes good is stored in the ROM 35. (3) Three or more I / Os during actual operation of the actual machine
At least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the GBTs 41,.
The data stored in the ROM 35 is read in accordance with the three data, and three or more IGBTs are read out based on the read data.
The difference is that they are driven so that the voltage sharing between them is good.
The other parts are the same, and are denoted by the same reference numerals as those in FIG.
【００４２】この第４実施例によれば、実際の運転時に
おけるオン時に３個以上のＩＧＢＴ間の電圧分担が良好
になるように駆動することができる。 ＜第４実施例の変形例＞第４実施例の変形例では、前記
３個以上のＩＧＢＴ４１、…４ｎのオフ時に着目し、予
めオフ時の条件を変えて３個以上のＩＧＢＴ間の電圧分
担が良好になる各ゲート電流値を測定したデータをＲＯ
Ｍ３５に記憶しておき、実際の運転時におけるオフ時の
条件を検知した出力に応じて記憶データを読み出し、こ
の読み出しデータに基づいて３個以上のＩＧＢＴ４１、
…４ｎの各ゲート電流を制御するように変更する。これ
により、実際の運転時におけるオフ時に３個以上のＩＧ
ＢＴ間の電圧分担が良好になるように駆動することがで
きる。According to the fourth embodiment, it is possible to drive the three or more IGBTs so that the voltage distribution is good when the actual operation is on. <Modification of Fourth Embodiment> In a modification of the fourth embodiment, attention is focused on when the three or more IGBTs 41,..., 4n are turned off, and the voltage sharing among the three or more IGBTs is changed by changing the conditions at the time of turning off in advance. The data obtained by measuring each gate current value at which
The stored data is stored in M35, and stored data is read out according to the output of detecting the OFF condition during actual operation, and three or more IGBTs 41,
.. Are changed so as to control each gate current of 4n. As a result, three or more IGs are turned off during actual operation.
The driving can be performed so that the voltage sharing between the BTs becomes good.
【００４３】[0043]
【発明の効果】上述したように本発明によれば、複数個
の電力用半導体素子を並列接続して運転する場合に素子
毎の電流バランスが良好になるように駆動し得る電圧駆
動型電力用半導体装置およびそのゲート制御方法を実現
することができる。As described above, according to the present invention, when a plurality of power semiconductor devices are connected in parallel and operated, a voltage-driven power device which can be driven so that the current balance of each device becomes good. A semiconductor device and a gate control method thereof can be realized.
【００４４】また、本発明によれば、複数個の電力用半
導体素子を直列接続して運転する場合に素子毎の電圧分
担が良好になるように駆動し得る電圧駆動型電力用半導
体装置およびそのゲート制御方法を実現することができ
る。Further, according to the present invention, when a plurality of power semiconductor elements are connected in series and operated, a voltage-driven power semiconductor device which can be driven so that the voltage sharing among the elements becomes good, and a power semiconductor device thereof. A gate control method can be realized.
【図１】本発明の第１実施例に係る２個のＩＧＢＴが並
列接続されてなるＩＧＢＴ装置の一例を示す回路図。FIG. 1 is a circuit diagram showing an example of an IGBT device according to a first embodiment of the present invention, in which two IGBTs are connected in parallel.
【図２】本発明の第２実施例に係る３個以上の複数個の
ＩＧＢＴが並列接続されてなるＩＧＢＴ装置の一例を示
す回路図。FIG. 2 is a circuit diagram showing an example of an IGBT device according to a second embodiment of the present invention, in which three or more IGBTs are connected in parallel.
【図３】本発明の第３実施例に係る２個のＩＧＢＴが直
列接続されてなるＩＧＢＴ装置の一例を示す回路図。FIG. 3 is a circuit diagram showing an example of an IGBT device including two IGBTs connected in series according to a third embodiment of the present invention.
【図４】本発明の第４実施例に係る３個以上の複数個の
ＩＧＢＴが直列接続されてなるＩＧＢＴ装置の一例を示
す回路図。FIG. 4 is a circuit diagram showing an example of an IGBT device according to a fourth embodiment of the present invention, in which three or more IGBTs are connected in series.
【図５】従来の電圧駆動型電力用半導体装置の一部を示
す回路図。FIG. 5 is a circuit diagram showing a part of a conventional voltage-driven power semiconductor device.
１１、１２…ＩＧＢＴ、 １３…電源線、 １５…ＲＯＭ、 １６、１７…ゲート電流制御回路、 １８…ゲート回路、 １９…電流検出器。 11, 12: IGBT, 13: power line, 15: ROM, 16, 17: gate current control circuit, 18: gate circuit, 19: current detector.
Claims (8)
用半導体素子と、 前記複数個の半導体素子の各ゲート電流を対応して制御
するための複数個のゲート電流制御回路と、 前記複数個の半導体素子が組み込まれる実機において予
め前記複数個の半導体素子のオン時の電源電圧値・負荷
電流値・ゲート電圧値・素子温度値のうちの少なくとも
１つの条件を変えてスイッチングを行うことによって各
条件におけるオン時の前記複数個の半導体素子間の電流
バランスが良好になる前記複数個の半導体素子の各ゲー
ト電流値を測定したデータを記憶しておく記憶装置と、 前記実機の実際の運転時における前記複数個の半導体素
子のオン時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件に応じて
前記記憶装置の記憶データに基づいて前記複数個の半導
体素子間の電流バランスが良好になるように前記複数個
のゲート電流制御回路をそれぞれ制御するゲート駆動回
路を具備することを特徴とする電圧駆動型電力用半導体
装置。A plurality of voltage-driven power semiconductor elements connected in parallel; a plurality of gate current control circuits for correspondingly controlling respective gate currents of the plurality of semiconductor elements; In a real machine in which a plurality of semiconductor elements are incorporated, switching is performed by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are turned on in advance. A storage device for storing data obtained by measuring respective gate current values of the plurality of semiconductor elements at which a current balance between the plurality of semiconductor elements at the time of ON under each condition is good; and an actual operation of the actual machine. The storage device according to at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned on. A gate drive circuit for controlling each of the plurality of gate current control circuits such that a current balance between the plurality of semiconductor elements is improved based on stored data of the plurality of semiconductor elements. For semiconductor devices.
用半導体素子と、 前記複数個の半導体素子の各ゲート電流を対応して制御
するための複数個のゲート電流制御回路と、 前記複数個の半導体素子が組み込まれる実機において予
め前記複数個の半導体素子のオフ時の電源電圧値・負荷
電流値・ゲート電圧値・素子温度値のうちの少なくとも
１つの条件を変えてスイッチングを行うことによって各
条件におけるオン時の前記複数個の半導体素子間の電流
バランスが良好になる前記複数個の半導体素子の各ゲー
ト電流値を測定したデータを記憶しておく記憶装置と、 前記実機の実際の運転時における前記複数個の半導体素
子のオフ時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件に応じて
前記記憶装置の記憶データに基づいて前記複数個の半導
体素子間の電流バランスが良好になるように前記複数個
のゲート電流制御回路をそれぞれ制御するゲート駆動回
路を具備することを特徴とする電圧駆動型電力用半導体
装置。2. A plurality of voltage-driven power semiconductor devices connected in parallel, a plurality of gate current control circuits for correspondingly controlling respective gate currents of the plurality of semiconductor devices, In a real machine in which a plurality of semiconductor elements are incorporated, switching is performed by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are off in advance. A storage device for storing data obtained by measuring respective gate current values of the plurality of semiconductor elements at which a current balance between the plurality of semiconductor elements at the time of ON under each condition is good; and an actual operation of the actual machine. The storage device according to at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned off. A gate drive circuit for controlling each of the plurality of gate current control circuits such that a current balance between the plurality of semiconductor elements is improved based on stored data of the plurality of semiconductor elements. For semiconductor devices.
用半導体素子と、 前記複数個の半導体素子の各ゲート電流を対応して制御
するための複数個のゲート電流制御回路と、 前記複数個の半導体素子が組み込まれる実機において予
め前記複数個の半導体素子のオン時の電源電圧値・負荷
電流値・ゲート電圧値・素子温度値のうちの少なくとも
１つの条件を変えてスイッチングを行うことによって各
条件におけるオン時の前記複数個の半導体素子間の電圧
分担が良好になる前記複数個の半導体素子の各ゲート電
流値を測定したデータを記憶しておく記憶装置と、 前記実機の実際の運転時における前記複数個の半導体素
子のオン時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件に応じて
前記記憶装置の記憶データに基づいて前記複数個の半導
体素子間の電圧分担が良好になるように前記複数個のゲ
ート電流制御回路をそれぞれ制御するゲート駆動回路を
具備することを特徴とする電圧駆動型電力用半導体装
置。3. A plurality of voltage-driven power semiconductor elements connected in series, a plurality of gate current control circuits for correspondingly controlling respective gate currents of the plurality of semiconductor elements, and In a real machine in which a plurality of semiconductor elements are incorporated, switching is performed by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are turned on in advance. A storage device for storing data obtained by measuring respective gate current values of the plurality of semiconductor elements at which voltage sharing between the plurality of semiconductor elements at the time of on under each condition is good, and an actual operation of the actual machine The storage device according to at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned on. A voltage-driven power semiconductor, comprising: a gate drive circuit that controls each of the plurality of gate current control circuits so that voltage sharing among the plurality of semiconductor elements is improved based on stored data. apparatus.
用半導体素子と、 前記複数個の半導体素子の各ゲート電流を対応して制御
するための複数個のゲート電流制御回路と、 前記複数個の半導体素子が組み込まれる実機において予
め前記複数個の半導体素子のオフ時の電源電圧値・負荷
電流値・ゲート電圧値・素子温度値のうちの少なくとも
１つの条件を変えてスイッチングを行うことによって各
条件におけるオン時の前記複数個の半導体素子間の電圧
分担が良好になる前記複数個の半導体素子の各ゲート電
流値を測定したデータを記憶しておく記憶装置と、 前記実機の実際の運転時における前記複数個の半導体素
子のオフ時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件に応じて
前記記憶装置の記憶データに基づいて前記複数個の半導
体素子間の電圧分担が良好になるように前記複数個のゲ
ート電流制御回路をそれぞれ制御するゲート駆動回路を
具備することを特徴とする電圧駆動型電力用半導体装
置。4. A plurality of voltage-driven power semiconductor devices connected in series; a plurality of gate current control circuits for controlling respective gate currents of the plurality of semiconductor devices in correspondence; In a real machine in which a plurality of semiconductor elements are incorporated, switching is performed by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are off in advance. A storage device for storing data obtained by measuring respective gate current values of the plurality of semiconductor elements at which voltage sharing between the plurality of semiconductor elements at the time of on under each condition is good, and an actual operation of the actual machine The memory device according to at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned off. A voltage-driven power semiconductor, comprising: a gate drive circuit that controls each of the plurality of gate current control circuits so that voltage sharing among the plurality of semiconductor elements is improved based on stored data. apparatus.
用半導体素子の各ゲート電流を複数個のゲート電流制御
回路により対応して制御する電圧駆動型電力用半導体装
置のゲート制御方法において、 複数個の半導体素子が組み込まれる実機において予め前
記複数個の半導体素子のオン時の電源電圧値・負荷電流
値・ゲート電圧値・素子温度値のうちの少なくとも１つ
の条件を変えてスイッチングを行うことによって各条件
におけるオン時の前記複数個の半導体素子間の電流バラ
ンスが良好になる前記複数個の半導体素子の各ゲート電
流値を測定し、測定結果のデータを記憶装置に記憶して
おくステップと、 前記実機の実際の運転時における前記複数個の半導体素
子のオン時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件を検知
し、検知出力に応じて前記記憶装置の記憶データに基づ
いて前記複数個の半導体素子間の電流バランスが良好に
なるように前記複数個のゲート電流制御回路をそれぞれ
制御するステップを具備することを特徴とする電圧駆動
型電力用半導体装置のゲート制御方法。5. A gate control method for a voltage-driven power semiconductor device, wherein each gate current of a plurality of voltage-driven power semiconductor devices connected in parallel is controlled by a plurality of gate current control circuits. Switching in a real machine in which a plurality of semiconductor elements are incorporated by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are turned on in advance. Measuring a gate current value of each of the plurality of semiconductor elements at which the current balance between the plurality of semiconductor elements at the time of on under each condition is good, and storing data of the measurement result in a storage device; A power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned on during actual operation of the actual machine. At least one condition is detected, and each of the plurality of gate current control circuits is controlled so that a current balance among the plurality of semiconductor elements is improved based on data stored in the storage device in accordance with the detected output. A gate control method for a voltage-driven power semiconductor device, comprising the steps of:
用半導体素子の各ゲート電流を複数個のゲート電流制御
回路により対応して制御する電圧駆動型電力用半導体装
置のゲート制御方法において、 複数個の半導体素子が組み込まれる実機において予め前
記複数個の半導体素子のオン時の電源電圧値・負荷電流
値・ゲート電圧値・素子温度値のうちの少なくとも１つ
の条件を変えてスイッチングを行うことによって各条件
におけるオフ時の前記複数個の半導体素子間の電流バラ
ンスが良好になる前記複数個の半導体素子の各ゲート電
流値を測定し、測定結果のデータを記憶装置に記憶して
おくステップと、 前記実機の実際の運転時における前記複数個の半導体素
子のオフ時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件を検知
し、検知出力に応じて前記記憶装置の記憶データに基づ
いて前記複数個の半導体素子間の電流バランスが良好に
なるように前記複数個のゲート電流制御回路をそれぞれ
制御するステップを具備することを特徴とする電圧駆動
型電力用半導体装置のゲート制御方法。6. A gate control method for a voltage-driven power semiconductor device, wherein each gate current of a plurality of voltage-driven power semiconductor devices connected in parallel is controlled by a plurality of gate current control circuits. In a real machine in which a plurality of semiconductor elements are incorporated, switching is performed in advance by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are on. Measuring a gate current value of each of the plurality of semiconductor elements at which the current balance between the plurality of semiconductor elements at the time of turning off under each condition is good, and storing data of the measurement result in a storage device. A power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned off during actual operation of the actual machine. At least one condition is detected, and each of the plurality of gate current control circuits is controlled so that a current balance among the plurality of semiconductor elements is improved based on data stored in the storage device in accordance with the detected output. A gate control method for a voltage-driven power semiconductor device, comprising the steps of:
用半導体素子の各ゲート電流を複数個のゲート電流制御
回路により対応して制御する電圧駆動型電力用半導体装
置のゲート制御方法において、 複数個の半導体素子が組み込まれる実機において予め前
記複数個の半導体素子のオン時の電源電圧値・負荷電流
値・ゲート電圧値・素子温度値のうちの少なくとも１つ
の条件を変えてスイッチングを行うことによって各条件
におけるオン時の前記複数個の半導体素子間の電圧分担
が良好になる前記複数個の半導体素子の各ゲート電流値
を測定し、測定結果のデータを記憶装置に記憶しておく
ステップと、 前記実機の実際の運転時における前記複数個の半導体素
子のオン時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件を検知
し、検知出力に応じて前記記憶装置の記憶データに基づ
いて前記複数個の半導体素子間の電圧分担が良好になる
ように前記複数個のゲート電流制御回路をそれぞれ制御
するステップを具備することを特徴とする電圧駆動型電
力用半導体装置のゲート制御方法。7. A gate control method for a voltage-driven power semiconductor device, wherein each gate current of a plurality of voltage-driven power semiconductor elements connected in series is controlled by a plurality of gate current control circuits. In a real machine in which a plurality of semiconductor elements are incorporated, switching is performed in advance by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are on. Measuring the respective gate current values of the plurality of semiconductor elements at which the voltage sharing between the plurality of semiconductor elements at the time of ON under each condition becomes good, and storing the data of the measurement result in a storage device; A small one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature when the plurality of semiconductor elements are turned on during an actual operation of the actual machine. And detecting one condition, and controlling the plurality of gate current control circuits based on data stored in the storage device in accordance with the detection output so that the voltage sharing among the plurality of semiconductor elements becomes good. A method for controlling a gate of a voltage-driven power semiconductor device, comprising the steps of:
用半導体素子の各ゲート電流を複数個のゲート電流制御
回路により対応して制御する電圧駆動型電力用半導体装
置のゲート制御方法において、 複数個の半導体素子が組み込まれる実機において予め前
記複数個の半導体素子のオフ時の電源電圧値・負荷電流
値・ゲート電圧値・素子温度値のうちの少なくとも１つ
の条件を変えてスイッチングを行うことによって各条件
におけるオン時の前記複数個の半導体素子間の電圧分担
が良好になる前記複数個の半導体素子の各ゲート電流値
を測定し、測定結果のデータを記憶装置に記憶しておく
ステップと、 前記実機の実際の運転時における前記複数個の半導体素
子のオフ時における電源電圧値・負荷電流値・ゲート電
圧値・素子温度のうちの少なくとも１つの条件を検知
し、検知出力に応じて前記記憶装置の記憶データに基づ
いて前記複数個の半導体素子間の電圧分担が良好になる
ように前記複数個のゲート電流制御回路をそれぞれ制御
するステップを具備することを特徴とする電圧駆動型電
力用半導体装置のゲート制御方法。8. A gate control method for a voltage-driven power semiconductor device, wherein each gate current of a plurality of voltage-driven power semiconductor elements connected in series is controlled by a plurality of gate current control circuits. Switching is performed in advance in an actual machine in which a plurality of semiconductor elements are incorporated by changing at least one of a power supply voltage value, a load current value, a gate voltage value, and an element temperature value when the plurality of semiconductor elements are off. Measuring the respective gate current values of the plurality of semiconductor elements at which the voltage sharing between the plurality of semiconductor elements at the time of ON under each condition becomes good, and storing the data of the measurement result in a storage device; The power supply voltage value, the load current value, the gate voltage value, and the element temperature when the plurality of semiconductor elements are turned off during the actual operation of the actual machine. And detecting one condition, and controlling the plurality of gate current control circuits based on data stored in the storage device in accordance with the detection output so that the voltage sharing among the plurality of semiconductor elements becomes good. A method for controlling a gate of a voltage-driven power semiconductor device, comprising the steps of:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10031401A JPH11235015A (en) | 1998-02-13 | 1998-02-13 | Voltage-driven power semiconductor device and method of controlling the gate of the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10031401A JPH11235015A (en) | 1998-02-13 | 1998-02-13 | Voltage-driven power semiconductor device and method of controlling the gate of the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11235015A true JPH11235015A (en) | 1999-08-27 |
Family
ID=12330247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10031401A Pending JPH11235015A (en) | 1998-02-13 | 1998-02-13 | Voltage-driven power semiconductor device and method of controlling the gate of the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11235015A (en) |
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| EP2063521A1 (en) | 2007-11-20 | 2009-05-27 | ELMOS Semiconductor AG | Device for driving a load |
| JP2011151266A (en) * | 2010-01-22 | 2011-08-04 | Denso Corp | Semiconductor device |
| JP2012085131A (en) * | 2010-10-13 | 2012-04-26 | Fuji Electric Co Ltd | Power semiconductor device with sense function |
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| JP2011151266A (en) * | 2010-01-22 | 2011-08-04 | Denso Corp | Semiconductor device |
| US8659864B2 (en) | 2010-10-08 | 2014-02-25 | Fuji Electric Co., Ltd. | Power semiconductor device current detector circuit and detection method |
| JP2012085131A (en) * | 2010-10-13 | 2012-04-26 | Fuji Electric Co Ltd | Power semiconductor device with sense function |
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| JPWO2017221292A1 (en) * | 2016-06-20 | 2018-09-20 | 三菱電機株式会社 | Parallel drive circuit |
| JP2018082587A (en) * | 2016-11-18 | 2018-05-24 | 株式会社日立製作所 | Power conversion device and power semiconductor element control method |
| JP2018093684A (en) * | 2016-12-07 | 2018-06-14 | ルネサスエレクトロニクス株式会社 | Semiconductor device and power conversion device |
| CN108183656A (en) * | 2016-12-08 | 2018-06-19 | 福特全球技术公司 | The self-balancing parallel power device of gate drivers with temperature-compensating |
| CN108183656B (en) * | 2016-12-08 | 2023-12-22 | 福特全球技术公司 | Power transmission system and method for controlling parallel power switch |
| JP2018148689A (en) * | 2017-03-06 | 2018-09-20 | 株式会社デンソー | Power converter control device |
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| DE102018131999B4 (en) | 2017-12-26 | 2022-12-22 | Hitachi, Ltd. | POWER MODULE AND POWER CONVERTER |
| JP2021110727A (en) * | 2019-12-31 | 2021-08-02 | 致茂電子股▲分▼有限公司Chroma Ate Inc. | Electronic load apparatus |
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