JPH11233405A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH11233405A JPH11233405A JP2848298A JP2848298A JPH11233405A JP H11233405 A JPH11233405 A JP H11233405A JP 2848298 A JP2848298 A JP 2848298A JP 2848298 A JP2848298 A JP 2848298A JP H11233405 A JPH11233405 A JP H11233405A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- acid
- oxidizing agent
- thin film
- conductive thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子の製造
方法に関し、さらに詳しくは、半導体素子を製造する
際、ドライエッチング後に残存レジスト及び側壁保護膜
を簡便かつ容易に除去し、半導体素子を効率良く製造す
る方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device, in which a residual resist and a side wall protective film are easily and easily removed after dry etching to improve the efficiency of the semiconductor device. It concerns a good manufacturing method.
【０００２】[0002]
【従来の技術】半導体集積回路や液晶表示装置等の半導
体素子を製造する際には、通常、無機質基板上にスパッ
タリング等の技術を用いて導電薄膜を形成し、該導電薄
膜上にレジストを塗布し、フォトリソグラフィーによ
り、所定のパターンを形成する。次いで、この基板上全
面に紫外線等の活性光を照射してレジストパターンを硬
化させる。このレジストパターン（以下、残存レジスト
と称する。）をマスクとして非マスク領域をドライエッ
チングすることにより、配線回路を形成する。この際、
ドライエッチングガスとして塩素系ガスや、フッ素系ガ
スが一般的に使用される。この際に形成された配線回路
のパターン側壁に、レジストとドライエッチングガスと
導電薄膜等との反応生成物である側壁保護膜が生成す
る。この側壁保護膜の形成による異方性エッチングで高
度な選択的エッチングを行えることにより微細な加工を
行いうることが可能となったが、反面この際に形成され
た側壁保護膜が除去しにくいという問題が発生してき
た。この問題を解決する為に、従来、上記ドライエッチ
ング後の残存レジスト及び側壁保護膜を剥離するのに、
フェノール類、スルホン酸類、ハロゲン化炭素、アルカ
ノールアミン類等の種々のレジスト剥離液が使用されて
きた。しかしながら、近年デバイスの超微細化に伴い、
特にドライエッチングの場合、高密度プラズマ等のエッ
チング条件が厳しくなってきているため、ドライエッチ
ング後の残存レジスト及び側壁保護膜が、配線および絶
縁膜等に使用される金属成分やドライエッチングに使用
されるハロゲン系ガスを多量に含有したものになってき
ている。このハロゲン系ガス等を多量に含有した残存レ
ジスト及び側壁保護膜は、上記の剥離液では、高温でさ
らに長時間剥離を行っても除去することが困難であると
いう問題が発生してきた。また、高温で長時間剥離を行
うことは、配線材料の腐食が発生する等の欠陥を有し、
特にアルミニウム合金等の配線材料の腐食は顕著に発生
する。2. Description of the Related Art When manufacturing a semiconductor element such as a semiconductor integrated circuit or a liquid crystal display device, a conductive thin film is usually formed on an inorganic substrate by a technique such as sputtering, and a resist is applied on the conductive thin film. Then, a predetermined pattern is formed by photolithography. Next, the entire surface of the substrate is irradiated with active light such as ultraviolet rays to cure the resist pattern. By using the resist pattern (hereinafter, referred to as a residual resist) as a mask, the non-mask region is dry-etched to form a wiring circuit. On this occasion,
A chlorine-based gas or a fluorine-based gas is generally used as a dry etching gas. At this time, a sidewall protective film, which is a reaction product of the resist, the dry etching gas, and the conductive thin film, is formed on the pattern sidewall of the wiring circuit formed at this time. Although it is possible to perform fine processing by performing highly selective etching by anisotropic etching by forming the sidewall protective film, it is difficult to remove the sidewall protective film formed at this time. A problem has arisen. To solve this problem, conventionally, to remove the remaining resist and the sidewall protective film after the dry etching,
Various resist strippers such as phenols, sulfonic acids, carbon halides, and alkanolamines have been used. However, in recent years, with the ultra-miniaturization of devices,
Particularly in the case of dry etching, since etching conditions such as high-density plasma are becoming stricter, the remaining resist and sidewall protective film after dry etching are used for metal components used for wiring and insulating films, and for dry etching. , Containing a large amount of halogen-based gas. There has been a problem that it is difficult to remove the residual resist and the side wall protective film containing a large amount of the halogen-based gas or the like even if the above-mentioned stripping solution is stripped at a high temperature for a long time. In addition, peeling at a high temperature for a long time has defects such as corrosion of the wiring material,
In particular, corrosion of wiring materials such as aluminum alloys occurs remarkably.
【０００３】したがって、半導体素子を製造する際に、
種々の配線および絶縁膜等の材料を腐食することなく、
ドライエッチング後に残存する残存レジスト及び側壁保
護膜を、低温、短時間で剥離する方法が要望されてい
た。Therefore, when manufacturing a semiconductor device,
Without corroding various wiring and materials such as insulating films,
There has been a demand for a method of removing the remaining resist and sidewall protective film remaining after dry etching in a short time at a low temperature.
【０００４】[0004]
【発明が解決しようとする課題】以上の如く、半導体素
子を製造する際に、種々の配線および絶縁膜等の材料を
腐食することなく、ドライエッチング後に残存する残存
レジスト及び側壁保護膜を低温、短時間で剥離する方法
を提供することを目的とするものである。As described above, when manufacturing a semiconductor device, the remaining resist and the sidewall protective film remaining after the dry etching are kept at a low temperature without corroding various materials such as wirings and insulating films. It is an object of the present invention to provide a method of peeling in a short time.
【０００５】[0005]
【課題を解決するための手段】本発明者等は、上記従来
技術における種々の問題点を解決すべく鋭意検討を行
い、ドライエッチング後の無機質基板上の残存レジスト
及び側壁保護膜を剥離する際、酸化剤および有機酸を含
有する洗浄液で洗浄後、レジスト剥離液を用いてレジス
ト剥離を行うことにより、配線材料等を腐食することな
く、温和な条件で短時間で剥離出来ることを見出し本発
明を成すに至った。すなわち、本発明は、 （１）基板上に設けられた導電薄膜上に所定のパターン
をレジストで形成する工程、（２）このレジストパター
ンをマスクとして導電薄膜の不要部分をドライエッチン
グ除去する工程、（３）酸化剤および有機酸からなる半
導体素子用洗浄液で半導体素子基板を洗浄する工程およ
び（４）レジスト剥離液により残存レジストおよび側壁
保護膜を除去する工程を順次施すことを特徴とする半導
体素子の製造方法（以下、製造方法１と称することがあ
る。）。、Means for Solving the Problems The present inventors have conducted intensive studies in order to solve the various problems in the above-mentioned prior art, and have found that the remaining resist and the sidewall protective film on the inorganic substrate after the dry etching are removed. The present invention has been found that, after cleaning with a cleaning solution containing an oxidizing agent and an organic acid, the resist is stripped using a resist stripping solution, and can be stripped in a short time under mild conditions without corroding wiring materials and the like. Was reached. That is, the present invention provides: (1) a step of forming a predetermined pattern with a resist on a conductive thin film provided on a substrate; (2) a step of dry etching and removing unnecessary portions of the conductive thin film using the resist pattern as a mask; (3) a step of sequentially cleaning a semiconductor element substrate with a cleaning liquid for a semiconductor element comprising an oxidizing agent and an organic acid; and (4) a step of removing a residual resist and a side wall protective film with a resist stripper. (Hereinafter, may be referred to as manufacturing method 1). ,
【０００６】（１）基板上に設けられた導電薄膜上に所
定のパターンをレジストで形成する工程、（２′）この
レジストパターンをマスクとして導電薄膜の不要部分を
ドライエッチング除去し、次いでアッシング処理によ
り、ドライエッチングによりもたらされたレジスト変質
層を除去する工程、（３）酸化剤および有機酸からなる
半導体素子用洗浄液で半導体素子基板を洗浄する工程お
よび（４）レジスト剥離液により残存レジストおよび側
壁保護膜を除去する工程を順次施すことを特徴とする半
導体素子の製造方法（以下、製造方法２と称することが
ある。）。、を提供するものである。(1) A step of forming a predetermined pattern with a resist on a conductive thin film provided on a substrate, (2 ') An unnecessary portion of the conductive thin film is dry-etched and removed using this resist pattern as a mask, and then ashing is performed. (3) washing the semiconductor element substrate with a semiconductor element washing solution comprising an oxidizing agent and an organic acid, and (4) removing the remaining resist with a resist stripping solution. A method of manufacturing a semiconductor device, which comprises sequentially performing a step of removing a sidewall protective film (hereinafter, may be referred to as a manufacturing method 2). , Is provided.
【０００７】[0007]
【発明の実施の形態】本発明において使用されるレジス
ト剥離液は、通常公知の剥離液であり、特に制限される
ものではなく、レジストの残存状態および使用される無
機質基板により適宣選択すれば良い。上記剥離液の一例
として、例えば特開平５−２７３７６８号、特開平５−
２８１７５３号、特開平６−２６６１１９号等に記載さ
れるアルカノ−ルアミンを主剤とする剥離液、フェノー
ル類、スルホン酸類やハロゲン化炭化水素等があげられ
る。本発明において使用される洗浄液に用いられる酸化
剤としては、過酸化水素、オゾン等の無機過酸化物、塩
素、次亜塩素酸等のハロゲンおよびその化合物、あるい
は過酸化ベンゾイル等の有機過酸化物等があげられる。
これらの酸化剤の中で、無機過酸化物が好ましく、過酸
化水素がより好ましい。酸化剤の濃度は、洗浄液中０．
１〜６０重量％で有り、好ましくは０．５〜３０重量％
である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The resist stripping solution used in the present invention is a generally known stripping solution, and is not particularly limited, and may be appropriately selected depending on the remaining state of the resist and the inorganic substrate used. good. Examples of the stripping solution include, for example, JP-A-5-273768,
And phenols, sulfonic acids, halogenated hydrocarbons, and the like, which include alkanolamines as main agents described in JP 281753 and JP-A-6-266119. The oxidizing agent used in the cleaning solution used in the present invention includes hydrogen peroxide, inorganic peroxides such as ozone, chlorine, halogens such as hypochlorous acid and compounds thereof, and organic peroxides such as benzoyl peroxide. And the like.
Of these oxidants, inorganic peroxides are preferred, and hydrogen peroxide is more preferred. The concentration of the oxidizing agent is 0.1% in the cleaning solution.
1 to 60% by weight, preferably 0.5 to 30% by weight
It is.
【０００８】洗浄液に使用される有機酸としては、ギ
酸、酢酸、プロピオン酸、酪酸、吉草酸、ラウリル酸、
パルミチン酸、ステアリン酸等の脂肪族モノカルボン
酸、シュウ酸、マロン酸、コハク酸、マレイン酸、グル
タル酸、アジピン酸、セバシン酸等の脂肪族ポリカルボ
ン酸、安息香酸、トルイル酸等の芳香族モノカルボン
酸、フタル酸、トリメリット酸等の芳香族ポリカルボン
酸、グリコ−ル酸、リンゴ酸、酒石酸、クエン酸糖のオ
キシカルボン酸、グリシン、アラニン等のアミノ酸、ベ
ンゼンスルホン酸、トルエンスルホン酸の芳香族スルホ
ン酸等があげられる。。これらの有機酸のうち、脂肪族
モノカルボン酸および脂肪族ポリカルボン酸が好適であ
る。また、これらの酸の２種または、それ以上の種類を
組み合わせて併用することも出来る。上記有機酸は洗浄
液中０．１〜５０重量％で用いられ、好ましくは０．５
〜３０重量％である。また、本発明に使用される洗浄液
のｐＨは特に制限はない。さらに、濡れ性を向上させる
ために、界面活性剤やアルコール等を添加しても何等差
し支えなく、カチオン系、ノニオン系、アニオン系の何
れの界面活性剤、メタノール、エタノール等が使用でき
る。洗浄液を使用する洗浄温度は、通常、常温〜８０℃
の範囲であり、エッチングの条件や、使用される無機質
基板により適宣選択すれば良い。The organic acids used in the cleaning solution include formic acid, acetic acid, propionic acid, butyric acid, valeric acid, lauric acid,
Aliphatic monocarboxylic acids such as palmitic acid and stearic acid, aliphatic polycarboxylic acids such as oxalic acid, malonic acid, succinic acid, maleic acid, glutaric acid, adipic acid, sebacic acid, and aromatics such as benzoic acid and toluic acid Aromatic polycarboxylic acids such as monocarboxylic acid, phthalic acid and trimellitic acid, glycolic acid, malic acid, tartaric acid, oxycarboxylic acid of citrate sugar, amino acids such as glycine and alanine, benzenesulfonic acid, toluenesulfonic acid And aromatic sulfonic acids. . Among these organic acids, aliphatic monocarboxylic acids and aliphatic polycarboxylic acids are preferred. In addition, two or more of these acids can be used in combination. The organic acid is used at 0.1 to 50% by weight in the washing solution, and preferably 0.5 to 50% by weight.
３０30% by weight. The pH of the cleaning solution used in the present invention is not particularly limited. Further, in order to improve the wettability, a surfactant, an alcohol or the like may be added without any problem, and any of a cationic, a nonionic and an anionic surfactant, methanol, ethanol and the like can be used. The washing temperature using the washing solution is usually from room temperature to 80 ° C.
It may be appropriately selected depending on the etching conditions and the inorganic substrate used.
【０００９】次に、本発明の半導体素子の製造方法につ
いて説明する。まず、製造方法１は、下記の（１）工
程、（２）工程、（３）工程及び（４）工程から構成さ
れている。 （１）工程は、無機質基板上に設けられた導電薄膜上に
所定のパターンをレジストで形成する工程である。この
（１）工程において、まず、無機質基板上にスパッタリ
ングや真空蒸着等により導電薄膜を形成させた後、その
上にレジスト膜を設け、次いでこのレジスト膜に活性光
線を用いて、画像形成露光を施した後、現像処理して、
該薄膜上に所定のレジストパターンを形成させる。無機
質基板としては、シリコン、ａ−シリコン、ポリシリコ
ン、シリコン酸化膜、シリコン窒化膜、アルミニウム、
アルミニウム合金、チタン、チタン−タングステン、窒
化チタン、タングステン、タンタル、タンタル酸化物、
タンタル合金、クロム、クロム酸化物、クロム合金、Ｉ
ＴＯ（インジウム、錫酸化物）等の半導体配線材料ある
いはガリウム−砒素、ガリウム−リン、インジウム−リ
ン等の化合物半導体、さらにＬＣＤのガラス基板等が挙
げられる。Next, a method of manufacturing a semiconductor device according to the present invention will be described. First, the manufacturing method 1 includes the following steps (1), (2), (3) and (4). Step (1) is a step of forming a predetermined pattern with a resist on a conductive thin film provided on an inorganic substrate. In the step (1), first, a conductive thin film is formed on an inorganic substrate by sputtering, vacuum deposition, or the like, and then a resist film is provided thereon. Then, the resist film is subjected to image forming exposure using actinic rays. After applying, development processing,
A predetermined resist pattern is formed on the thin film. As the inorganic substrate, silicon, a-silicon, polysilicon, silicon oxide film, silicon nitride film, aluminum,
Aluminum alloy, titanium, titanium-tungsten, titanium nitride, tungsten, tantalum, tantalum oxide,
Tantalum alloy, chromium, chromium oxide, chromium alloy, I
Examples include semiconductor wiring materials such as TO (indium, tin oxide) or compound semiconductors such as gallium-arsenic, gallium-phosphorus, and indium-phosphorus, and glass substrates for LCDs.
【００１０】次いで、（２）工程において、上記（１）
工程で形成されたレジストパターンをマスクとして、非
マスク部、すなわち導電薄膜の不要部分を公知の方法で
ドライエッチング除去する。次に（３）工程において前
記洗浄剤を用いてパターン形成された無機質基板の表面
を洗浄処理する。その後、（４）工程で公知のレジスト
剥離液を用いて、残存レジストおよび側壁保護膜を除去
する。Next, in the step (2), the above (1)
Using the resist pattern formed in the process as a mask, a non-mask portion, that is, an unnecessary portion of the conductive thin film is dry-etched and removed by a known method. Next, in the step (3), the surface of the inorganic substrate on which the pattern is formed is cleaned using the cleaning agent. Thereafter, in step (4), the remaining resist and the sidewall protective film are removed using a known resist stripping solution.
【００１１】また、製造方法２は、（１）工程、
（２′）工程、（３）工程及び（４）工程から構成され
ており、（１）工程、（３）工程及び（４）工程は前記
製造方法１と同じであるが（２′）工程では、ドライエ
ッチング後引き続きアッシング処理を施し、ドライエッ
チング処理によりもたらされた変質レジスト層を除去す
る。Further, the manufacturing method 2 comprises the following steps:
It is composed of the steps (2 '), (3) and (4). The steps (1), (3) and (4) are the same as the above-mentioned production method 1, but the step (2') Then, after the dry etching, an ashing process is continuously performed to remove the altered resist layer caused by the dry etching process.
【００１２】このようにして、洗浄液およびレジスト剥
離液を用い、残存レジストおよび側壁保護膜を除去した
後、さらにリンス処理を行うことにより、完全に上記レ
ジスト等が除去される。このリンス処理では、リンス液
として通常超純水を用いるが、必要に応じて適宜アルコ
ールのような水溶性有機溶剤、水溶性有機溶剤と超純水
との混合液や界面活性剤を添加した溶液等を使用でき
る。As described above, after the remaining resist and the side wall protective film are removed using the cleaning solution and the resist stripping solution, the rinsing process is further performed to completely remove the resist and the like. In this rinsing treatment, usually ultrapure water is used as a rinsing liquid, but if necessary, a water-soluble organic solvent such as alcohol, a mixed solution of a water-soluble organic solvent and ultrapure water, or a solution to which a surfactant is added Etc. can be used.
【００１３】[0013]
【実施例】次に実施例及び比較例により本発明を更に具
体的に説明する。但し本発明はこれらの実施例により制
限されるものではない。尚、図−１はレジスト膜６をマ
スクとしてドライエッチングを行い、アルミニウム配線
体４を形成した半導体素子の断面を示す。図−１におい
て半導体素子基板１は酸化膜２に被復されており、また
ドライエッチング時に側壁保護膜５が形成されている。
尚、３はバリアメタルである窒化チタニウム（Ｔi Ｎ）
である。Next, the present invention will be described more specifically with reference to examples and comparative examples. However, the present invention is not limited by these examples. FIG. 1 shows a cross section of a semiconductor element on which an aluminum wiring body 4 is formed by performing dry etching using the resist film 6 as a mask. In FIG. 1, the semiconductor element substrate 1 is covered with an oxide film 2, and a side wall protective film 5 is formed during dry etching.
3 is titanium nitride (TiN) which is a barrier metal
It is.
【００１４】実施例１〜８及び比較例１〜４ 図−１に記載の半導体素子を使用し、表−１，３に記載
の洗浄液にて所定時間洗浄を行い、さらに表−１，３に
記載の剥離液で所定時間浸漬し、リンス液でリンス後水
洗し、さらに乾燥後、電子顕微鏡（ＳＥＭ）で観察を行
った。レジスト膜６及び側壁保護膜５の剥離性とアルミ
ニウム配線体４の腐食性について、下記の評価基準によ
る評価を行った結果を表−２，４に示した。 Examples 1 to 8 and Comparative Examples 1 to 4 Using the semiconductor elements shown in FIG. 1, cleaning was performed for a predetermined time with the cleaning liquids shown in Tables 1 and 3, and further, Tables 1 and 3 It was immersed in the stripping solution described for a predetermined time, rinsed with a rinsing solution, washed with water, dried, and observed with an electron microscope (SEM). Tables 2 and 4 show the results of evaluating the peelability of the resist film 6 and the sidewall protective film 5 and the corrosiveness of the aluminum wiring body 4 according to the following evaluation criteria.
【００１５】[0015]
【表１】 [Table 1]
【００１６】[0016]
【表２】 [Table 2]
【００１７】[0017]
【表３】 [Table 3]
【００１８】[0018]
【表４】 [Table 4]
【００１９】[0019]
【発明の効果】本発明によれば、半導体素子を製造する
に際し、ドライエッチング後またはドライエッチングに
続くアッシング処理後に、残存レジストおよび側壁保護
膜を簡単にかつ容易に除去しうるので、半導体素子を効
率良く製造することができる。According to the present invention, when manufacturing a semiconductor device, the remaining resist and the sidewall protective film can be easily and easily removed after dry etching or after ashing treatment following dry etching. It can be manufactured efficiently.
【図１】実施例および比較例で用いた、半導体素子基板
上にレジスト膜をマスクとしてドライエッチングを行
い、アルミニウム配線体を形成した半導体素子の断面図
である。FIG. 1 is a cross-sectional view of a semiconductor device in which an aluminum wiring body is formed by performing dry etching on a semiconductor device substrate using a resist film as a mask, which is used in Examples and Comparative Examples.
１：半導体素子基板 ２：酸化膜 ３：バリアメタル（窒化チタニウム） ４：アルミニウム配線体 ５：側壁保護膜 ６：レジスト膜 1: semiconductor element substrate 2: oxide film 3: barrier metal (titanium nitride) 4: aluminum wiring body 5: sidewall protective film 6: resist film
Claims (5)
定のパターンをレジストで形成する工程、（２）このレ
ジストパターンをマスクとして導電薄膜の不要部分をド
ライエッチング除去する工程、（３）酸化剤および有機
酸からなる洗浄液で基板を洗浄する工程および（４）レ
ジスト剥離液により残存レジストおよび側壁保護膜を除
去する工程を順次施すことを特徴とする半導体素子の製
造方法。(1) a step of forming a predetermined pattern with a resist on a conductive thin film provided on a substrate; (2) a step of dry etching and removing unnecessary portions of the conductive thin film using the resist pattern as a mask; 3) A method of manufacturing a semiconductor device, comprising sequentially performing a step of cleaning a substrate with a cleaning liquid comprising an oxidizing agent and an organic acid and a step of (4) a step of removing a residual resist and a sidewall protective film with a resist stripper.
定のパターンをレジストで形成する工程、（２′）この
レジストパターンをマスクとして導電薄膜の不要部分を
ドライエッチング除去し、次いでアッシング処理によ
り、ドライエッチングによりもたらされたレジスト変質
層を除去する工程、（３）酸化剤および有機酸からなる
洗浄液で基板を洗浄する工程および（４）レジスト剥離
液により残存レジストおよび側壁保護膜を除去する工程
を順次施すことを特徴とする半導体素子の製造方法。(1) a step of forming a predetermined pattern on a conductive thin film provided on a substrate with a resist; (2 ') an unnecessary portion of the conductive thin film by dry etching using the resist pattern as a mask; Ashing, a step of removing a deteriorated resist layer caused by dry etching, (3) a step of cleaning the substrate with a cleaning liquid comprising an oxidizing agent and an organic acid, and (4) a residual resist and a side wall protective film with a resist stripping liquid A method of manufacturing a semiconductor device, comprising sequentially performing steps of removing silicon.
は２記載の半導体素子の製造方法。3. The method according to claim 1, wherein the oxidizing agent is an inorganic peroxide.
２記載の半導体素子の製造方法。4. The method according to claim 1, wherein the oxidizing agent is hydrogen peroxide.
族ポリカルボン酸である請求項１または２記載の半導体
素子の製造方法。5. The method according to claim 1, wherein the organic acid is an aliphatic monocarboxylic acid or an aliphatic polycarboxylic acid.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2848298A JP4120714B2 (en) | 1998-02-10 | 1998-02-10 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2848298A JP4120714B2 (en) | 1998-02-10 | 1998-02-10 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11233405A true JPH11233405A (en) | 1999-08-27 |
| JP4120714B2 JP4120714B2 (en) | 2008-07-16 |
Family
ID=12249888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2848298A Expired - Lifetime JP4120714B2 (en) | 1998-02-10 | 1998-02-10 | Manufacturing method of semiconductor device |
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| Country | Link |
|---|---|
| JP (1) | JP4120714B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000033371A1 (en) * | 1998-11-27 | 2000-06-08 | Showa Denko K.K. | Composition for removing sidewall and method of removing sidewall |
| WO2002086959A2 (en) * | 2001-03-27 | 2002-10-31 | Micron Technology, Inc. | Post-planarization clean-up |
| US6627553B1 (en) | 1998-11-27 | 2003-09-30 | Showa Denko K.K. | Composition for removing side wall and method of removing side wall |
| US6713232B2 (en) * | 2000-06-15 | 2004-03-30 | Kao Corporation | Method of manufacturing semiconductor device with improved removal of resist residues |
| EP1550912A1 (en) * | 2002-04-26 | 2005-07-06 | Tokyo Ohka Kogyo Co., Ltd. | Method for removing photoresist |
| WO2005098920A3 (en) * | 2004-03-30 | 2007-07-05 | Basf Ag | Aqueous solution for removing post-etch residue |
-
1998
- 1998-02-10 JP JP2848298A patent/JP4120714B2/en not_active Expired - Lifetime
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6627553B1 (en) | 1998-11-27 | 2003-09-30 | Showa Denko K.K. | Composition for removing side wall and method of removing side wall |
| WO2000033371A1 (en) * | 1998-11-27 | 2000-06-08 | Showa Denko K.K. | Composition for removing sidewall and method of removing sidewall |
| US6713232B2 (en) * | 2000-06-15 | 2004-03-30 | Kao Corporation | Method of manufacturing semiconductor device with improved removal of resist residues |
| US6787473B2 (en) | 2001-03-27 | 2004-09-07 | Micron Technology, Inc. | Post-planarization clean-up |
| US6627550B2 (en) | 2001-03-27 | 2003-09-30 | Micron Technology, Inc. | Post-planarization clean-up |
| WO2002086959A3 (en) * | 2001-03-27 | 2003-01-16 | Micron Technology Inc | Post-planarization clean-up |
| WO2002086959A2 (en) * | 2001-03-27 | 2002-10-31 | Micron Technology, Inc. | Post-planarization clean-up |
| US7033978B2 (en) | 2001-03-27 | 2006-04-25 | Micron Technology, Inc. | Post-planarization clean-up |
| EP1550912A1 (en) * | 2002-04-26 | 2005-07-06 | Tokyo Ohka Kogyo Co., Ltd. | Method for removing photoresist |
| EP1550912A4 (en) * | 2002-04-26 | 2006-09-06 | Tokyo Ohka Kogyo Co Ltd | Method for removing photoresist |
| US8354215B2 (en) | 2002-04-26 | 2013-01-15 | Tokyo Ohka Kogyo Co., Ltd. | Method for stripping photoresist |
| WO2005098920A3 (en) * | 2004-03-30 | 2007-07-05 | Basf Ag | Aqueous solution for removing post-etch residue |
| US7919445B2 (en) | 2004-03-30 | 2011-04-05 | Basf Aktiengesellschaft | Aqueous solution for removing post-etch residue |
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|---|---|
| JP4120714B2 (en) | 2008-07-16 |
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