JPH11214819A - Wiring board and manufacture thereof - Google Patents
Wiring board and manufacture thereofInfo
- Publication number
- JPH11214819A JPH11214819A JP10015804A JP1580498A JPH11214819A JP H11214819 A JPH11214819 A JP H11214819A JP 10015804 A JP10015804 A JP 10015804A JP 1580498 A JP1580498 A JP 1580498A JP H11214819 A JPH11214819 A JP H11214819A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- wiring
- printed wiring
- electronic component
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Abstract
Description
【０００１】[0001]
【目次】以下の順序で本発明を説明する。[Table of Contents] The present invention will be described in the following order.
【０００２】発明の属する技術分野 従来の技術 発明が解決しようとする課題 課題を解決するための手段（図１〜図４） 発明の実施の形態 （１）回路基板の構成（図１） （２）回路基板の製造手順（図１〜図４） （３）本実施の形態の動作及び効果（図１〜図４） （４）他の実施の形態（図１〜図４） 発明の効果BACKGROUND OF THE INVENTION Problems to be Solved by the Invention Means for Solving the Problems (FIGS. 1 to 4) Embodiments of the Invention (1) Configuration of Circuit Board (FIG. 1) (2) ) Circuit board manufacturing procedure (FIGS. 1 to 4) (3) Operation and effects of this embodiment (FIGS. 1 to 4) (4) Other embodiments (FIGS. 1 to 4) Effects of the invention
【０００３】[0003]
【発明の属する技術分野】本発明は配線板及びその製造
方法に関し、実装工程の異なる各種電子部品を実装する
配線板及びその製造方法に適用して好適なものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board and a method for manufacturing the same, and is suitably applied to a wiring board for mounting various electronic components having different mounting steps and a method for manufacturing the same.
【０００４】[0004]
【従来の技術】従来、例えばベアチツプが実装された回
路基板においては、プリント配線板上にまずベアチツプ
を実装し、この後チツプ型抵抗器やチツプ型コンデンサ
等の他の必要な電子部品を実装することにより製造され
ている。2. Description of the Related Art Conventionally, for example, in a circuit board on which a bare chip is mounted, first, a bare chip is mounted on a printed wiring board, and thereafter, other necessary electronic components such as a chip type resistor and a chip type capacitor are mounted. It is manufactured by.
【０００５】そしてこのようなベアチツプ以外の電子部
品をプリント配線板上に実装する工程では、これら電子
部品とプリント配線板とを接合するために必要なはんだ
を、ＣＯＢ（Chip On Bord）メタルマスクと呼ばれる専
用のメタルマスクを用いてクリームはんだを印刷するよ
うにして当該プリント配線板の必要な電極上に供給して
いた。[0005] In the process of mounting electronic components other than the bare chip on a printed wiring board, solder necessary for bonding these electronic components to the printed wiring board is provided by a COB (Chip On Bord) metal mask. The cream solder is printed by using a dedicated metal mask called on a required electrode of the printed wiring board.
【０００６】[0006]
【発明が解決しようとする課題】ところがＣＯＢメタル
マスクは、予めプリント配線板上に実装されたベアチツ
プと干渉しないように対応する部位が凸状となつてい
る。このためこのようなＣＯＢメタルマスクを用いたク
リームはんだの印刷作業では、ＣＯＢメタルマスク上に
供給されるクリームはんだをスキージによりＣＯＢメタ
ルマスクの各開口部に押し込む際に当該クリームはんだ
がＣＯＢメタルマスクの凸部付近において当該ＣＯＢメ
タルマスクの上面に残つてしまい、その部分にクリーム
はんだが余分に供給されることがあつた。However, the corresponding portion of the COB metal mask has a convex shape so as not to interfere with the bare chip previously mounted on the printed wiring board. For this reason, in the printing operation of the cream solder using such a COB metal mask, when the cream solder supplied on the COB metal mask is pushed into each opening of the COB metal mask by a squeegee, the cream solder is applied to the COB metal mask. In the vicinity of the protruding portion, the solder remains on the upper surface of the COB metal mask, and extra cream solder is sometimes supplied to the portion.
【０００７】そしてこのようにプリント配線板上に余分
なクリームはんだが印刷された場合、リフロー時にこの
余分なクリームはんだがプリント配線板上の対応する電
極上から流れ出し、隣接する電極上に供給されたクリー
ムはんだと融合することによりシヨートを発生させるこ
とがあり、プリント配線板の歩留りを低下させ、生産性
を劣化させる問題があつた。When the excess cream solder is printed on the printed wiring board, the excess cream solder flows out from the corresponding electrode on the printed wiring board during reflow and is supplied to the adjacent electrode. In some cases, a short circuit may be generated by fusing with the cream solder, which reduces the yield of the printed wiring board and lowers the productivity.
【０００８】本発明は以上の点を考慮してなされたもの
で、生産性を向上させ得る配線板及びその製造方法を提
案しようとするものである。The present invention has been made in view of the above points, and an object of the present invention is to propose a wiring board capable of improving productivity and a method of manufacturing the same.
【０００９】[0009]
【課題を解決するための手段】かかる課題を解決するた
め本発明においては、実装工程が異なる第１及び第２の
電子部品が実装される配線板において、一面に所定の第
１の配線パターンが形成されると共に、当該第１の配線
パターン上に第１の電子部品が実装された第１の配線板
と、第１の配線板に実装された第１の電子部品に対応さ
せて、一面側に第１の電子部品と干渉しないように凹部
が設けられると共に、他面側に第２の電子部品を実装す
るための所定の第２の配線パターンが形成され、かつ第
１及び第２の配線パターン間の導通をとるための導電材
からなる導通路が内部に設けられた第２の配線板と、第
１の配線板の第１の配線パターンの所定位置と、第２の
配線板の一面側に露出する導通路とを接合するようにし
て第１及び第２の配線板を接合する導電性接合材とを設
けるようにした。According to the present invention, there is provided a wiring board on which first and second electronic components having different mounting processes are mounted, and a predetermined first wiring pattern is formed on one surface of the wiring board. And a first wiring board on which the first electronic component is mounted on the first wiring pattern, and a first surface on which the first electronic component is mounted on the first wiring board. A concave portion is provided so as not to interfere with the first electronic component, a predetermined second wiring pattern for mounting the second electronic component is formed on the other surface side, and the first and second wirings are formed. A second wiring board in which a conductive path made of a conductive material for establishing conduction between the patterns is provided, a predetermined position of the first wiring pattern of the first wiring board, and one surface of the second wiring board; The first and second conductive paths are joined so as to It was provided and a conductive bonding material for bonding the wire plate.
【００１０】この結果この配線板では、実装工程の異な
る電子部品がそれぞれ異なる配線パターン上に実装され
るため、例えば第１及び第２の電子部品を対応する第１
又は第２の配線パターン上に実装するために必要なはん
だを第１及び第２の配線パターン上に供給する作業を、
通常の平坦なメタルマスクを用いて印刷法により行うこ
とができる。かくするにつきこの配線板では、第１及び
第２の配線パターンの各所定位置にそれぞれはんだを安
定して一定量ずつ供給することができる。[0010] As a result, in this wiring board, since the electronic components having different mounting processes are mounted on different wiring patterns, for example, the first and second electronic components are connected to the corresponding first and second electronic components.
Or supplying the solder necessary for mounting on the second wiring pattern onto the first and second wiring patterns,
It can be performed by a printing method using an ordinary flat metal mask. Thus, in this wiring board, it is possible to stably supply a predetermined amount of solder to each predetermined position of the first and second wiring patterns.
【００１１】また本発明においては、実装工程が異なる
第１及び第２の電子部品が実装される配線板の製造方法
において、一面に所定の第１の配線パターンを有し、当
該第１の配線パターン上に第１の電子部品が実装された
第１の配線板と、第１の配線板に実装された第１の電子
部品に対応させて、一面側に第１の電子部品と干渉しな
いように凹部が設けられると共に、他面側に第２の電子
部品を実装するための所定の第２の配線パターンが形成
され、かつ第１及び第２の配線パターン間の導通をとる
ための導電材からなる導通路が内部に設けられた第２の
配線板とを作製する第１の工程と、第１の配線板の第１
の配線パターンの所定位置と、第２の配線板の導通路と
を所定の導電性接合材を用いて接合する第２の工程とを
設けるようにした。Further, according to the present invention, in a method of manufacturing a wiring board on which first and second electronic components having different mounting steps are mounted, a predetermined first wiring pattern is provided on one surface, and the first wiring is provided. The first wiring board on which the first electronic component is mounted on the pattern and the first electronic component mounted on the first wiring board correspond to the first electronic component on one side so as not to interfere with the first electronic component. And a conductive material for forming a predetermined second wiring pattern for mounting the second electronic component on the other surface side, and for establishing conduction between the first and second wiring patterns. A first step of fabricating a second wiring board having a conductive path formed therein, and a first wiring board of the first wiring board.
And a second step of joining a predetermined position of the wiring pattern and a conductive path of the second wiring board by using a predetermined conductive joining material.
【００１２】この結果このようにして製造される配線板
では、実装工程の異なる電子部品がそれぞれ異なる配線
パターン上に実装されるため、例えば第１及び第２の電
子部品を対応する第１又は第２の配線パターン上に実装
するために必要なはんだを第１及び第２の配線パターン
上に供給する作業を、通常の平坦なメタルマスクを用い
て印刷法により行うことができる。かくするにつきこの
配線板では、第１及び第２の配線パターンの各所定位置
にそれぞれはんだを安定して一定量ずつ供給することが
できる。As a result, in the wiring board manufactured in this manner, since the electronic components having different mounting processes are mounted on different wiring patterns, for example, the first and second electronic components can be connected to the corresponding first or second wiring components. The operation of supplying solder necessary for mounting on the second wiring pattern onto the first and second wiring patterns can be performed by a printing method using a normal flat metal mask. Thus, in this wiring board, it is possible to stably supply a predetermined amount of solder to each predetermined position of the first and second wiring patterns.
【００１３】[0013]
【発明の実施の形態】以下図面について、本発明の一実
施の形態を詳述する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.
【００１４】（１）回路基板の構成 図１において、１は全体として本発明を適用した回路基
板を示し、ベアチツプ２が実装された第１のプリント配
線板３上に、その表面にベアチツプ２以外の他の電子部
品４Ａ、４Ｂが実装された第２のプリント配線板５が貼
り付けられることにより構成されている。(1) Structure of Circuit Board In FIG. 1, reference numeral 1 denotes a circuit board to which the present invention is applied as a whole, on a first printed wiring board 3 on which a bear chip 2 is mounted, and on a surface thereof other than the bear chip 2 The second printed wiring board 5 on which other electronic components 4A and 4B are mounted is attached.
【００１５】実際上第１のプリント配線板３において
は、図２（Ａ）に示すように、その一面３Ａ側に、ベア
チツプ２の各電極（図示せず）にそれぞれ対応させて設
けられた複数の第１のランド６と、各第１のランド６に
それぞれ対応させて、対応する第１のランド６と配線ラ
イン７を介して導通接続された複数の第２のランド８と
を有する所定の第１の配線パターン３０が形成されてい
る。In practice, as shown in FIG. 2A, the first printed wiring board 3 has, on one surface 3A side, a plurality of electrodes provided for the respective electrodes (not shown) of the bare chip 2 respectively. And a plurality of second lands 8 respectively corresponding to the first lands 6 and electrically connected to the corresponding first lands 6 via the wiring lines 7. A first wiring pattern 30 is formed.
【００１６】そしてベアツチプ２は、各電極がそれぞれ
第１のプリント配線板３の対応する第１のランド６と突
起電極（バンプ）９を介して接合されるように当該第１
のプリント配線板３上にフリツプチツプ実装されてい
る。The beat chip 2 is so formed that each electrode is bonded to a corresponding first land 6 of the first printed wiring board 3 via a protruding electrode (bump) 9.
Flip-chip mounted on the printed wiring board 3 of FIG.
【００１７】一方第２のプリント配線板５においては、
第１のプリント配線板３との接合面（以下、これを裏面
と呼ぶ）５Ａに当該第１のプリント配線板３上に実装さ
れたベアチツプ２の実装位置に対応させて、当該ベアチ
ツプ３よりも僅かに大きい凹部５ＡＸが設けられてい
る。On the other hand, in the second printed wiring board 5,
The bonding surface of the first printed wiring board 3 (hereinafter, referred to as the back surface) 5A is made to correspond to the mounting position of the bare chip 2 mounted on the first printed wiring board 3 so as to correspond to the mounting position of the bare chip 3. A slightly larger recess 5AX is provided.
【００１８】また第２のプリント配線板５の内部には、
第１のプリント配線板３の各第２のランド１２（図２
（Ａ））とそれぞれ対応させて複数の金めつきスルーホ
ール５Ｂが形成されており、これら各金めつきスルーホ
ール５Ｂの第２のプリント配線板５の裏面側に露出する
端部が当該第１のプリント配線板３の対応する第２のラ
ンド１２とはんだを介して接合されることにより、第１
及び第２のプリント配線板３、５が一体に接合されてい
る。Further, inside the second printed wiring board 5,
Each second land 12 of the first printed wiring board 3 (see FIG. 2)
(A)), a plurality of plated through holes 5B are formed, and the ends of the plated through holes 5B exposed on the back surface side of the second printed wiring board 5 are the same as those of the second through hole 5B. The first printed wiring board 3 is bonded to the corresponding second lands 12 via solder, so that the first
And the second printed wiring boards 3 and 5 are integrally joined.
【００１９】さらに第２のプリント配線板５の表面５Ｃ
（第１のプリント配線板３の裏面５Ａと対向する面）に
は、それぞれ対応する金めつきスルーホール５Ｂと導通
接続された複数のランド１０を含む所定の配線パターン
３１が形成されており、この配線パターン３１上の対応
する位置にベアチツプ２以外の各種電子部品４Ａ、４Ｂ
が実装されている。Further, the surface 5C of the second printed wiring board 5
A predetermined wiring pattern 31 including a plurality of lands 10 conductively connected to the corresponding plated-through holes 5B is formed on (the surface facing the back surface 5A of the first printed wiring board 3), Various electronic components 4A and 4B other than the bare chip 2 are provided at corresponding positions on the wiring pattern 31.
Has been implemented.
【００２０】これによりこの回路基板１においては、ベ
アチツプ２以外の各電子部品４Ａ、４Ｂを第２のプリン
ト配線板５の表面５Ｃに実装する際に必要なはんだを通
常の凹凸のないメタルマスクを用いて印刷供給すること
ができるようになされている。Thus, in the circuit board 1, the solder necessary for mounting each of the electronic components 4A and 4B other than the bare chip 2 on the surface 5C of the second printed wiring board 5 is provided by a metal mask having no ordinary unevenness. Print supply.
【００２１】（２）回路基板の製造手順 ここで実際上このような回路基板１は、図２（Ａ）〜図
４に示す以下の手順により製造することができる。(2) Manufacturing Procedure of Circuit Board Here, such a circuit board 1 can be actually manufactured by the following procedure shown in FIGS.
【００２２】すなわちまず図２（Ａ）のような一面３Ａ
に複数の第１及び第２のランド６、８を含む所定の配線
パターン３０が形成された第１のプリント配線板３を作
製し、次いで図２（Ｂ）に示すように、この第１のプリ
ント配線板３の各第２のランド８上に例えば通常の凹凸
のないメタルマスクを用いてクリームはんだ２０を印刷
供給する。That is, first, one surface 3A as shown in FIG.
First, a first printed wiring board 3 on which a predetermined wiring pattern 30 including a plurality of first and second lands 6 and 8 is formed, and then, as shown in FIG. The cream solder 20 is printed and supplied onto each second land 8 of the printed wiring board 3 using, for example, a normal metal mask without unevenness.
【００２３】次いでこの第１のプリント配線板３の一面
３Ａ側におけるベアチツプ２の実装位置に異方性導電接
着剤や圧接工法用接着樹脂材等の接着及び封止用の樹脂
材２１をデイスペンサ又はマイクロスクリーンを用いて
供給し、この後図２（Ｃ）に示すように、この第１のプ
リント配線板３上にフリツプチツプ実装法によりベアチ
ツプ２を位置決めして実装する。Next, a resin material 21 for bonding and sealing such as an anisotropic conductive adhesive or an adhesive resin material for a pressure welding method is dispensed to a mounting position of the bare chip 2 on the one surface 3A side of the first printed wiring board 3 with a dispenser or a dispenser. The microchip is supplied by using a micro screen, and thereafter, as shown in FIG. 2C, the bare chip 2 is positioned and mounted on the first printed wiring board 3 by a flip chip mounting method.
【００２４】またこれとは別に、例えば図３（Ａ）に示
すように、片面銅張積層板２２の銅箔２３が被着されて
いない一面２２Ａ側に、それぞれ所定位置に開口２３Ａ
が形成された複数枚の絶縁性材料からなる平板２３を貼
り合わせることにより凹型の片面銅張積層板を形成し、
この後図３（Ｂ）に示すように、この凹型面銅張積層板
の所定位置に金めつきスルーホール５Ｂを形成すると共
に、銅箔２３をパターニングすることにより、表面５Ｃ
にランド１０を含む所定の配線パターン３１が形成され
てなる第２のプリント配線板５を形成する。In addition, as shown in FIG. 3A, for example, as shown in FIG.
A concave single-sided copper-clad laminate is formed by bonding a plurality of flat plates 23 made of an insulating material on which
Thereafter, as shown in FIG. 3 (B), a through hole 5B is formed at a predetermined position of the concave surface copper-clad laminate, and the copper foil 23 is patterned to form a surface 5C.
Then, a second printed wiring board 5 having a predetermined wiring pattern 31 including the land 10 is formed.
【００２５】次いで図３（Ｃ）に示すように、この第２
のプリント配線板５の表面５Ｃに形成された配線パター
ン上の所定位置に通常の平坦なメタルマスクを用いてク
リームはんだを供給すると共に、ベアチツプ２以外の他
の必要な電子部品４Ａ、４Ｂをマウントし、この後クリ
ームはんだをリフローすることによりこれら各電子部品
４Ａ、４Ｂを第２のプリント配線板５の表面５Ｃ上に実
装する。Next, as shown in FIG.
The cream solder is supplied to a predetermined position on the wiring pattern formed on the surface 5C of the printed wiring board 5 by using an ordinary flat metal mask, and necessary electronic components 4A and 4B other than the bare chip 2 are mounted. Thereafter, the electronic components 4A and 4B are mounted on the surface 5C of the second printed wiring board 5 by reflowing the cream solder.
【００２６】さらにこの後図４に示すように、このよう
にして作製されたベアチツプ２が実装されてなる第１の
プリント配線板３と、ベアチツプ２以外の必要な各種電
子部品４Ａ、４Ｂが実装された第２のプリント配線板５
とを、第１のプリント配線板３の各第２のランド８上に
第２のプリント配線板５の対応する金めつきスルーホー
ル５Ｂの端部が位置するように位置決めして重ね合わせ
る。Then, as shown in FIG. 4, a first printed wiring board 3 on which the thus-produced bare chip 2 is mounted and various necessary electronic components 4A and 4B other than the bare chip 2 are mounted. Second printed wiring board 5
Are positioned and overlapped so that the end of the corresponding plated through hole 5B of the second printed wiring board 5 is located on each second land 8 of the first printed wiring board 3.
【００２７】そしてこの後その状態でこれら第１及び第
２のプリント配線板３、５を例えばリフロー炉を通すな
どして第１のプリント配線板３の各第２のランド８上の
クリームはんだ２０を加熱溶融させることにより、これ
ら第１のプリント配線板３の各第２のランド８と、第２
のプリント配線板５の対応する金めつきスルーホール５
Ｂとを物理的にかつ電気的に接続し、かくして第１及び
第２のプリント配線板３、５を一体に接合する。これに
より図１に示す回路基板１を得ることができる。Then, in this state, the first and second printed wiring boards 3 and 5 are passed through, for example, a reflow furnace to form a cream solder 20 on each second land 8 of the first printed wiring board 3. Is heated and melted, so that each of the second lands 8 of the first printed wiring board 3 is
Corresponding gold plated through hole 5 of printed circuit board 5
B is physically and electrically connected, and thus the first and second printed wiring boards 3 and 5 are integrally joined. Thus, the circuit board 1 shown in FIG. 1 can be obtained.
【００２８】なお第２のプリント配線板５を作製する際
（図３（Ｂ））に、当該第２のプリント配線板５にその
表面５Ｃと凹部５ＡＸとを連通するように複数の貫通孔
５Ｄを設けるようにしても良く、このようにすることに
よつて第２のプリント配線板５の凹部５ＡＸ内の空気や
熱を効率良く外部に放出することができる。かくするに
つき例えばリフロー時における第２のプリント配線板５
の凹部５ＡＸ内と外部との気圧差に起因する回路基板１
の破壊や、ベアチツプ２に形成された回路の動作時に当
該ベアチツプ２から放出される熱によるベアチツプ２の
故障等を未然に回避することができる。When manufacturing the second printed wiring board 5 (FIG. 3B), a plurality of through-holes 5D are formed in the second printed wiring board 5 so that the surface 5C and the recess 5AX communicate with each other. The air and heat in the concave portion 5AX of the second printed wiring board 5 can be efficiently released to the outside by doing so. Thus, for example, the second printed wiring board 5 at the time of reflow
Circuit board 1 caused by a pressure difference between the inside and the outside of the recess 5AX
And the failure of the bare chip 2 due to the heat released from the bare chip 2 during the operation of the circuit formed on the bare chip 2 can be avoided.
【００２９】（３）本実施の形態の動作及び効果 以上の構成において、本発明を適用した回路基板１の製
造方法では、ベアチツプ２が実装された第１のプリント
配線板３と、当該第１のプリント配線板３との接合面５
Ａにベアチツプ２に対応させて凹部５ＡＸが形成される
と共に、その表面５Ｃにベアチツプ２以外の必要な各種
電子部品４Ａ、４Ｂが実装された第２のプリント配線板
５とを位置決めして重ね合わせ、第１のプリント配線板
３の各第２のランド８上にそれぞれ予め供給されている
クリームはんだ２０を溶融し、これら各第２のランド８
と、第２のプリント配線板５の対応する金めつきスルー
ホール５Ｂとを接合するようにして、これら第１及び第
２のプリント配線板３、５を接合することにより回路基
板１を製造する。(3) Operation and Effect of the Present Embodiment In the above configuration, in the method of manufacturing the circuit board 1 to which the present invention is applied, the first printed wiring board 3 on which the bare chip 2 is mounted and the first printed wiring board 3 Bonding surface 5 with printed wiring board 3
5A, a concave portion 5AX corresponding to the bare chip 2 is formed, and a second printed wiring board 5 on which various necessary electronic components 4A and 4B other than the bare chip 2 are mounted is positioned and superposed on the surface 5C. The cream solder 20 previously supplied on each of the second lands 8 of the first printed wiring board 3 is melted, and each of the second lands 8 is melted.
The circuit board 1 is manufactured by joining the first and second printed wiring boards 3 and 5 in such a manner that the first and second printed wiring boards 3 and 5 are joined together with the corresponding plated-through holes 5B of the second printed wiring board 5. .
【００３０】そしてこのような製造方法により製造され
た回路基板１では、ベアチツプ２以外の必要な電子部品
４Ａ、４Ｂを第２のプリント配線板５上に実装する際に
必要なはんだを、凹凸のない平坦なメタルマスクを用い
て第２のプリント配線板５の表面５Ｃ上の対応する位置
に印刷供給することができるため、このはんだを安定し
て常に一定量で供給することができる。In the circuit board 1 manufactured by such a manufacturing method, the solder necessary for mounting the necessary electronic components 4A and 4B other than the bare chip 2 on the second printed wiring board 5 is removed. Since it is possible to print and supply the solder to a corresponding position on the surface 5C of the second printed wiring board 5 using a flat metal mask, this solder can be supplied stably and always in a constant amount.
【００３１】以上の構成によれば、ベアチツプ２が実装
された第１のプリント配線板３と、当該第１のプリント
配線板３との接合面５Ａにベアチツプ２に対応させて凹
部５ＡＸが形成されると共に、その表面５Ｃにベアチツ
プ２以外の必要な各種電子部品４Ａ、４Ｂが実装された
第２のプリント配線板５とを位置決めして重ね合わせて
回路基板１を製造するようにしたことにより、第２のプ
リント配線板５の表面５Ｃ上にベアチツプ２以外の電子
部品４Ａ、４Ｂを実装する際に必要なはんだを安定して
常に一定量で供給し得るようにすることができ、かくし
て生産性を格段的に向上させ得る回路基板及びその製造
方法を実現できる。According to the above configuration, the first printed wiring board 3 on which the bare chip 2 is mounted and the concave portion 5AX corresponding to the bare chip 2 are formed on the joint surface 5A between the first printed wiring board 3 and the first printed wiring board 3. In addition, the circuit board 1 is manufactured by positioning and overlapping the second printed wiring board 5 on which various necessary electronic components 4A and 4B other than the bare chip 2 are mounted on the surface 5C thereof. Solder required for mounting electronic components 4A and 4B other than the bare chip 2 on the surface 5C of the second printed wiring board 5 can be supplied stably and constantly in a constant amount, thus improving productivity. And a method for manufacturing the same, which can significantly improve the performance.
【００３２】（４）他の実施の形態 なお上述の実施の形態においては、本発明を２層の回路
基板１に適用するようにした場合について述べたが、本
発明はこれに限らず、３層以上の回路基板にも広く適用
することができる。(4) Other Embodiments In the above-described embodiment, the case where the present invention is applied to the two-layer circuit board 1 has been described. It can be widely applied to circuit boards having more than one layer.
【００３３】また上述の実施の形態においては、第２の
プリント配線板５上にベアチツプ２以外の必要な電子部
品４Ａ、４Ｂを実装した後、当該第２のプリント配線板
５を第１のプリント配線板３と接合するようにした場合
について述べたが、本発明はこれに限らず、第１及び第
２のプリント配線板３、５を接合後、第２のプリント配
線板５の表面上にベアチツプ２以外の必要な電子部品４
Ａ、４Ｂを実装するようにしても良い。Also, in the above-described embodiment, after the necessary electronic components 4A and 4B other than the bare chip 2 are mounted on the second printed wiring board 5, the second printed wiring board 5 is mounted on the first printed wiring board 5. Although the description has been given of the case where the first and second printed wiring boards 3 and 5 are joined together, the present invention is not limited thereto. Necessary electronic components 4 other than the beachip 2
A and 4B may be mounted.
【００３４】さらに上述の実施の形態においては、第１
のプリント配線板３に形成された第１の配線パターン３
０と、第２のプリント配線板５に形成された第２の配線
パターン３１との間の導通をとるための導通路を金めつ
きスルーホール５Ｂにより構成するようにした場合につ
いて述べたが、本発明はこれに限らず、導通路として
は、金以外のめつき材料を用いて形成されためつきスル
ーホールや、又はビア等を広く適用することができる。Further, in the above-described embodiment, the first
Wiring pattern 3 formed on printed wiring board 3
Although a case has been described in which a conduction path for establishing conduction between 0 and the second wiring pattern 31 formed on the second printed wiring board 5 is formed by the plated through hole 5B, The present invention is not limited to this, and as the conducting path, a through hole or a via formed by using a plating material other than gold can be widely applied.
【００３５】さらに上述の実施の形態においては、第１
のプリント配線板３の第１の配線パターン３０の所定位
置と、第２のプリント配線板５の一面側に露出する金め
つきスルーホール５Ｂの端部とを接合する導電性接合材
としてクリームはんだ２０を適用するようにした場合に
ついて述べたが、本発明はこれに限らずはんだ以外のこ
の他種々の導電性接合材料を広く適用することができ
る。Further, in the above embodiment, the first
Cream solder as a conductive bonding material for bonding a predetermined position of the first wiring pattern 30 of the printed wiring board 3 to an end of the plated through hole 5B exposed on one surface side of the second printed wiring board 5 Although the case where 20 is applied has been described, the present invention is not limited to this, and various other conductive bonding materials other than solder can be widely applied.
【００３６】さらに上述の実施の形態においては、第１
のプリント配線板３上にベアチツプ２を実装し、第２の
プリント配線板５上にベアチツプ２以外の電子部品４
Ａ、４Ｂを実装するようにした場合について述べたが、
本発明はこれに限らず、要は、実装工程の異なる第１及
び第２の電子部品を第１及び第２のプリント配線板３、
５上に分けて実装するのであれば、第１及び第２のプリ
ント配線板３、５上にどのような電子部品を実装するか
は自在に選定することができる。Further, in the above-described embodiment, the first
The chip 2 is mounted on the printed circuit board 3 and the electronic components 4 other than the chip 2 are mounted on the second printed circuit board 5.
A and 4B have been described as being implemented.
The present invention is not limited to this, and the point is that the first and second electronic components having different mounting processes are connected to the first and second printed wiring boards 3,
5, the electronic components to be mounted on the first and second printed wiring boards 3 and 5 can be freely selected.
【００３７】[0037]
【発明の効果】上述のように本発明によれば、実装工程
が異なる第１及び第２の電子部品が実装される配線板に
おいて、一面に形成された第１の配線パターン上に第１
の電子部品が実装された第１の配線板と、第１の電子部
品と干渉しないように一面側に凹部が設けられると共
に、他面側に第２の電子部品を実装するための所定の第
２の配線パターンが形成され、かつ第１及び第２の配線
パターン間の導通をとるための導電材からなる導通路が
内部に設けられた第２の配線板と、第１の配線板の第１
の配線パターンの所定位置と、第２の配線板の一面側に
露出する導通路とを接合する導電性接合材とを設けるよ
うにしたことにより、例えば第１及び第２の電子部品を
対応する第１又は第２の配線パターン上に実装するため
に必要なはんだを第１及び第２の配線パターンの各所定
位置にそれぞれ安定して一定量ずつ供給することがで
き、かくして生産性を向上させ得る配線板を実現でき
る。As described above, according to the present invention, in a wiring board on which first and second electronic components having different mounting processes are mounted, the first wiring pattern is formed on the first wiring pattern formed on one surface.
A first wiring board on which the first electronic component is mounted, a concave portion provided on one surface side so as not to interfere with the first electronic component, and a predetermined first portion for mounting the second electronic component on the other surface side. A second wiring board in which a second wiring pattern is formed, and a conduction path made of a conductive material for establishing conduction between the first and second wiring patterns is provided therein; 1
By providing a conductive bonding material for bonding a predetermined position of the wiring pattern and a conductive path exposed on one surface side of the second wiring board, for example, the first and second electronic components correspond to each other. Solder necessary for mounting on the first or second wiring pattern can be stably supplied to each predetermined position of the first and second wiring patterns by a fixed amount, thereby improving productivity. The obtained wiring board can be realized.
【００３８】また実装工程が異なる第１及び第２の電子
部品が実装される配線板の製造方法において、一面に所
定の第１の配線パターンを有し、当該第１の配線パター
ン上に第１の電子部品が実装された第１の配線板と、第
１の配線板に実装された第１の電子部品に対応させて、
一面側に第１の電子部品と干渉しないように凹部が設け
られると共に、他面側に第２の電子部品を実装するため
の所定の第２の配線パターンが形成され、かつ第１及び
第２の配線パターン間の導通をとるための導電材からな
る導通路が内部に設けられた第２の配線板とを作製する
第１の工程と、第１の配線板の第１の配線パターンの所
定位置と、第２の配線板の導通路とを所定の導電性接合
材を用いて接合する第２の工程とを設けるようにしたこ
とにより、このようにして製造された配線板では例えば
第１及び第２の電子部品を対応する第１又は第２の配線
パターン上に実装するために必要なはんだを第１及び第
２の配線パターンの各所定位置にそれぞれ安定して一定
量ずつ供給することができ、かくして生産性を向上させ
得る配線板の製造方法を実現できる。In a method of manufacturing a wiring board on which first and second electronic components having different mounting steps are mounted, a predetermined first wiring pattern is provided on one surface, and the first wiring pattern is provided on the first wiring pattern. A first wiring board on which the electronic component is mounted, and a first electronic component mounted on the first wiring board,
A concave portion is provided on one surface side so as not to interfere with the first electronic component, and a predetermined second wiring pattern for mounting the second electronic component is formed on the other surface side, and the first and second wiring patterns are formed. A first step of fabricating a second wiring board in which a conductive path made of a conductive material for establishing conduction between the first and second wiring patterns is provided; By providing a second step of joining the position and the conduction path of the second wiring board using a predetermined conductive bonding material, the wiring board manufactured in this manner has, for example, the first step. And supplying solder necessary for mounting the second electronic component on the corresponding first or second wiring pattern to each of predetermined positions of the first and second wiring patterns in a stable and constant amount. Of printed wiring boards that can produce and thus increase productivity The law can be realized.
【図１】本発明を適用した回路基板の構成を示す略線的
な断面図である。FIG. 1 is a schematic sectional view showing a configuration of a circuit board to which the present invention is applied.
【図２】本発明を適用した回路基板の製造手順の説明に
供する略線的な斜視図及び断面図である。FIGS. 2A and 2B are a schematic perspective view and a cross-sectional view for explaining a manufacturing procedure of a circuit board to which the present invention is applied.
【図３】本発明を適用した回路基板の製造手順の説明に
供する略線的な断面図である。FIG. 3 is a schematic cross-sectional view for explaining a procedure for manufacturing a circuit board to which the present invention is applied.
【図４】本発明を適用した回路基板の製造手順の説明に
供する略線的な断面図である。FIG. 4 is a schematic cross-sectional view for explaining a procedure for manufacturing a circuit board to which the present invention is applied.
１……回路基板、２……ベアチツプ、３、５……プリン
ト配線板、４Ａ、４Ｂ……電子部品、５ＡＸ……凹部、
５Ｂ……金めつきスルーホール、６、８、１０……ラン
ド、２０……クリームはんだ。1 ... Circuit board, 2 ... Bear chip, 3,5 ... Printed wiring board, 4A, 4B ... Electronic component, 5AX ... Recess,
5B: Through hole with gold plating, 6, 8, 10: Land, 20: Cream solder.
Claims (4)
が実装される配線板において、 一面に所定の第１の配線パターンを有し、当該第１の配
線パターン上に上記第１の電子部品が実装された第１の
配線板と、 上記第１の配線板に実装された上記第１の電子部品に対
応させて、一面側に上記第１の電子部品と干渉しないよ
うに凹部が設けられると共に、他面側に上記第２の電子
部品を実装するための所定の第２の配線パターンが形成
され、かつ上記第１及び第２の配線パターン間の導通を
とるための導電材からなる導通路が内部に設けられた第
２の配線板と、 上記第１の配線板の上記第１の配線パターンの所定位置
と、上記第２の配線板の上記一面側に露出する上記導通
路の端部とを接合する導電性接合材とを具えることを特
徴とする配線板。1. A wiring board on which first and second electronic components having different mounting steps are mounted, the circuit board having a predetermined first wiring pattern on one surface, and the first wiring pattern on the first wiring pattern. A first wiring board on which the electronic component is mounted, and a concave portion on one surface side corresponding to the first electronic component mounted on the first wiring board so as not to interfere with the first electronic component. A predetermined second wiring pattern for mounting the second electronic component is formed on the other surface side, and a conductive material for establishing conduction between the first and second wiring patterns is provided. A second wiring board having a conductive path formed therein, a predetermined position of the first wiring pattern of the first wiring board, and the conductive path exposed on the one surface side of the second wiring board. A conductive bonding material for bonding an end of the wiring .
線板の上記凹部と外部とを連通する貫通孔が穿設された
ことを特徴とする請求項１に記載の配線板。2. The wiring board according to claim 1, wherein a through hole is formed in the first or second wiring board so as to communicate the recess of the second wiring board with the outside. .
が実装される配線板の製造方法において、 一面に所定の第１の配線パターンを有し、当該第１の配
線パターン上に上記第１の電子部品が実装された第１の
配線板と、上記第１の配線板に実装された上記第１の電
子部品に対応させて、一面側に上記第１の電子部品と干
渉しないように凹部が設けられると共に、他面側に上記
第２の電子部品を実装するための所定の第２の配線パタ
ーンが形成され、かつ上記第１及び第２の配線パターン
間の導通をとるための導電材からなる導通路が内部に設
けられた第２の配線板とを作製する第１の工程と、 上記第１の配線板の上記第１の配線パターンの所定位置
と、上記第２の配線板の上記一面側に露出する上記導通
路の端部とを所定の導電性接合材を用いて接合する第２
の工程とを具えることを特徴とする配線板の製造方法。3. A method of manufacturing a wiring board on which first and second electronic components having different mounting steps are mounted, wherein the first wiring pattern has a predetermined first wiring pattern on one surface, and the first wiring pattern is provided on the first wiring pattern. The first wiring board on which the first electronic component is mounted, and the first electronic component mounted on the first wiring board are made to correspond to the first electronic component on one side so as not to interfere with the first electronic component. A second wiring pattern for mounting the second electronic component is formed on the other surface side, and a continuity between the first and second wiring patterns is provided. A first step of manufacturing a second wiring board having a conductive path made of a conductive material therein, a predetermined position of the first wiring pattern of the first wiring board, and a second wiring A predetermined conductive bonding material with the end of the conductive path exposed on the one surface side of the plate; Second joining using
A method for manufacturing a wiring board, comprising the steps of:
部と外部とを連通する貫通孔を穿設することを特徴とす
る請求項３に記載の配線板の製造方法。4. The method according to claim 1, wherein in the first step, a through hole is formed in the first or second wiring board so as to communicate the recess of the second wiring board with the outside. 4. The method for manufacturing a wiring board according to item 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10015804A JPH11214819A (en) | 1998-01-28 | 1998-01-28 | Wiring board and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10015804A JPH11214819A (en) | 1998-01-28 | 1998-01-28 | Wiring board and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11214819A true JPH11214819A (en) | 1999-08-06 |
Family
ID=11899038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10015804A Pending JPH11214819A (en) | 1998-01-28 | 1998-01-28 | Wiring board and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11214819A (en) |
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| JP2003060353A (en) * | 2001-08-09 | 2003-02-28 | Murata Mfg Co Ltd | Electronic component unit and manufacturing method therefor |
| EP1478023A1 (en) * | 2002-02-19 | 2004-11-17 | Matsushita Electric Industrial Co., Ltd. | Module part |
| JP2007250608A (en) * | 2006-03-14 | 2007-09-27 | Element Denshi:Kk | Circuit board including hollow part, method for manufacturing the same, method for manufacturing circuit device using the same |
| JP2007318048A (en) * | 2006-05-29 | 2007-12-06 | Ibiden Co Ltd | Multilayer wiring board and manufacturing method therefor |
| JP2009130196A (en) * | 2007-11-26 | 2009-06-11 | Shinko Electric Ind Co Ltd | Semiconductor device |
| JP2010147955A (en) * | 2008-12-22 | 2010-07-01 | Element Denshi:Kk | Circuit board including cavity and method of manufacturing the same |
| WO2011071111A1 (en) * | 2009-12-09 | 2011-06-16 | 株式会社村田製作所 | Resin substrate with built-in electronic component and electronic circuit module |
| CN105101636A (en) * | 2014-05-23 | 2015-11-25 | 三星电机株式会社 | Printed circuit board, method for manufacturing the same and package on package having the same |
-
1998
- 1998-01-28 JP JP10015804A patent/JPH11214819A/en active Pending
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| US8107253B2 (en) | 1999-09-02 | 2012-01-31 | Ibiden Co., Ltd. | Printed circuit board |
| EP1744606A2 (en) * | 1999-09-02 | 2007-01-17 | Ibiden Co., Ltd. | Printed circuit board and method for producing the printed circuit board |
| EP1744606A3 (en) * | 1999-09-02 | 2007-04-11 | Ibiden Co., Ltd. | Printed circuit board and method for producing the printed circuit board |
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| US8331102B2 (en) | 1999-09-02 | 2012-12-11 | Ibiden Co., Ltd. | Printed circuit board |
| US7307852B2 (en) | 1999-09-02 | 2007-12-11 | Ibiden Co., Ltd. | Printed circuit board and method for manufacturing printed circuit board |
| US9060446B2 (en) | 1999-09-02 | 2015-06-16 | Ibiden Co., Ltd. | Printed circuit board |
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| JP2003060353A (en) * | 2001-08-09 | 2003-02-28 | Murata Mfg Co Ltd | Electronic component unit and manufacturing method therefor |
| EP1478023A4 (en) * | 2002-02-19 | 2008-12-31 | Panasonic Corp | Module part |
| EP1478023A1 (en) * | 2002-02-19 | 2004-11-17 | Matsushita Electric Industrial Co., Ltd. | Module part |
| JP2007250608A (en) * | 2006-03-14 | 2007-09-27 | Element Denshi:Kk | Circuit board including hollow part, method for manufacturing the same, method for manufacturing circuit device using the same |
| JP2007318048A (en) * | 2006-05-29 | 2007-12-06 | Ibiden Co Ltd | Multilayer wiring board and manufacturing method therefor |
| US8208268B2 (en) | 2007-11-26 | 2012-06-26 | Shinko Electric Industries Co., Ltd. | Semiconductor apparatus |
| KR101498736B1 (en) * | 2007-11-26 | 2015-03-04 | 신코 덴키 코교 가부시키가이샤 | semiconductor device |
| JP2009130196A (en) * | 2007-11-26 | 2009-06-11 | Shinko Electric Ind Co Ltd | Semiconductor device |
| JP2010147955A (en) * | 2008-12-22 | 2010-07-01 | Element Denshi:Kk | Circuit board including cavity and method of manufacturing the same |
| WO2011071111A1 (en) * | 2009-12-09 | 2011-06-16 | 株式会社村田製作所 | Resin substrate with built-in electronic component and electronic circuit module |
| CN102648671A (en) * | 2009-12-09 | 2012-08-22 | 株式会社村田制作所 | Resin substrate with built-in electronic component and electronic circuit module |
| US20120236508A1 (en) * | 2009-12-09 | 2012-09-20 | Murata Manufacturing Co., Ltd. | Electronic-component embedded resin substrate and electronic circuit module |
| JP5229401B2 (en) * | 2009-12-09 | 2013-07-03 | 株式会社村田製作所 | Resin substrate with built-in electronic components and electronic circuit module |
| CN105101636A (en) * | 2014-05-23 | 2015-11-25 | 三星电机株式会社 | Printed circuit board, method for manufacturing the same and package on package having the same |
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