JPH11153788A - Substrate for driving liquid crystal and manufacturing method thereof - Google Patents

Substrate for driving liquid crystal and manufacturing method thereof

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Publication number
JPH11153788A
JPH11153788A JP33629297A JP33629297A JPH11153788A JP H11153788 A JPH11153788 A JP H11153788A JP 33629297 A JP33629297 A JP 33629297A JP 33629297 A JP33629297 A JP 33629297A JP H11153788 A JPH11153788 A JP H11153788A
Authority
JP
Japan
Prior art keywords
liquid crystal
substrate
film
semiconductor substrate
stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33629297A
Other languages
Japanese (ja)
Inventor
Toru Tomikawa
徹 富川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP33629297A priority Critical patent/JPH11153788A/en
Publication of JPH11153788A publication Critical patent/JPH11153788A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for driving a liquid crystal, which is able to make a gap with a counter electrode uniform by easily eliminating a warp without making the process excessibly complicated. SOLUTION: In a substrate 15 for driving liquid crystal wherein at least, switching elements for driving liquid crystal, wiring layers 7 to be electrically connected with the switching elements, a surface insulating layer 8, and picture element electrodes 9 to be electrically connected with the wiring layer 7 are formed on a surface of a semiconductor substrate 1, a stress counterbalance film 17 having a stress offsetting a warp caused by an internal stress occurring the semiconductor substrate 1 is formed on the rear of the semiconductor substrate 1. Thus, the warp is eliminated and the gap with the counter electrode is made uniform.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、反射型の液晶表示
装置に用いられる液晶駆動用基板及びその製造方法に係
り、特に液晶駆動用基板の反りをなくすものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving substrate used in a reflection type liquid crystal display device and a method of manufacturing the same, and more particularly to eliminating the warpage of the liquid crystal driving substrate.

【0002】[0002]

【従来の技術】液晶駆動用基板の例として、シリコン基
板を用い、その基板上に液晶表示素子のスイッチング素
子、シフトレジスタ、画素電極等を設けるアクティブマ
トリックス回路が知られている。一般に、透過型の液晶
表示装置では液晶駆動用基板としてガラス基板や石英基
板が用いられるが、反射型の液晶表示装置では、シリコ
ン基板が用いられ、この上に液晶駆動用回路や画素電極
が設けられる。反射型の液晶表示装置は、この液晶駆動
用基板と対向電極基板との間に液晶を封止し、画素のス
イッチング素子の投入により画素電極と対向電極の間に
電圧を印加し、液晶を駆動させるものであり、画素電極
により入射光を反射させることにより動作する。
2. Description of the Related Art As an example of a liquid crystal driving substrate, there is known an active matrix circuit using a silicon substrate on which a switching element of a liquid crystal display element, a shift register, a pixel electrode and the like are provided. Generally, a glass substrate or a quartz substrate is used as a liquid crystal driving substrate in a transmissive liquid crystal display device, while a silicon substrate is used in a reflective liquid crystal display device, on which a liquid crystal driving circuit and pixel electrodes are provided. Can be The reflection type liquid crystal display device drives the liquid crystal by sealing the liquid crystal between the liquid crystal driving substrate and the counter electrode substrate, applying a voltage between the pixel electrode and the counter electrode by turning on the switching element of the pixel. It operates by reflecting incident light by the pixel electrode.

【0003】通常、シリコン基板上に液晶駆動用回路や
画素電極を設ける場合、スイッチング素子となるトラン
ジスタ形成後、層間絶縁膜と金属配線膜が多層に重ね合
わせられる。この反射型の液晶駆動用基板の製造方法を
図3を参照して説明する。図中、1はシリコン基板であ
り、このシリコン基板1上に素子分離酸化膜16、ゲー
ト酸化膜2、ゲート電極3を形成した後、これらの素子
分離酸化膜16、ゲート電極3をマスクとして、ドレイ
ン及びソース用の拡散層4を設けて、スイッチング素子
としてのトランジスタ5を形成する。そして、このトラ
ンジスタ5の上を覆って層間絶縁膜6を形成した後、層
間接続孔を開口して配線層7を形成してドレインやソー
スとのコンタクトを図る。更にこの上に表面絶縁層8を
設けた後、画素電極9を形成する。液晶表示装置は、こ
の画素電極と、これに対向させて配置される対向電極と
の間に液晶を封入して構成される。この図3では配線が
二層の場合について説明したが、三層以上の配線を用い
ることもある。
Usually, when a liquid crystal driving circuit and a pixel electrode are provided on a silicon substrate, after forming a transistor serving as a switching element, an interlayer insulating film and a metal wiring film are superposed in multiple layers. A method of manufacturing this reflective liquid crystal driving substrate will be described with reference to FIG. In FIG. 1, reference numeral 1 denotes a silicon substrate. An element isolation oxide film 16, a gate oxide film 2, and a gate electrode 3 are formed on the silicon substrate 1, and these element isolation oxide film 16, gate electrode 3 are used as a mask. A diffusion layer 4 for a drain and a source is provided to form a transistor 5 as a switching element. After an interlayer insulating film 6 is formed over the transistor 5, an interlayer connection hole is opened to form a wiring layer 7, and a contact with a drain or a source is made. After the surface insulating layer 8 is further provided thereon, the pixel electrode 9 is formed. The liquid crystal display device has a configuration in which liquid crystal is sealed between the pixel electrode and a counter electrode arranged to face the pixel electrode. Although FIG. 3 illustrates a case where the wiring has two layers, a wiring having three or more layers may be used.

【0004】一般に、画素電極の反射率を向上し、画質
品位を高めるためには、画素電極9を平坦化し、また対
向電極とのギャップを均一にする必要から、画素電極9
の形成前にCMP(化学的機械的研磨)による平坦化が
行なわれる。すなわち、表面絶縁層8を形成した後にC
MPを行なってこの上面を平坦化し、次に、層間接続孔
を開口して、これを埋め込むようにして画素電極9を形
成する。
Generally, in order to improve the reflectance of the pixel electrode and improve the image quality, it is necessary to flatten the pixel electrode 9 and make the gap between the pixel electrode 9 and the counter electrode uniform.
Is formed by CMP (Chemical Mechanical Polishing) prior to the formation. That is, after forming the surface insulating layer 8, C
MP is performed to flatten the upper surface, and then an interlayer connection hole is opened and the pixel electrode 9 is formed so as to be buried.

【0005】[0005]

【発明が解決しようとする課題】ところで、上述のよう
に、シリコン基板1上に液晶駆動用回路や金属配線層
7、画素電極9を形成する場合、これらの膜はトランジ
スタ5上にシリコン基板1の片面に成膜される。そのた
め、図4に示すように、層間絶縁膜6や配線層7の形成
前のシリコン基板1は平坦であっても、熱CVD法で成
膜した絶縁膜用のSi酸化膜や絶縁層用のAl合金など
の膜は引っ張り応力を持っているために液晶駆動用基板
9は図5に示すように画素電極9側を内側として凹形状
になってしまう。そのため、図6に示すように、液晶駆
動用基板15と対向電極10の設けられた対向電極基板
11とを張り合わせて内部に液晶12を封じ込めた場
合、液晶駆動用基板15が凹形状に変形しているため均
一なギャップが得られずに画像品位が低下する場合があ
った。尚、13は液晶12を封じるシール材である。
As described above, when the liquid crystal driving circuit, the metal wiring layer 7, and the pixel electrode 9 are formed on the silicon substrate 1, these films are formed on the transistor 5 on the silicon substrate 1. Is formed on one side. Therefore, as shown in FIG. 4, even if the silicon substrate 1 before the formation of the interlayer insulating film 6 and the wiring layer 7 is flat, the silicon oxide film for the insulating film formed by the thermal CVD method or the silicon oxide film for the insulating layer is formed. Since a film of an Al alloy or the like has a tensile stress, the liquid crystal driving substrate 9 becomes concave with the pixel electrode 9 side inside as shown in FIG. Therefore, as shown in FIG. 6, when the liquid crystal driving substrate 15 and the counter electrode substrate 11 provided with the counter electrode 10 are bonded to each other and the liquid crystal 12 is sealed therein, the liquid crystal driving substrate 15 is deformed into a concave shape. As a result, a uniform gap could not be obtained, and the image quality sometimes deteriorated. Reference numeral 13 denotes a sealing material for sealing the liquid crystal 12.

【0006】そこで、液晶封入空間において均一なギャ
ップを得るために図7に示すように、一方の基板、例え
ば液晶駆動用基板15上に均一な大きさの球状のギャッ
プ調整用スペーサ14を散りばめ、もう一方の基板11
の上から力Fを加え、液晶注入孔を除いた部分をシール
材13で封止し、セル内部が適当な圧力(大気圧より低
い圧力)となるように液晶12を注入封止し、組み立て
る方法が行なわれている。しかしながら、この場合に
は、スペーサ14が画素電極9を傷つけて画素間のショ
ートが発生する等の問題が生じるおそれがある。また、
他の方法として、特開平7−209634号公報に開示
するように、シリコン基板の下面の所定の箇所にマスク
層を形成してシリコン基板の反りを解消する方法や、特
開平8−114789号公報に開示されているように、
熱膨張係数の違う熱硬化樹脂板を貼り合わせて予め相殺
する反りの量だけ反対側に反りを与えておく方法が提案
されている。
Therefore, in order to obtain a uniform gap in the liquid crystal enclosing space, as shown in FIG. 7, a spherical gap adjusting spacer 14 having a uniform size is scattered on one substrate, for example, a liquid crystal driving substrate 15. The other substrate 11
A force F is applied from above, and the portion excluding the liquid crystal injection hole is sealed with a sealing material 13, and the liquid crystal 12 is injected and sealed so that the inside of the cell is at an appropriate pressure (pressure lower than the atmospheric pressure), and assembled. The method has been done. However, in this case, there is a possibility that the spacer 14 may damage the pixel electrode 9 and cause a short circuit between pixels. Also,
As another method, as disclosed in Japanese Patent Application Laid-Open No. 7-209634, a method of forming a mask layer at a predetermined position on the lower surface of a silicon substrate to eliminate the warpage of the silicon substrate, and Japanese Patent Application Laid-Open No. 8-114789. As disclosed in
A method has been proposed in which thermosetting resin plates having different coefficients of thermal expansion are bonded to each other, and a warp is given to the opposite side in advance by the amount of the warping that cancels out in advance.

【0007】しかしながら、前者は成膜操作とマスク用
エッチング操作を行なうことから、プロセスが過度に複
雑になるという問題を有し、また、後者は対向電極とな
るガラス基板の反りの測定及び選別を行わなければなら
ず、操作が繁雑になるという問題を有している。
However, the former has a problem that the process is excessively complicated since the film forming operation and the etching operation for the mask are performed, and the latter has a problem of measuring and selecting the warpage of the glass substrate as the counter electrode. However, there is a problem that the operation must be performed and the operation becomes complicated.

【0008】本発明は、以上のような問題点に着目し、
これを有効に解決すべく創案されたものであり、その目
的は、プロセスを過度に複雑化させることなく容易に反
りを解消し、対向電極とのギャップを均一にすることが
できる液晶駆動用基板及びその製造方法を提供すること
にある。
The present invention focuses on the above problems,
The purpose of this invention is to solve this problem effectively, and the purpose is to easily eliminate warpage without excessively complicating the process and to make the gap with the counter electrode uniform. And a method for manufacturing the same.

【0009】[0009]

【課題を解決するための手段】本発明は、上記問題点を
解決するために、半導体基板の表面に、少なくとも液晶
駆動用のスイッチング素子と、これに電気的に接続され
る配線層と、表面絶縁層と、前記配線層に電気的に接続
される画素電極とを形成してなる液晶駆動用基板におい
て、前記半導体基板の裏面に、前記半導体基板に発生し
た内部応力に起因する反りを相殺する応力を持った応力
相殺膜を設けるようにしたものである。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides at least a switching element for driving a liquid crystal, a wiring layer electrically connected to the switching element, In a liquid crystal driving substrate formed with an insulating layer and a pixel electrode electrically connected to the wiring layer, a back surface of the semiconductor substrate cancels a warp caused by an internal stress generated in the semiconductor substrate. A stress canceling film having a stress is provided.

【0010】これにより、成膜によって半導体基板に発
生する内部応力を、応力相殺膜によって発生する反対方
向への応力によって相殺することができ、これにより半
導体基板の反りを抑制する。このような応力相殺膜は、
半導体膜、絶縁体膜、導電性膜等で形成でき、特に、導
電性膜を用いた場合には、この導電性膜と半導体基板と
の導通をとって、半導体基板の電位を制御することが可
能となる。
Thus, the internal stress generated in the semiconductor substrate by the film formation can be offset by the stress in the opposite direction generated by the stress canceling film, thereby suppressing the warpage of the semiconductor substrate. Such a stress canceling film,
The conductive film can be formed of a semiconductor film, an insulator film, a conductive film, or the like. In particular, when a conductive film is used, conduction between the conductive film and the semiconductor substrate can be performed to control the potential of the semiconductor substrate. It becomes possible.

【0011】また、本発明方法は、半導体基板の表面に
液晶駆動用のスイッチング素子を形成し、このスイッチ
ング素子上にこのスイッチング素子と電気的に接続した
配線層と表面絶縁層を形成し、この表面絶縁層の表面を
研磨して平坦化した後に、前記配線層と電気的に接続し
た画素電極を形成するようにした液晶駆動用基板の製造
方法において、前記表面絶縁層を研磨して平坦化する前
に、前記半導体基板の裏面に、この半導体基板に発生し
た内部応力に起因する反りを相殺する応力を持った応力
相殺膜を形成するようにしたものである。これにより、
応力相殺膜の成膜時に表面絶縁層にゴミや傷がついて
も、この研磨平坦化処理時にこのゴミや傷を除去するこ
とが可能となる。
Further, according to the method of the present invention, a switching element for driving a liquid crystal is formed on a surface of a semiconductor substrate, and a wiring layer and a surface insulating layer electrically connected to the switching element are formed on the switching element. In the method for manufacturing a liquid crystal driving substrate, wherein a pixel electrode electrically connected to the wiring layer is formed after polishing and flattening the surface of the surface insulating layer, the surface insulating layer is flattened by polishing. Prior to this, a stress canceling film having a stress for canceling the warpage caused by the internal stress generated in the semiconductor substrate is formed on the back surface of the semiconductor substrate. This allows
Even if dusts and scratches are formed on the surface insulating layer when the stress canceling film is formed, the dusts and scratches can be removed during the polishing and flattening process.

【0012】[0012]

【発明の実施の形態】以下に、本発明に係る液晶駆動用
基板及びその製造方法の一実施例を添付図面に基づいて
詳述する。尚、先に説明した図における構成部分と同一
部分については同一符号を付して説明する。本発明のポ
イントは、図2(C)に示すように半導体基板としての
シリコン基板1の裏面側に応力相殺膜17を形成し、こ
の応力相殺膜17が発生する反対方向への応力により、
シリコン基板1の表面側に形成した各種の膜に起因して
発生する応力を相殺し、この基板1の反りを抑制して平
坦に維持した点にある。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a liquid crystal driving substrate and a method of manufacturing the same according to the present invention will be described below in detail with reference to the accompanying drawings. The same components as those in the above-described drawings are denoted by the same reference numerals and described. The point of the present invention is that a stress canceling film 17 is formed on the back side of the silicon substrate 1 as a semiconductor substrate as shown in FIG.
The point is that the stress generated due to various films formed on the surface side of the silicon substrate 1 is offset, the warpage of the substrate 1 is suppressed, and the silicon substrate 1 is kept flat.

【0013】このシリコン基板1の表面側に形成される
スイッチング素子としてのトランジスタ等の構造は、先
の従来装置で説明した構造と全く同じである。すなわ
ち、図1において、1は半導体基板としてのシリコン基
板であり、このシリコン基板1上に素子分離酸化膜1
6、ゲート酸化膜2、ゲート電極3を形成した後、これ
らの酸化膜16、ゲート電極3をマスクとしてドレイン
及びソース用の拡散層4を設けて、スイッチング素子と
してのトランジスタ5を形成する。そして、このトラン
ジスタ5の上を覆って層間絶縁膜6を形成した後、層間
接続孔を開口して配線層7を形成してドレインやソース
とのコンタクトを図る。
The structure of a transistor or the like as a switching element formed on the front surface side of the silicon substrate 1 is exactly the same as the structure described in the prior art device. That is, in FIG. 1, reference numeral 1 denotes a silicon substrate as a semiconductor substrate, and an element isolation oxide film 1
6. After the gate oxide film 2 and the gate electrode 3 are formed, the drain and source diffusion layers 4 are provided using the oxide film 16 and the gate electrode 3 as masks to form the transistor 5 as a switching element. After an interlayer insulating film 6 is formed over the transistor 5, an interlayer connection hole is opened to form a wiring layer 7, and a contact with a drain or a source is made.

【0014】次に、この配線層7及び層間絶縁膜6上
に、例えばSiO2 などよりなる表面絶縁層8を形成す
る。この時の縮小図は図2(A)に示されており、これ
までの製造工程は従来装置の場合と同じである。この段
階では、図2(A)に示すように、シリコン基板1上に
形成された金属膜よりなる配線層7や絶縁膜6、8等が
有する引っ張り応力により、シリコン基板1は中央を窪
ませるようにして、図中上側へ凹状に反って僅かに変形
している。そこで、この反りを相殺するように、次に、
図2(B)に示すようにシリコン基板1の裏面(下面)
に応力相殺膜17を成膜する。この場合、応力相殺膜1
7の応力は、後工程で表面側に形成される画素電極9の
応力も加味して全体で略つり合う大きさとなるように設
定する。
Next, a surface insulating layer 8 made of, for example, SiO 2 is formed on the wiring layer 7 and the interlayer insulating film 6. A reduced view at this time is shown in FIG. 2A, and the manufacturing steps up to this point are the same as those of the conventional apparatus. At this stage, as shown in FIG. 2A, the center of the silicon substrate 1 is depressed by the tensile stress of the wiring layer 7 made of a metal film formed on the silicon substrate 1 and the insulating films 6, 8, and the like. Thus, it is slightly deformed in a concavely upward manner in the figure. So, to offset this warpage,
As shown in FIG. 2B, the back surface (lower surface) of the silicon substrate 1
Then, a stress canceling film 17 is formed. In this case, the stress canceling film 1
The stress of 7 is set so as to be substantially balanced as a whole, taking into account the stress of the pixel electrode 9 formed on the front surface side in a later step.

【0015】従って、この応力相殺膜17をシリコン基
板1の裏面に成膜した時点では、シリコン基板1は逆に
凸形状に変形することになる。ここで、応力相殺膜17
は金属膜、絶縁膜、半導体膜或いはこれらを重ね合わせ
た膜のいずれでもかまわない。具体的には、この応力相
殺膜17としては、チタンやアルミ合金等を用いること
ができる。ただし、シリコン基板1の電位を外部から制
御するために、この応力相殺膜17を金属膜とするのが
適当である。シリコン基板1の裏面に応力相殺膜17の
成膜を行なう際、基板1の表面側の表面絶縁層8にごみ
が付着したり、これに傷が付く恐れがあるが、上述した
ように応力相殺膜17の成膜を表面絶縁層8の成膜後に
行なえば、この表面絶縁層8にはCMP(化学的機械的
研磨)が施されるので、これに付着したごみや傷は除去
することができる。このCMPは基板表面を平坦にする
ために一般的に行なわれる手法であり、特に画素電極の
良好な反射率が要求される反射型の液晶表示装置では画
素電極が形成される前のCMPによる表面平坦化は必要
不可欠な工程である。
Therefore, when the stress canceling film 17 is formed on the back surface of the silicon substrate 1, the silicon substrate 1 is deformed into a convex shape. Here, the stress canceling film 17
May be a metal film, an insulating film, a semiconductor film, or a film in which these are stacked. Specifically, as the stress canceling film 17, titanium, an aluminum alloy, or the like can be used. However, in order to externally control the potential of the silicon substrate 1, it is appropriate that the stress canceling film 17 be a metal film. When the stress canceling film 17 is formed on the back surface of the silicon substrate 1, dust may adhere to the surface insulating layer 8 on the front surface side of the substrate 1 or may be scratched. If the film 17 is formed after the surface insulating layer 8 is formed, the surface insulating layer 8 is subjected to CMP (Chemical Mechanical Polishing), so that dust and scratches attached to the film 17 can be removed. it can. This CMP is a method generally performed to flatten the surface of a substrate. In particular, in a reflection type liquid crystal display device in which a good reflectance of a pixel electrode is required, the surface by the CMP before the pixel electrode is formed is used. Flattening is an essential step.

【0016】このように、表面の表面絶縁層8をCMP
により平坦化した後、図2(C)に示すように層間接続
孔を形成して、画素電極9を形成する。この時点で画素
電極9の有する応力によりシリコン基板1は再度両端が
上方へ引っ張られ、結果的に液晶駆動用基板15は略平
坦となる。このようにして略平坦な液晶駆動用基板15
を得ることができる。この後、この基板を対向電極と張
り合わせを行なうと、液晶を封入するための空間の厚み
が均一なギャップを得ることが可能になる。従って、こ
の平坦な液晶駆動用基板15を液晶表示装置に用いるこ
とにより、高品位な画像を得ることが可能となる。ま
た、本発明方法は、従来の製造方法に単に応力相殺膜1
7を形成する成膜工程を追加するだけで容易に採用する
ことができる。尚、本実施例にあっては、半導体基板と
してシリコン基板を例にとって説明したが、これに限定
されず、例えば化合物半導体基板を用いてもよい。
As described above, the surface insulating layer 8 on the surface is formed by CMP.
Then, as shown in FIG. 2C, an interlayer connection hole is formed, and a pixel electrode 9 is formed. At this point, both ends of the silicon substrate 1 are pulled upward again by the stress of the pixel electrode 9, and as a result, the liquid crystal driving substrate 15 becomes substantially flat. In this manner, the substantially flat liquid crystal driving substrate 15
Can be obtained. Thereafter, when this substrate is bonded to the counter electrode, it is possible to obtain a gap in which the thickness of the space for enclosing the liquid crystal is uniform. Therefore, by using this flat liquid crystal driving substrate 15 for a liquid crystal display device, it is possible to obtain a high quality image. Further, the method of the present invention is different from the conventional manufacturing method only in that the stress canceling film 1 is used.
7 can be easily adopted only by adding a film forming step. In the present embodiment, a silicon substrate has been described as an example of a semiconductor substrate. However, the present invention is not limited to this. For example, a compound semiconductor substrate may be used.

【0017】[0017]

【発明の効果】以上説明したように、本発明の液晶駆動
用基板及びその製造方法によれば、次のように優れた作
用効果を発揮することができる。半導体基板に発生した
応力による反りをなくすように半導体基板の裏面に応力
相殺膜を成膜するようにしたので、プロセスを過度に複
雑化させることなく最終的に半導体基板を略平坦にする
ことができる。従って、これと対向電極との張り合わせ
を行なうと液晶封入用のギャップの幅が均一になり、高
品位な画像を得ることができ、また液晶表示装置の製造
歩留りの向上が可能になる。また、半導体基板の裏面に
応力相殺膜を成膜する際に、基板表面側に付着する恐れ
のあるパーティクルや傷は、裏面成膜後に行なわれるC
MPにより除去できるので全く問題なく、また、本来の
CMPは必要なプロセスであるので製造工程の増加も最
小限に抑えることができる。更に、応力相殺膜を導電性
膜とすることにより、これと半導体基板との導通をとっ
て半導体基板の電位を制御することが可能となる。
As described above, according to the liquid crystal driving substrate and the method of manufacturing the same of the present invention, the following excellent effects can be obtained. Since a stress canceling film is formed on the back surface of the semiconductor substrate so as to eliminate warpage due to stress generated in the semiconductor substrate, it is possible to finally make the semiconductor substrate substantially flat without excessively complicating the process. it can. Therefore, when this is bonded to the counter electrode, the width of the gap for enclosing the liquid crystal becomes uniform, a high-quality image can be obtained, and the production yield of the liquid crystal display device can be improved. Further, when a stress canceling film is formed on the back surface of the semiconductor substrate, particles or scratches that may adhere to the front surface side of the substrate may be removed after the back surface is formed.
Since it can be removed by MP, there is no problem at all, and since the original CMP is a necessary process, an increase in the number of manufacturing steps can be minimized. Further, by using a conductive film as the stress canceling film, it is possible to control the electric potential of the semiconductor substrate by establishing conduction between the film and the semiconductor substrate.

【図面の簡単な説明】[Brief description of the drawings]

【図1】液晶駆動用基板の製造途中を示す拡大図であ
る。
FIG. 1 is an enlarged view showing a liquid crystal driving substrate in the process of being manufactured.

【図2】本発明の液晶駆動用基板及びこの製造方法を示
す図である。
FIG. 2 is a view showing a liquid crystal driving substrate of the present invention and a method of manufacturing the same.

【図3】一般的な液晶駆動基板を示す拡大図である。FIG. 3 is an enlarged view showing a general liquid crystal driving substrate.

【図4】スイッチング素子等の形成前の半導体基板を示
す図である。
FIG. 4 is a view showing a semiconductor substrate before forming a switching element and the like.

【図5】スイッチング素子等の形成後の半導体基板の反
りを示す図である。
FIG. 5 is a diagram showing warpage of a semiconductor substrate after forming a switching element and the like.

【図6】反りが入った半導体基板を用いた液晶表示装置
を示す図である。
FIG. 6 is a diagram showing a liquid crystal display device using a warped semiconductor substrate.

【図7】反りを防止した従来の半導体基板を用いた液晶
表示装置を示す図である。
FIG. 7 is a diagram showing a liquid crystal display device using a conventional semiconductor substrate in which warpage is prevented.

【符号の説明】[Explanation of symbols]

1…シリコン基板(半導体基板)、3…ゲート電極、4
…拡散層、5…トランジスタ(スイッチング素子)、7
…配線層、8…表面絶縁層、9…画素電極、10…対向
電極、12…液晶、15…液晶駆動用基板、17…応力
相殺膜。
DESCRIPTION OF SYMBOLS 1 ... Silicon substrate (semiconductor substrate), 3 ... Gate electrode, 4
... diffusion layer, 5 ... transistor (switching element), 7
... wiring layer, 8 ... surface insulating layer, 9 ... pixel electrode, 10 ... counter electrode, 12 ... liquid crystal, 15 ... liquid crystal driving substrate, 17 ... stress canceling film.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板の表面に、少なくとも液晶駆
動用のスイッチング素子と、これに電気的に接続される
配線層と、表面絶縁層と、前記配線層に電気的に接続さ
れる画素電極とを形成してなる液晶駆動用基板におい
て、前記半導体基板の裏面に、前記半導体基板に発生し
た内部応力に起因する反りを相殺する応力を持った応力
相殺膜を設けたことを特徴とする液晶駆動用基板。
At least a switching element for driving a liquid crystal, a wiring layer electrically connected to the switching element, a surface insulating layer, and a pixel electrode electrically connected to the wiring layer are provided on a surface of a semiconductor substrate. Wherein a stress canceling film having a stress for canceling a warp caused by an internal stress generated in the semiconductor substrate is provided on a back surface of the semiconductor substrate. Substrate.
【請求項2】 前記応力相殺膜は、半導体膜と、絶縁体
膜と、導電性膜の内のいずれか1つよりなることを特徴
とする請求項1記載の液晶駆動用基板。
2. The liquid crystal driving substrate according to claim 1, wherein the stress canceling film is made of any one of a semiconductor film, an insulator film, and a conductive film.
【請求項3】 前記応力相殺膜は、導電性膜であり、こ
の導電性膜は、前記半導体基板と導通がとられ、前記導
電性膜の電位を制御することにより、前記半導体基板の
電位を制御することを特徴とする1記載の液晶駆動用基
板。
3. The stress canceling film is a conductive film. The conductive film is electrically connected to the semiconductor substrate, and controls the potential of the conductive film to reduce the potential of the semiconductor substrate. 2. The liquid crystal driving substrate according to 1, wherein the substrate is controlled.
【請求項4】 半導体基板の表面に液晶駆動用のスイッ
チング素子を形成し、このスイッチング素子上にこのス
イッチング素子と電気的に接続した配線層と表面絶縁層
を形成し、この表面絶縁層の表面を研磨して平坦化した
後に、前記配線層と電気的に接続した画素電極を形成す
るようにした液晶駆動用基板の製造方法において、前記
表面絶縁層を研磨して平坦化する前に、前記半導体基板
の裏面に、この半導体基板に発生した内部応力に起因す
る反りを相殺する応力を持った応力相殺膜を形成するよ
うにしたことを特徴とする液晶駆動用基板の製造方法。
4. A switching element for driving a liquid crystal is formed on a surface of a semiconductor substrate, a wiring layer electrically connected to the switching element and a surface insulating layer are formed on the switching element, and a surface of the surface insulating layer is formed. After polishing and flattening, in the method of manufacturing a liquid crystal driving substrate so as to form a pixel electrode electrically connected to the wiring layer, before polishing and flattening the surface insulating layer, A method for manufacturing a substrate for driving a liquid crystal, characterized in that a stress canceling film having a stress for canceling a warp caused by an internal stress generated in the semiconductor substrate is formed on a back surface of the semiconductor substrate.
JP33629297A 1997-11-20 1997-11-20 Substrate for driving liquid crystal and manufacturing method thereof Pending JPH11153788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33629297A JPH11153788A (en) 1997-11-20 1997-11-20 Substrate for driving liquid crystal and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33629297A JPH11153788A (en) 1997-11-20 1997-11-20 Substrate for driving liquid crystal and manufacturing method thereof

Publications (1)

Publication Number Publication Date
JPH11153788A true JPH11153788A (en) 1999-06-08

Family

ID=18297602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33629297A Pending JPH11153788A (en) 1997-11-20 1997-11-20 Substrate for driving liquid crystal and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JPH11153788A (en)

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Publication number Priority date Publication date Assignee Title
EP1659621A1 (en) * 2004-11-20 2006-05-24 Samsung SDI Co., Ltd. Substrate including a deformation preventing layer
CN102213877A (en) * 2010-04-06 2011-10-12 北京京东方光电科技有限公司 Array substrate and LCD (liquid crystal display) panel as well as manufacturing method of array substrate
CN106200069A (en) * 2016-08-15 2016-12-07 深圳市华星光电技术有限公司 Flexible displays and curved face display panel thereof
WO2020195920A1 (en) * 2019-03-27 2020-10-01 東京エレクトロン株式会社 Film forming apparatus and film forming method
CN113410351A (en) * 2021-06-17 2021-09-17 錼创显示科技股份有限公司 Epitaxial semiconductor structure and epitaxial substrate
US11824016B2 (en) 2021-06-17 2023-11-21 PlayNitride Display Co., Ltd. Epitaxial semiconductor structure and epitaxial substrate

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1659621A1 (en) * 2004-11-20 2006-05-24 Samsung SDI Co., Ltd. Substrate including a deformation preventing layer
US7816666B2 (en) 2004-11-20 2010-10-19 Samsung Mobile Display Co., Ltd. Preventing substrate deformation
CN102213877A (en) * 2010-04-06 2011-10-12 北京京东方光电科技有限公司 Array substrate and LCD (liquid crystal display) panel as well as manufacturing method of array substrate
CN106200069A (en) * 2016-08-15 2016-12-07 深圳市华星光电技术有限公司 Flexible displays and curved face display panel thereof
WO2020195920A1 (en) * 2019-03-27 2020-10-01 東京エレクトロン株式会社 Film forming apparatus and film forming method
CN113410351A (en) * 2021-06-17 2021-09-17 錼创显示科技股份有限公司 Epitaxial semiconductor structure and epitaxial substrate
CN113410351B (en) * 2021-06-17 2022-11-08 錼创显示科技股份有限公司 Epitaxial semiconductor structure and epitaxial substrate
US11824016B2 (en) 2021-06-17 2023-11-21 PlayNitride Display Co., Ltd. Epitaxial semiconductor structure and epitaxial substrate

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