JPH11150155A - Manufacture of semiconductor device and circuit board holding jig there for - Google Patents
Manufacture of semiconductor device and circuit board holding jig there forInfo
- Publication number
- JPH11150155A JPH11150155A JP31722497A JP31722497A JPH11150155A JP H11150155 A JPH11150155 A JP H11150155A JP 31722497 A JP31722497 A JP 31722497A JP 31722497 A JP31722497 A JP 31722497A JP H11150155 A JPH11150155 A JP H11150155A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- semiconductor element
- thin
- thin circuit
- element mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置の製造
方法に関し、特に薄型回路基板を平坦に固定して半導体
素子をフリップチップ実装する半導体装置の製造方法お
よび該製造方法に用いる回路基板保持具に関する。The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which a thin circuit board is fixed flat and a semiconductor element is flip-chip mounted, and a circuit board holder used in the manufacturing method. About.
【０００２】[0002]
【従来の技術】近年、半導体素子の高集積化に伴い、半
導体装置の小型化および接続端子の狭ピッチ化が進み、
半導体素子をバンプを介して回路基板に実装するフリッ
プチップ実装技術が多く用いられる。図５は、フリップ
チップ実装技術を用いて作製した半導体装置の断面図で
ある。半導体素子１０１の下面にはアルミ電極端子１０
２が形成され、アルミ電極端子１０２以外の部分はＳｉ
酸化膜あるいは窒化膜等からなる絶縁膜１０３で覆われ
ている。アルミ電極端子１０２上には、Ａｕ、Ｃｕ等の
導電性金属材料からなるバンプ（突起電極）１０４が形
成されている。一方、回路基板１０５上には、回路パタ
ーン１０６および電極端子１０７が形成されている。半
導体素子１０１のバンプ１０４と回路基板１０５の電極
端子１０７とは、Ａｇ、Ｃｕ、Ｎｉ等の導電性金属材料
の粉体を樹脂中に含んだ導電性接着剤１０８により電気
的に接続され、回路基板１０５上に半導体素子１０１が
フェイスダウンでフリップチップ実装されている。ま
た、半導体素子１０１と回路基板１０５との間の隙間部
には、絶縁性の封止樹脂１０９が充填されている。封止
樹脂１０９は硬化することにより収縮応力が発生し、半
導体素子１０１と回路基板１０５とを引っ張った状態で
固定する。2. Description of the Related Art In recent years, as semiconductor elements have become more highly integrated, the size of semiconductor devices and the pitch of connection terminals have been reduced.
2. Description of the Related Art Flip chip mounting technology for mounting a semiconductor element on a circuit board via bumps is often used. FIG. 5 is a cross-sectional view of a semiconductor device manufactured by using the flip-chip mounting technique. An aluminum electrode terminal 10 is provided on the lower surface of the semiconductor element 101.
2 are formed, and portions other than the aluminum electrode terminals 102 are Si
It is covered with an insulating film 103 made of an oxide film or a nitride film. A bump (projection electrode) 104 made of a conductive metal material such as Au or Cu is formed on the aluminum electrode terminal 102. On the other hand, the circuit pattern 106 and the electrode terminals 107 are formed on the circuit board 105. The bumps 104 of the semiconductor element 101 and the electrode terminals 107 of the circuit board 105 are electrically connected to each other by a conductive adhesive 108 containing a powder of a conductive metal material such as Ag, Cu, or Ni in a resin. The semiconductor element 101 is flip-chip mounted face down on the substrate 105. The gap between the semiconductor element 101 and the circuit board 105 is filled with an insulating sealing resin 109. When the sealing resin 109 is cured, contraction stress is generated, and the semiconductor element 101 and the circuit board 105 are fixed in a stretched state.
【０００３】[0003]
【発明が解決しようとする課題】半導体装置の小型化、
低コスト化等の要請により、回路基板１０５には、薄型
の樹脂基板や板厚が０．４ｍｍ以下の薄型セラミック基
板等が用いられる。かかる回路基板１０５は剛性が低
く、容易に変形するため、例えば回路パターン１０６等
のような非対称な配線パターンを有する場合には、回路
基板１０５の作製工程における熱応力による変形が生
じ、回路基板１０５が局所的な反りやうねりを有するこ
ととなる。かかる回路基板１０５の局所的な反りやうね
りは、図６に示すような回路基板１０５の電極端子１０
７の高さのばらつきを生じ、半導体素子１０１を実装す
る場合に、回路基板１０５の反り等の凹部の電極端子１
０７に導電性接着剤１０８が届かず、電気的に接続不良
となるという問題点を有していた。特に、半導体装置の
小型化に伴い、回路基板１０５には極めて高い平坦性
（電極端子１０７の高さばらつきが、１０μｍ以内）が
要求されることとなった。また、上記回路基板１０５の
局所的な反りやうねりの発生は、回路基板作製工程中だ
けでなく、フリップチップ実装工程中における導電性接
着剤１０８や封止樹脂１０９の加熱工程においても発生
するため、一旦、良好に接続された導電性接着剤１０８
が、かかる局所的な反りやうねりの発生により接続不良
となるという問題点も有している。SUMMARY OF THE INVENTION The miniaturization of semiconductor devices,
Due to demands for cost reduction and the like, a thin resin substrate or a thin ceramic substrate having a thickness of 0.4 mm or less is used for the circuit board 105. The circuit board 105 has low rigidity and easily deforms. For example, when the circuit board 105 has an asymmetrical wiring pattern such as the circuit pattern 106, the circuit board 105 is deformed by thermal stress in a manufacturing process of the circuit board 105. Have local warpage and undulation. Such local warpage or undulation of the circuit board 105 is caused by the electrode terminals 10 of the circuit board 105 as shown in FIG.
When the semiconductor element 101 is mounted, the height of the electrode terminal 1 in the concave portion of the circuit board 105 is reduced.
07 did not reach the conductive adhesive 108, and the connection was electrically poor. In particular, as the size of the semiconductor device is reduced, the circuit board 105 is required to have extremely high flatness (a height variation of the electrode terminal 107 is within 10 μm). The local warpage and undulation of the circuit board 105 occur not only during the circuit board manufacturing process but also during the heating process of the conductive adhesive 108 and the sealing resin 109 during the flip chip mounting process. , Once well connected conductive adhesive 108
However, there is a problem that a connection failure occurs due to the occurrence of such local warpage or undulation.
【０００４】そこで発明者らは、かかる問題点を解決す
るために、図７に示す回路基板保持装置を用いて半導体
素子の実装を行う方法を試みた。図７（ａ）は回路基板
保持装置の上面図であり、図７（ｂ）は、Ｂ−Ｂ’にお
ける断面図である。かかる回路基板保持装置では、基板
支持台２ａに設けられた、底面が平坦な凹部２ｅに樹脂
基板等の薄型回路基板１がはめ込まれ、その上に基板固
定蓋２ｂが載置され、ネジ２ｃを締め込むことによっ
て、基板支持台２ａ上に基板固定蓋２ｂが固定される。
ここで、凹部２ｅの深さは、回路基板１の板厚より浅く
なるように設計されているため、ネジ２ｃを締めること
により、回路基板１は平坦な凹部２ｅの底面に基板固定
蓋２ｂにより押し付けられ、かかる押圧により反りやう
ねりを有する薄型回路基板１は、平坦に保持されること
となる。しかし、一方で、薄膜回路基板１はわずかな応
力によっても変形するため、ネジ２ｃを締め込む力によ
って、回路基板１の平坦性が損なわれるという問題が発
生した。かかる問題を回避するためには、ネジ２ｃの締
め込みは、ある程度の熟練者がトルクドライバーなどを
用いて慎重に行うことが必要であり、半導体装置の大量
生産に対応することができなかった。また、凹部２ｅの
深さは回路基板１の厚みに応じて変更する必要があるた
め、膜厚の異なった回路基板１に対応するためには、複
数の基板支持台２ａを準備することが必要となり、製造
設備のコストの増大を招くこととなっていた。そこで、
本発明は、簡易な方法で薄型回路基板を平坦に保持して
半導体素子をフリップチップ実装する半導体装置の製造
方法および該方法に用いる回路基板保持具を提供するこ
とを目的とする。[0004] In order to solve such a problem, the inventors tried a method of mounting a semiconductor element using a circuit board holding device shown in FIG. FIG. 7A is a top view of the circuit board holding device, and FIG. 7B is a cross-sectional view taken along BB ′. In such a circuit board holding device, a thin circuit board 1 such as a resin board is fitted into a recess 2e having a flat bottom provided on a board support 2a, a board fixing lid 2b is placed thereon, and a screw 2c is mounted. By tightening, the substrate fixing lid 2b is fixed on the substrate support 2a.
Here, since the depth of the recess 2e is designed to be shallower than the thickness of the circuit board 1, the circuit board 1 is fixed to the bottom of the flat recess 2e by the board fixing lid 2b by tightening the screw 2c. The thin circuit board 1 which is pressed and warps or undulates due to the pressing is held flat. However, on the other hand, since the thin film circuit board 1 is deformed even by a slight stress, there is a problem that the flatness of the circuit board 1 is impaired by the force for tightening the screw 2c. In order to avoid such a problem, it is necessary for an expert to carefully tighten the screw 2c using a torque driver or the like, and it has not been possible to cope with mass production of semiconductor devices. Also, since the depth of the recess 2e needs to be changed according to the thickness of the circuit board 1, it is necessary to prepare a plurality of substrate supports 2a in order to correspond to the circuit boards 1 having different thicknesses. As a result, the cost of manufacturing equipment is increased. Therefore,
SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device in which a thin circuit board is held flat by a simple method and a semiconductor element is flip-chip mounted, and a circuit board holder used in the method.
【０００５】[0005]
【課題を解決するための手段】そこで、発明者らは鋭意
研究の結果、半導体素子実装領域が露出するような開口
部と平坦な固定面とを備えた板状の回路基板保持具の固
定面を、薄型回路基板の上面上に接着することにより、
薄型回路基板を平坦な状態に保持して半導体素子をフリ
ップチップ実装できることを見出し、本発明を完成し
た。The inventors of the present invention have conducted intensive studies and found that the fixing surface of a plate-like circuit board holder having an opening for exposing a semiconductor element mounting area and a flat fixing surface. On the top surface of the thin circuit board,
The inventors have found that a semiconductor element can be flip-chip mounted while holding a thin circuit board in a flat state, and completed the present invention.
【０００６】即ち、本発明は、薄型回路基板の半導体素
子実装領域が露出するような開口部と平坦な固定面とを
備えた板状の回路基板保持具の上記固定面を、上記開口
部が上記半導体素子実装領域上に位置するように上記薄
型回路基板上に接着して、上記薄型回路基板を平坦な状
態に固定し、上記半導体素子実装領域と該半導体素子実
装領域にフリップチップ実装される半導体素子の電極端
子形成面とを略平行な状態にして、上記半導体素子実装
領域に上記半導体素子を実装することを特徴とする半導
体装置の製造方法である。このように、薄型回路基板の
半導体素子実装領域を囲むように、平坦な固定面を有す
る板状の回路基板保持具を接着することにより、極めて
簡易な方法で薄型回路基板を平坦に保持することが可能
となる。特に、薄型回路基板の半導体素子実装領域の周
囲を囲むように、薄型回路基板の表面側に回路基板保持
具を接着することにより、半導体素子実装領域内の基板
表面の反りやうねりを１０μｍ以下のオーダーで制御す
ることが可能となる。従って、従来方法のような熟練を
必要とせず、比較的容易な方法で、薄型回路基板に半導
体素子をフリップチップ実装することが可能となり、量
産工程への適用が可能となる。また、薄型回路基板の厚
みにかかわらず、同じ回路基板保持具を用いて薄型回路
基板を固定することができるため、厚みの異なる薄型回
路基板に対して、共通の回路基板保持具を用いることに
より、製造コストの低減を図ることも可能となる。That is, according to the present invention, the fixing surface of a plate-shaped circuit board holder having an opening through which a semiconductor element mounting region of a thin circuit board is exposed and a flat fixing surface is provided. The thin circuit board is adhered on the thin circuit board so as to be located on the semiconductor element mounting area, and the thin circuit board is fixed in a flat state, and the semiconductor element mounting area and the semiconductor element mounting area are flip-chip mounted. A method of manufacturing a semiconductor device, comprising mounting the semiconductor element in the semiconductor element mounting area with the electrode terminal forming surface of the semiconductor element being substantially parallel to the surface. In this way, by attaching the plate-shaped circuit board holder having a flat fixing surface so as to surround the semiconductor element mounting area of the thin circuit board, the thin circuit board can be held flat by an extremely simple method. Becomes possible. In particular, by bonding a circuit board holder to the front side of the thin circuit board so as to surround the periphery of the semiconductor element mounting area of the thin circuit board, warpage and undulation of the substrate surface in the semiconductor element mounting area can be reduced to 10 μm or less. It becomes possible to control by order. Therefore, the semiconductor element can be flip-chip mounted on a thin circuit board by a relatively easy method without requiring skill like a conventional method, and application to a mass production process becomes possible. Also, regardless of the thickness of the thin circuit board, the same circuit board holder can be used to fix the thin circuit board, so using a common circuit board holder for thin circuit boards with different thicknesses In addition, the manufacturing cost can be reduced.
【０００７】また、本発明は、上記半導体素子実装領域
に上記半導体素子を実装した後に、上記薄型回路基板と
上記半導体装置との間に封止樹脂を充填することを特徴
とする半導体装置の製造方法でもある。封止樹脂を充填
することにより、薄型回路基板と半導体装置との接合部
のはずれを防止し、半導体装置の信頼性を向上させるこ
とが可能となる。Further, according to the present invention, after the semiconductor element is mounted in the semiconductor element mounting area, a sealing resin is filled between the thin circuit board and the semiconductor device. It is also a method. By filling the sealing resin, the joint between the thin circuit board and the semiconductor device can be prevented from coming off, and the reliability of the semiconductor device can be improved.
【０００８】また、本発明は、薄型回路基板上に接着さ
れる平坦な固定面と、上記薄型回路基板の半導体素子実
装領域が露出するように設けられた開口部とを備えた板
状体からなり、上記半導体実装領域上に上記開口部が位
置するように上記薄型回路基板上に上記板状体の上記固
定面を接着して、上記半導体素子実装領域が該半導体素
子実装領域にフリップチップ実装される半導体素子の電
極端子形成面に対して略平行になるように、上記薄型回
路基板を平坦な状態に固定してなることを特徴とする回
路基板保持具でもある。かかる回路基板保持具を用いる
ことにより、薄型回路基板の平坦化を容易に行うことが
可能となる。The present invention also provides a plate-like body having a flat fixing surface adhered on a thin circuit board and an opening provided so that a semiconductor element mounting region of the thin circuit board is exposed. The fixing surface of the plate-like body is adhered to the thin circuit board so that the opening is located on the semiconductor mounting area, and the semiconductor element mounting area is flip-chip mounted on the semiconductor element mounting area. A circuit board holder characterized in that the thin circuit board is fixed in a flat state so as to be substantially parallel to the electrode terminal forming surface of the semiconductor element to be formed. By using such a circuit board holder, it is possible to easily flatten a thin circuit board.
【０００９】上記板状体は、絶縁材料または表面が絶縁
処理された金属材料からなることが好ましい。回路基板
保持具に固定した状態で導通検査を行うことができ、導
通不良が認められた場合は容易に半導体素子の実装のや
り直しを行うことができるからである。The plate is preferably made of an insulating material or a metal material whose surface is subjected to an insulating treatment. This is because the continuity test can be performed in a state where the semiconductor element is fixed to the circuit board holder, and when a continuity defect is recognized, the semiconductor element can be easily mounted again.
【００１０】[0010]
【発明の実施の形態】本発明の実施の形態について、図
１〜４を参照して説明する。図１は本発明の実施の形態
における回路基板保持具であり、図１（ａ）には上面図
を、図１（ｂ）にはＡ−Ａ’における断面図を夫々示
す。また、上記回路基板保持具は、薄型回路基板上に接
着される平坦な固定面１２ａと、薄型回路基板の半導体
素子実装領域が露出するように設けられた開口部１２ｃ
とを備えている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a circuit board holder according to an embodiment of the present invention. FIG. 1A shows a top view, and FIG. 1B shows a cross-sectional view taken along AA ′. The circuit board holder has a flat fixing surface 12a adhered on the thin circuit board, and an opening 12c provided to expose a semiconductor element mounting area of the thin circuit board.
And
【００１１】図２は、回路基板保持具が表面に接着され
る薄型回路基板１の上面図である。かかる薄型回路基板
１には、複数のモジュール１ｃが配置され、各モジュー
ル１ｃ内には半導体素子実装領域１ａが設けられてい
る。また、各モジュール１ｃの外周部には接着剤を塗付
する接着剤塗付領域１ｄが設けられている。図１に示す
回路基板保持具の開口部１２ｃは、薄型回路基板１のモ
ジュール１ｃよりも少し大きく形成されている。FIG. 2 is a top view of the thin circuit board 1 to which the circuit board holder is adhered. A plurality of modules 1c are arranged on the thin circuit board 1, and a semiconductor element mounting area 1a is provided in each module 1c. An adhesive application area 1d for applying an adhesive is provided on an outer peripheral portion of each module 1c. The opening 12c of the circuit board holder shown in FIG. 1 is formed slightly larger than the module 1c of the thin circuit board 1.
【００１２】次に、本実施の形態にかかる回路基板保持
具を用いた半導体装置の製造方法について説明する。ま
ず、図２に示すように、薄型回路基板１の表面の各モジ
ュールの周囲に設けられたの接着剤塗付領域１ｄに、ス
クリーン印刷で、接着剤を塗付する。薄型回路基板１に
は、厚さ０．６５ｍｍのガラスエポキシ基板を用いる。
接着剤は、以下のバンプ電極接続工程での加熱温度にお
いても、平坦な状態で薄型回路基板１を回路基板保持具
１２に固定しておく必要があるため、ペースト状の熱硬
化性エポキシ系接着剤が好ましく、硬化温度はオーブン
中で１５０℃−１５分とした。次に、回路基板保持具１
２の開口部１２ｃが、薄型回路基板１の半導体素子実装
領域１ａ上に位置するように、薄型回路基板１上に回路
基板保具１２を載置する。次に、回路基板保持具１２上
から圧力を加えて、薄型回路基板１と回路基板保持板１
２とを密着させた後、オーブン中で１３０℃程度まで加
熱し、上記接着剤を硬化させて、回路基板１と基板保持
板６を接合させる。この場合、回路基板保持板１２の平
坦な固定面１２ａが薄型回路基板１の表面上に固定され
るため、薄型回路基板１の表面の反りやうねりを１０μ
ｍ以下とすることが可能となる。Next, a method of manufacturing a semiconductor device using the circuit board holder according to the present embodiment will be described. First, as shown in FIG. 2, an adhesive is applied by screen printing to an adhesive application area 1 d provided around each module on the surface of the thin circuit board 1. As the thin circuit board 1, a glass epoxy substrate having a thickness of 0.65 mm is used.
Since the adhesive needs to fix the thin circuit board 1 to the circuit board holder 12 in a flat state even at the heating temperature in the following bump electrode connection step, a paste-like thermosetting epoxy-based adhesive is used. Agents are preferred and the curing temperature was 150 ° C. for 15 minutes in an oven. Next, the circuit board holder 1
The circuit board holder 12 is placed on the thin circuit board 1 so that the second opening 12c is located on the semiconductor element mounting area 1a of the thin circuit board 1. Next, pressure is applied from above the circuit board holder 12 to the thin circuit board 1 and the circuit board holding plate 1.
Then, the circuit board 1 is heated to about 130 ° C. in an oven to cure the adhesive, and the circuit board 1 and the board holding plate 6 are joined. In this case, the flat fixing surface 12a of the circuit board holding plate 12 is fixed on the surface of the thin circuit board 1, so that the surface of the thin circuit board 1 is warped or undulated by 10 μm.
m or less.
【００１３】図３は、薄型回路基板１を回路基板保持具
１２に固定する前後の薄型回路基板１の半導体実装領域
１ａ内における反り量の分布を示す。図３（ａ）は固定
前の反り量、（ｂ）は固定後の反り量であり、横軸に薄
型回路基板の反り量（μｍ）、縦軸にその分布（％）を
表す。図３から明らかなように、回路基板保持具１２を
薄型回路基板１上に固定することにより、固定前は１０
〜２０μｍを中心に分布していた反りの分布が、１０μ
ｍ以下を中心に分布するようになり、薄型回路基板１の
半導体素子実装領域１ａ内における薄型回路基板１の反
りを低減することが可能となっている。次に、回路基板
保持具１２に固定された薄型回路基板１の半導体素子実
装領域１ａに、バンプ電極に導電性接着剤を塗布した半
導体素子をフェイスダウンでフリップチップ実装し、オ
ーブン中で１３０℃程度に加熱し、導電性接着剤を硬化
させて半導体素子を薄型回路基板１上に固定する。FIG. 3 shows the distribution of the amount of warpage in the semiconductor mounting area 1a of the thin circuit board 1 before and after the thin circuit board 1 is fixed to the circuit board holder 12. 3A shows the amount of warpage before fixing, and FIG. 3B shows the amount of warpage after fixing. The abscissa indicates the amount of warpage (μm) of the thin circuit board, and the ordinate indicates the distribution (%). As is clear from FIG. 3, by fixing the circuit board holder 12 on the thin circuit board 1, 10
The distribution of the warp, which was distributed around
m, the warpage of the thin circuit board 1 in the semiconductor element mounting region 1a of the thin circuit board 1 can be reduced. Next, a semiconductor element having a bump electrode coated with a conductive adhesive is flip-chip mounted face-down on the semiconductor element mounting area 1a of the thin circuit board 1 fixed to the circuit board holder 12, and the semiconductor chip is mounted at 130 ° C. in an oven. The semiconductor element is fixed on the thin circuit board 1 by heating the conductive adhesive to a certain degree to cure the conductive adhesive.
【００１４】図４（ａ）は、半導体素子３をフリップチ
ップ実装した薄型回路基板１の断面図であり、図４
（ｂ）は、薄型回路基板１と半導体素子３との接続部の
拡大図である。図４（ｂ）において、半導体素子３上の
アルミ電極端子３ａに形成されたバンプ（突起電極）４
と薄型回路基板１上に形成された入出力電極端子１ｂと
が導電性接着剤５を介して接合されている。ここで、薄
型回路基板１を回路基板保持具１２で固定する前は、薄
型回路基板１の半導体素子実装領域１ａの反り等が１０
μｍ以上となり（図３（ａ））、一方、バンプ電極４の
高さも１０μｍ程度であるため、半導体素子３のフリッ
プチップ実装時に、導電性接着剤５が薄型回路基板１上
の入出力電極端子１ｂに接触しない部分が発生する。ま
た、接触した場合でも、接続部分が少ない場合は、導熱
硬化時の薄型回路基板１のわずかな熱変形によって接続
箇所が離れ、後発的に電気的な接続不良が発生すること
となる。これに対し、本実施の形態にかかる方法では、
反り等が１０μｍ以下の平坦な状態で薄型回路基板１を
固定し、半導体素子３を実装することにより、上述の接
続不良の発生を大幅に減少させることが可能となる。次
に、薄型回路基板１とその上に実装された半導体素子３
との間に封止樹脂を注入し、オーブン中で１３０℃程度
に加熱することによりかかる封止樹脂を硬化させる。か
かる封止樹脂としては、シリカ（ＳｉＯ2）やアルミナ
（Ａｌ2Ｏ3）などの無機物フィラを含有したエポキシ系
樹脂が好ましい。最後に、封止樹脂硬化後の薄型回路基
板１を、打抜き機を用いて回路基板１内の各モジュール
１ｃ毎に打ち抜いて分割し、半導体素子を形成する。こ
れにより、薄型回路基板１上に半導体素子３が実装され
た各半導体装置が完成する。FIG. 4A is a sectional view of the thin circuit board 1 on which the semiconductor element 3 is flip-chip mounted.
FIG. 2B is an enlarged view of a connecting portion between the thin circuit board 1 and the semiconductor element 3. In FIG. 4B, bumps (protruding electrodes) 4 formed on the aluminum electrode terminals 3a on the semiconductor element 3 are formed.
The input / output electrode terminals 1 b formed on the thin circuit board 1 are joined via a conductive adhesive 5. Here, before the thin circuit board 1 is fixed by the circuit board holder 12, the warpage of the semiconductor element mounting area 1 a of the thin circuit board 1 is 10 °.
μm or more (FIG. 3A). On the other hand, since the height of the bump electrode 4 is also about 10 μm, the conductive adhesive 5 is applied to the input / output electrode terminals on the thin circuit board 1 during flip chip mounting of the semiconductor element 3. A portion that does not contact 1b is generated. Also, even if the contact is made, if the connecting portion is small, the connecting portion is separated due to slight thermal deformation of the thin circuit board 1 at the time of heat conduction curing, and electrical connection failure will occur later. In contrast, in the method according to the present embodiment,
By fixing the thin circuit board 1 and mounting the semiconductor element 3 in a flat state where the warp or the like is 10 μm or less, it is possible to greatly reduce the occurrence of the above-described connection failure. Next, the thin circuit board 1 and the semiconductor element 3 mounted thereon
And the sealing resin is cured by heating to about 130 ° C. in an oven. As such a sealing resin, an epoxy resin containing an inorganic filler such as silica (SiO 2 ) or alumina (Al 2 O 3 ) is preferable. Finally, the thin circuit board 1 after the curing of the sealing resin is punched and divided for each module 1c in the circuit board 1 using a punching machine to form a semiconductor element. Thereby, each semiconductor device in which the semiconductor element 3 is mounted on the thin circuit board 1 is completed.
【００１５】このように、本実施の形態にかかる方法を
用いることにより、極めて簡単な方法で薄型回路基板１
を反り等が１０μｍ以下の平坦な状態に固定でき、薄型
回路基板１上への半導体素子３の実装工程における接続
不良の発生を低減することが可能となる。特に、固定方
法に熟練を要する従来方法と異なり、極めて簡単な工程
で薄型回路基板１を平坦な状態に固定することができる
ため、量産工程への適用も可能となる。尚、回路基板保
持具１２の材質には、表面をアルマイト処理したアルミ
ナ等の、絶縁性材料や、絶縁樹脂などで被覆された金属
材料等を用いることが好ましい。回路基板保持具１２に
薄型回路基板１を固定した状態で、各半導体素子３の導
通検査を行うことができ、半導体装置の製造工程の簡略
化を図ることができるからである。As described above, by using the method according to the present embodiment, the thin circuit board 1 can be formed in an extremely simple manner.
Can be fixed in a flat state having a warp or the like of 10 μm or less, and it is possible to reduce the occurrence of connection failure in the process of mounting the semiconductor element 3 on the thin circuit board 1. In particular, unlike the conventional method that requires skill in the fixing method, the thin circuit board 1 can be fixed in a flat state by an extremely simple process, so that it can be applied to a mass production process. The material of the circuit board holder 12 is preferably an insulating material such as alumina whose surface is anodized, a metal material coated with an insulating resin, or the like. This is because the continuity test of each semiconductor element 3 can be performed in a state where the thin circuit board 1 is fixed to the circuit board holder 12, and the manufacturing process of the semiconductor device can be simplified.
【００１６】[0016]
【発明の効果】以上の説明から明らかなように、本発明
にかかる半導体装置の製造方法を用いることにより、薄
型回路基板を反り等が１０μｍ以下となるような平坦な
状態に、極めて簡単な方法で固定することができ、半導
体素子の実装工程における薄型回路基板の表面の反り等
に起因する接続不良の発生を低減することが可能とな
る。As is clear from the above description, by using the method of manufacturing a semiconductor device according to the present invention, a very simple method can be used to convert a thin circuit board into a flat state in which warpage or the like becomes 10 μm or less. It is possible to reduce the occurrence of connection failure due to the warpage of the surface of the thin circuit board in the semiconductor element mounting process.
【００１７】また、固定方法に熟練を要する従来方法と
異なり、極めて簡単な工程で薄型回路基板を平坦な状態
に固定することができるため、量産工程への適用も可能
となる。Further, unlike the conventional method which requires skill in the fixing method, the thin circuit board can be fixed in a flat state by an extremely simple process, so that it can be applied to a mass production process.
【００１８】また、薄型回路基板の厚みにかかわらず、
同じ回路基板保持具を用いて薄型回路基板を固定するこ
とができるため、厚みの異なる薄型回路基板に対して、
共通の回路基板保持具を用いることができ、製造コスト
の低減を図ることが可能となる。Further, regardless of the thickness of the thin circuit board,
Since the thin circuit board can be fixed using the same circuit board holder, for thin circuit boards having different thicknesses,
A common circuit board holder can be used, and manufacturing costs can be reduced.
【図１】 （ａ） 本発明の実施の形態にかかる回路基
板保持具の上面図である。（ｂ） Ａ−Ａ’における断
面図である。FIG. 1A is a top view of a circuit board holder according to an embodiment of the present invention. (B) It is sectional drawing in AA '.
【図２】 回路基板保持具を接着する薄型回路基板の表
面であるFIG. 2 is a surface of a thin circuit board to which a circuit board holder is bonded.
【図３】 （ａ） 固定前における薄型回路基板の反り
量の分布である。（ｂ） 固定後における薄型回路基板
の反り量の分布である。FIG. 3A is a distribution of a warpage amount of a thin circuit board before fixing. (B) Distribution of the amount of warpage of the thin circuit board after fixing.
【図４】 （ａ） 本発明の実施の形態にかかる回路基
板保持具に薄型回路基板を接着し、半導体素子を実装し
た場合の断面図である。（ｂ） 接続部の拡大図であ
る。FIG. 4A is a cross-sectional view of a case where a thin circuit board is bonded to a circuit board holder according to an embodiment of the present invention and a semiconductor element is mounted. (B) It is an enlarged view of a connection part.
【図５】 薄型回路基板と半導体素子の接続部の断面図
である。FIG. 5 is a cross-sectional view of a connection portion between a thin circuit board and a semiconductor element.
【図６】 従来の回路基板保持装置を用いた場合の問題
点を示す図である。FIG. 6 is a diagram showing a problem when a conventional circuit board holding device is used.
【図７】 （ａ） 従来の回路基板保持装置の上面図で
ある。（ｂ） Ｂ−Ｂ’における断面図である。FIG. 7A is a top view of a conventional circuit board holding device. (B) It is sectional drawing in BB '.
１ 薄型回路基板、１ａ 半導体素子実装領域、１ｂ
入出力端子電極、１ｃモジュール、１ｄ 接着剤塗付領
域、２ 回路基板保持装置、２ａ 基板支持台、２ｂ
基板固定蓋、２ｃ ネジ、２ｅ 凹部、２ｇ 開口部、
３ 半導体素子、３ａ アルミ電極端子、４ バンプ
（突起電極）、５ 導電性接着剤、１２回路基板保持
具、１２ａ 固定面、１２ｃ 開口部。1 Thin circuit board, 1a Semiconductor element mounting area, 1b
I / O terminal electrodes, 1c module, 1d adhesive coating area, 2 circuit board holding device, 2a substrate support, 2b
Board fixing lid, 2c screw, 2e recess, 2g opening,
3 Semiconductor element, 3a aluminum electrode terminal, 4 bump (protruding electrode), 5 conductive adhesive, 12 circuit board holder, 12a fixing surface, 12c opening.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 小野 正浩 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 別所 芳宏 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 板垣 峰広 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Masahiro Ono 1006 Kadoma Kadoma, Osaka Pref.Matsushita Electric Industrial Co., Ltd. 72) Inventor Minehiro Itagaki 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (4)
出するような開口部と平坦な固定面とを備えた板状の回
路基板保持具の上記固定面を、上記開口部が上記半導体
素子実装領域上に位置するように上記薄型回路基板上に
接着して、上記薄型回路基板を平坦な状態に固定し、 上記半導体素子実装領域と該半導体素子実装領域にフリ
ップチップ実装される半導体素子の電極端子形成面とを
略平行な状態にして、上記半導体素子実装領域に上記半
導体素子を実装することを特徴とする半導体装置の製造
方法。1. The fixing surface of a plate-shaped circuit board holder having an opening through which a semiconductor element mounting region of a thin circuit board is exposed and a flat fixing surface, wherein the opening is formed by the semiconductor element mounting. The thin circuit board is adhered on the thin circuit board so as to be located on the region, the thin circuit board is fixed in a flat state, and the semiconductor element mounting area and an electrode of a semiconductor element to be flip-chip mounted on the semiconductor element mounting area A method of manufacturing a semiconductor device, comprising: mounting a semiconductor element in a semiconductor element mounting area with a terminal forming surface substantially parallel to the semiconductor element mounting area.
子を実装した後に、上記薄型回路基板と上記半導体装置
との間に封止樹脂を充填することを特徴とする請求項１
に記載の半導体装置の製造方法。2. The semiconductor device according to claim 1, wherein after the semiconductor element is mounted in the semiconductor element mounting area, a sealing resin is filled between the thin circuit board and the semiconductor device.
13. The method for manufacturing a semiconductor device according to item 5.
面と、上記薄型回路基板の半導体素子実装領域が露出す
るように設けられた開口部とを備えた板状体からなり、 上記半導体実装領域上に上記開口部が位置するように上
記薄型回路基板上に上記板状体の上記固定面を接着し
て、上記半導体素子実装領域が該半導体素子実装領域に
フリップチップ実装される半導体素子の電極端子形成面
に対して略平行になるように、上記薄型回路基板を平坦
な状態に固定してなることを特徴とする回路基板保持
具。3. A semiconductor device comprising: a plate-like body having a flat fixing surface adhered on a thin circuit board and an opening provided to expose a semiconductor element mounting region of the thin circuit board; A semiconductor element in which the fixed surface of the plate is bonded on the thin circuit board so that the opening is located on the mounting area, and the semiconductor element mounting area is flip-chip mounted on the semiconductor element mounting area. Wherein the thin circuit board is fixed in a flat state so as to be substantially parallel to the electrode terminal forming surface.
縁処理された金属材料からなることを特徴とする請求項
３に記載の回路基板保持具。4. The circuit board holder according to claim 3, wherein the plate-like body is made of an insulating material or a metal material whose surface is insulated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31722497A JPH11150155A (en) | 1997-11-18 | 1997-11-18 | Manufacture of semiconductor device and circuit board holding jig there for |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31722497A JPH11150155A (en) | 1997-11-18 | 1997-11-18 | Manufacture of semiconductor device and circuit board holding jig there for |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11150155A true JPH11150155A (en) | 1999-06-02 |
Family
ID=18085869
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31722497A Withdrawn JPH11150155A (en) | 1997-11-18 | 1997-11-18 | Manufacture of semiconductor device and circuit board holding jig there for |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11150155A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002204052A (en) * | 2000-12-28 | 2002-07-19 | Hitachi Chem Co Ltd | Circuit connecting material and method for connecting circuit terminal using the same as well as connecting structure |
| JP2006216944A (en) * | 2005-02-02 | 2006-08-17 | Agilent Technol Inc | Printed circuit board assembly with reinforcing material for ball grid array |
| JP2007178150A (en) * | 2005-12-27 | 2007-07-12 | Hioki Ee Corp | Circuit board holder |
| US8351743B2 (en) | 2008-07-07 | 2013-01-08 | Nitto Denko Corporation | Suspension board with circuit and producing method thereof |
-
1997
- 1997-11-18 JP JP31722497A patent/JPH11150155A/en not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002204052A (en) * | 2000-12-28 | 2002-07-19 | Hitachi Chem Co Ltd | Circuit connecting material and method for connecting circuit terminal using the same as well as connecting structure |
| JP2006216944A (en) * | 2005-02-02 | 2006-08-17 | Agilent Technol Inc | Printed circuit board assembly with reinforcing material for ball grid array |
| JP2007178150A (en) * | 2005-12-27 | 2007-07-12 | Hioki Ee Corp | Circuit board holder |
| US8351743B2 (en) | 2008-07-07 | 2013-01-08 | Nitto Denko Corporation | Suspension board with circuit and producing method thereof |
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