JPH11106802A - Method for sintering composite body - Google Patents

Method for sintering composite body

Info

Publication number
JPH11106802A
JPH11106802A JP9265520A JP26552097A JPH11106802A JP H11106802 A JPH11106802 A JP H11106802A JP 9265520 A JP9265520 A JP 9265520A JP 26552097 A JP26552097 A JP 26552097A JP H11106802 A JPH11106802 A JP H11106802A
Authority
JP
Japan
Prior art keywords
semiconductor
fesi
type
electrode
particle size
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9265520A
Other languages
Japanese (ja)
Inventor
Kiyoshi Noshiro
清 野城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hosokawa Micron Corp
Original Assignee
Hosokawa Micron Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hosokawa Micron Corp filed Critical Hosokawa Micron Corp
Priority to JP9265520A priority Critical patent/JPH11106802A/en
Publication of JPH11106802A publication Critical patent/JPH11106802A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To prevent the generation of cracks caused by the difference in the thermal expansion coefficients and shrinkage ratios between both sintered bodies at the time of sintering, as for the average particle size of the raw material powder of each sintered body, by imposing conditions in such a manner that, the higher the shrinkage ratio be, the larger the particle size is made. SOLUTION: The thermoelement is a composite sintered body 7 in which a P type FeSi2 semiconductor 1 having a V-shape viewed from the pane, a primary sintered body 5 composed of an N type FeSi2 semiconductor 2 and a secondary sintered body 6 forming an electrode 3 in which the shrinkage ratio at the time of sintereing in the same particle size is higher than that of the primary sintered body 5 are adjacently formed in one body. At this time, the average particle size of the raw material powder of the P type and N type FeSi2 semiconductors 1 and 2 is regulated to 5 to 8 μm, the average particle size of Fe powder as the raw material of the electrode 3 is regulated to 1 to 10μm, and the one of particles larger than the case of former is used. In this way, the heat shrinkage ratio of the elecrode 3 reduces, the difference in the heat shrinkage ratio between each FeSi semiconductor 1 and 2 is reduced, stress caused by this difference is, relaxed, and the generation of cracks or the like is suppressed to improve the yield in the production.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、焼成時の収縮率が
異なる２種類の焼結体を隣接させた複合焼結体の焼結方
法に関し、更に、ＦｅＳｉ2 半導体からなる熱電素子の
電極形成技術に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for sintering a composite sintered body in which two types of sintered bodies having different shrinkage rates during firing are adjacent to each other, and furthermore, to form an electrode of a thermoelectric element made of FeSi 2 semiconductor. About technology.

【０００２】[0002]

【従来の技術】近年、熱エネルギの有効利用や熱源の多
様化等に伴い、高効率熱電材料に対する期待が高まって
おり、種々の材料が研究開発されている。なかでもＦｅ
Ｓｉ2半導体は、比較的高温度での使用が可能であり、
耐酸化性にも優れているため大気中での使用が可能であ
り、添加する不純物元素を適宜選択することで半導体と
してのＰ型或いはＮ型の導電型制御が可能であり、且
つ、原料となる鉄やシリコンが豊富で原料費が安価であ
るという多くの利点から注目されている。しかし、かか
るＦｅＳｉ2 半導体も、他の熱電材料に比べて後述する
熱電素子の性能が低く、熱電素子として実用に供するに
は、この性能の改善が望まれていた。一般的に、熱電素
子の性能は、性能指数ｚ（ｚ＝α2 ／ρκ）を指標とし
て評価される。ここで、αは熱電能、ρは比抵抗、κは
熱伝導率で、性能指数ｚは温度に依存する物質固有の値
である。かかる観点から、熱電能αは大きく、比抵抗ρ
と熱伝導率κの小さい物質が望ましい。2. Description of the Related Art In recent years, with the effective use of heat energy and diversification of heat sources, expectations for high-efficiency thermoelectric materials have been increasing, and various materials have been researched and developed. Above all, Fe
Si 2 semiconductors can be used at relatively high temperatures,
Since it has excellent oxidation resistance, it can be used in the air. By appropriately selecting an impurity element to be added, it is possible to control the P-type or N-type conductivity type as a semiconductor, and It is attracting attention because of its many advantages that it is rich in iron and silicon and its raw material cost is low. However, such a FeSi 2 semiconductor also has a lower performance of a thermoelectric element described later than other thermoelectric materials, and improvement of this performance has been desired for practical use as a thermoelectric element. Generally, the performance of a thermoelectric element is evaluated using a figure of merit z (z = α 2 / ρκ) as an index. Here, α is the thermoelectric power, ρ is the specific resistance, κ is the thermal conductivity, and the figure of merit z is a value specific to a substance that depends on temperature. From this viewpoint, the thermoelectric power α is large and the specific resistance ρ
And a substance having a small thermal conductivity κ is desirable.

【０００３】ここで、ＦｅＳｉ2 半導体とは、β−Ｆｅ
Ｓｉ2 相を主たる成分とする鉄珪化物であり、かかる組
成を持つ合金は、化学量論組成の非常に狭い単相領域を
持つβ−ＦｅＳｉ2 相が安定な相として存在し、所定温
度の熱処理によって半導体特性を有するβ相を得たもの
である。また、β−ＦｅＳｉ2 の溶製材は多孔質で亀裂
が多く脆いため、その作製には一般には粉末冶金法が用
いられ、その粉末冶金法における焼結法としては、代表
的なものとして、無加圧焼結法（ＰＬＳ）、ホットプレ
ス焼結法（ＨＰ）、熱間等方圧力焼結法（ＨＩＰ）等が
使用されている。Here, the FeSi 2 semiconductor is β-Fe
An iron silicide having a Si 2 phase as a main component.In an alloy having such a composition, a β-FeSi 2 phase having a very narrow single-phase region of a stoichiometric composition exists as a stable phase, and at a predetermined temperature. A β phase having semiconductor characteristics was obtained by heat treatment. In addition, since the ingot of β-FeSi 2 is porous and has many cracks and is brittle, powder metallurgy is generally used for its production, and a typical sintering method in the powder metallurgy is as follows. Pressure sintering (PLS), hot press sintering (HP), hot isostatic sintering (HIP) and the like are used.

【０００４】このβ−ＦｅＳｉ2 は、ＭｎやＡｌ等のＰ
型不純物をドーピングするとＰ型の導電型を呈するＰ型
ＦｅＳｉ2 半導体に、一方、Ｃｏ等のＮ型不純物をドー
ピングするとＮ型の導電型を呈するＮ型ＦｅＳｉ2 半導
体にすることができる。よって、ＦｅＳｉ2 半導体とい
う場合、特に明記しない限り、Ｐ型またはＮ型の導電型
を呈するＦｅＳｉ2 半導体を含むものとする。[0004] This β-FeSi 2 is composed of P such as Mn or Al.
Doping with a type impurity can provide a P-type FeSi 2 semiconductor having a P-type conductivity, while doping with an N-type impurity such as Co can provide an N-type FeSi 2 semiconductor having an N-type conductivity. Therefore, a FeSi 2 semiconductor includes a P-type or N-type FeSi 2 semiconductor unless otherwise specified.

【０００５】ところで、ＦｅＳｉ2 半導体を用いて熱電
素子を具体的に構成する場合、Ｐ型不純物をドーピング
したＰ型ＦｅＳｉ2 半導体とＮ型不純物をドーピングし
たＮ型ＦｅＳｉ2 半導体の一端同士を接合し、Ｐ型及び
Ｎ型ＦｅＳｉ2 半導体の他端側に電極部を形成する構成
が一般的である。ここで、各半導体の両端に温度差を与
えて両電極間に熱起電力を発生させる熱電発電素子とし
て使用する場合は、前記Ｐ型及びＮ型半導体の接合部を
高温側に配置する。前記Ｐ型及びＮ型半導体の接合部
は、ＦｅＳｉ2 半導体の融点が高いため銀ロウ等の高温
ロウ材を使用したり、種々の方法で直接接合させるほ
か、同種の方法で導電体を介して接合され形成されてい
た。一方、低温側に形成される電極部は、特別な導電性
の電極材料で特別に電極を形成するのではなく、前記各
半導体表面の電極部に銅線等の電気配線を超音波ハンダ
付け等で接続することで、一般的には外部回路との電気
的接続を形成していた。Meanwhile, by using FeSi 2 semiconductor if specifically configure the thermoelectric element, joining the N-type FeSi 2 semiconductor one ends doped with P-type FeSi 2 semiconductor and N-type impurity doped with P-type impurities , P-type and N-type FeSi 2 semiconductors are generally provided with an electrode portion on the other end side. Here, when the semiconductor is used as a thermoelectric generator for generating a thermoelectromotive force between both electrodes by giving a temperature difference to both ends of the semiconductor, the junction between the P-type and N-type semiconductors is arranged on the high temperature side. The junction of the P-type and N-type semiconductors uses a high-temperature brazing material such as silver brazing because the melting point of the FeSi 2 semiconductor is high, or is directly joined by various methods, and via a conductor in the same manner. It was joined and formed. On the other hand, the electrode portion formed on the low-temperature side does not form a special electrode with a special conductive electrode material. In general, an electrical connection with an external circuit has been formed by the connection.

【０００６】熱電素子の性能は、上記のように性能指数
ｚを指標として評価されるが、熱電材料自体の性能指数
ｚが高くても、前記Ｐ型及びＮ型半導体の接合部及び前
記電極部での接触抵抗が高ければ、熱電素子全体として
の実効的な比抵抗ρが見かけ上大きくなり、実質的な性
能を低下させる結果となる。つまり、熱電発電素子とし
て機能させた場合、前記各接触抵抗が熱電発電素子の内
部抵抗として作用し、前記各接触抵抗において出力電流
に応じた電圧降下が発生するため、前記Ｐ型及びＮ型半
導体が前記接合部と前記各電極部間の温度差で発生する
熱起電力の電圧値が実効的に低下する結果となるのであ
る。さて、上記のＦｅＳｉ2 半導体を用いた熱電素子の
電極部形成に使用される超音波ハンダ付け等では、半田
等の合金または金属とＦｅＳｉ2 半導体との接触面にエ
ネルギ障壁（ショットキー障壁）が生じ、その両端にか
かるエネルギ障壁を超える電圧が印加されなければ電気
的な導通が得られず、良好なオーミック接触とはならず
に実質的に接触抵抗を増大させる結果となり、特に低温
時に顕著であるため、熱電素子性能向上の一阻害要因と
なっていた。The performance of the thermoelectric element is evaluated using the performance index z as an index as described above. Even if the performance index z of the thermoelectric material itself is high, the junction between the P-type and N-type semiconductors and the electrode portion If the contact resistance of the thermoelectric element is high, the effective specific resistance ρ of the thermoelectric element as a whole becomes apparently large, resulting in a substantial decrease in performance. That is, when functioning as a thermoelectric generator, each of the contact resistances acts as an internal resistance of the thermoelectric generator, and a voltage drop occurs in each of the contact resistances according to an output current. As a result, the voltage value of the thermoelectromotive force generated due to the temperature difference between the bonding portion and each of the electrode portions is effectively reduced. In the case of ultrasonic soldering or the like used for forming an electrode portion of a thermoelectric element using the above-mentioned FeSi 2 semiconductor, an energy barrier (Schottky barrier) is formed on a contact surface between an alloy or metal such as solder and the FeSi 2 semiconductor. Unless a voltage exceeding the energy barrier applied to both ends is applied, electrical conduction cannot be obtained, resulting in a substantial increase in contact resistance without becoming a good ohmic contact, particularly at low temperatures. For this reason, it has been one of the hindrance factors for improving the performance of the thermoelectric element.

【０００７】ところで、一般に金属と半導体を接触させ
たとき、界面でのキャリヤの再結合速度が非常に速い場
合とか、上記ショットキー障壁が十分低い場合とか、ま
たは、キャリヤがトンネルできるほど障壁が十分に薄い
場合にオーミック接触となることから、高温時ほど良好
なオーミック接触が得られ、前記接合部及び前記電極部
での接触抵抗は低くなる。よって、低温側に設けられる
前記電極部の接触抵抗の低抵抗化が、熱電材料自体の高
性能化と合わせて、熱電素子としての高性能化に寄与す
るのである。In general, when a metal and a semiconductor are brought into contact with each other, the carrier recombination speed at the interface is very fast, the Schottky barrier is sufficiently low, or the barrier is sufficiently large so that the carrier can tunnel. Since the ohmic contact is obtained when the thickness is too small, a good ohmic contact can be obtained at a higher temperature, and the contact resistance at the junction and the electrode decreases. Therefore, the reduction in the contact resistance of the electrode portion provided on the low-temperature side contributes to the high performance of the thermoelectric element together with the high performance of the thermoelectric material itself.

【０００８】更に、熱電発電素子として使用する場合、
高温側の前記Ｐ型及びＮ型半導体の接合部と低温側の電
極部との温度差を大きくすれば、それだけ大きい起電力
が得られ、発電能力が高くなるが、前記電極部の接触抵
抗を低くするために電極部の温度を上げると、却って発
生起電力が低下し、発電能力が阻害される。このため、
低温側に設けられる前記電極部は通常水冷等で冷却され
る。従って、前記電極部における接触抵抗は別手段によ
って低抵抗化を図る必要がある。Further, when used as a thermoelectric generator,
If the temperature difference between the junction of the P-type and N-type semiconductors on the high-temperature side and the electrode on the low-temperature side is increased, a larger electromotive force is obtained and the power generation capacity is increased, but the contact resistance of the electrode is reduced. If the temperature of the electrode part is raised to lower the temperature, the generated electromotive force is rather lowered, and the power generation capacity is hindered. For this reason,
The electrode portion provided on the low temperature side is usually cooled by water cooling or the like. Therefore, it is necessary to reduce the contact resistance of the electrode section by another means.

【０００９】[0009]

【発明が解決しようとする課題】前記電極部における接
触抵抗の低抵抗化は、前記電極部の形成を、超音波ハン
ダ付け等によらずに、ＦｅＳｉ2 半導体とオーミック接
触可能な導電性の電極材料を前記各半導体表面に焼結法
等で直接形成すれば、一見容易に解決が図れるように思
われるが、従来より、ＦｅＳｉ2 半導体と良好なオーミ
ック接触が可能な適切な電極材料が知られていなかっ
た。そこで、本発明者は、従来ＦｅＳｉ2 半導体と良好
なオーミック接触が困難と思われていたＦｅ、Ｎｉ、Ｃ
ｏ、または、Ｍｎ、Ｃｏ等のドーピング材を含むＦｅ
が、実際は良好なオーミック接触が可能であることを新
たに実験により確認し、電極材料として使用し得るとい
う新知見を得るに至り、別出願において、ＦｅＳｉ2 半
導体に、Ｆｅ、Ｎｉ、Ｃｏ、または、Ｍｎ、Ｃｏ等のド
ーピング材を含むＦｅを成分とする電極が焼結法等で直
接形成されてなる熱電素子を提案している。因みに、電
極材料がＦｅ、または、Ｍｎ、Ｃｏ等のドーピング材を
含むＦｅの場合は、ＦｅＳｉ2 半導体と電極との境界面
にＦｅＳｉの薄膜層が形成され、このＦｅＳｉを介して
良好なオーミック接触が形成されているものと推察され
る。In order to reduce the contact resistance of the electrode portion, the formation of the electrode portion can be performed by a conductive electrode capable of ohmic contact with a FeSi 2 semiconductor without using ultrasonic soldering or the like. If the material is formed directly on each of the semiconductor surfaces by a sintering method or the like, it seems that the solution can be easily solved at first glance.However, conventionally, an appropriate electrode material capable of making good ohmic contact with the FeSi 2 semiconductor has been known. I didn't. The present inventor has conventionally FeSi 2 semiconductor and a good ohmic contact is thought to difficult Fe, Ni, C
o or Fe containing a doping material such as Mn or Co
But in fact it is confirmed by new experiments that it is possible to good ohmic contact, leading to obtaining a new finding that can be used as an electrode material, in another application, the FeSi 2 semiconductor, Fe, Ni, Co or There has been proposed a thermoelectric element in which an electrode containing Fe containing a dopant such as Mn, Mn, or Co is directly formed by a sintering method or the like. Incidentally, when the electrode material is Fe or Fe containing a doping material such as Mn or Co, a thin film layer of FeSi is formed on the interface between the FeSi 2 semiconductor and the electrode, and a good ohmic contact is made via the FeSi. Is presumed to be formed.

【００１０】ところで、ＦｅＳｉ2 半導体単体は上述の
如く一般に粉体焼結法で作製されるため、上記の電極も
ＦｅＳｉ2 半導体と一体で同時に粉体焼結法により作製
できるのが製造効率上好ましい。しかしながら、ＦｅＳ
ｉ2 半導体を焼結過程でβ相化させるには焼結温度を１
１２４°Ｋ以上に設定する必要があり、電極形成を含む
焼結工程で大きな温度差が生じ、別材料で形成された電
極とＦｅＳｉ2 半導体の熱膨張率及び焼成時の収縮率の
違いから、電極部付近にクラックが発生する虞がある。Since the FeSi 2 semiconductor alone is generally produced by the powder sintering method as described above, it is preferable from the viewpoint of production efficiency that the above-mentioned electrode can be produced simultaneously with the FeSi 2 semiconductor by the powder sintering method. . However, FeS
In order to convert the i 2 semiconductor into β phase during the sintering process, the sintering temperature must be 1
It is necessary to set it to 124 ° K or more, a large temperature difference occurs in the sintering step including electrode formation, and due to the difference in the thermal expansion coefficient and the contraction rate during firing between the electrode formed of another material and the FeSi 2 semiconductor, Cracks may be generated near the electrode portion.

【００１１】本発明は、上記実情に鑑みてなされたもの
で、その目的は、同一粒径に対して焼成時の収縮率が異
なる２種類の焼結体を隣接させた複合焼結体を、粉体焼
結法によって同時に一体形成する際に、両焼結体間の熱
膨張率及び焼成時の収縮率の差に起因するクラックの発
生を防止し、更に、ＦｅＳｉ2 半導体とそれと良好なオ
ーミック接触が可能な電極を粉体焼結法により同時一体
形成することで、低接触抵抗の電極を実現して熱電素子
としての性能の向上を図り、ＦｅＳｉ2 半導体が本来有
する上記利点を有効に活用し、高温使用に適した高性能
の熱電素子を提供する点にある。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a composite sintered body in which two types of sintered bodies having different shrinkage rates during firing for the same grain size are adjacent to each other. in forming integrated simultaneously by the powder sintering method, the occurrence of cracks due to differences in thermal expansion and shrinkage rate during firing between the two sintered bodies to prevent further, FeSi 2 semiconductor and therewith good ohmic Simultaneously and integrally forming contactable electrodes by powder sintering method, realizing low contact resistance electrodes, improving the performance as thermoelectric elements, and effectively utilizing the above advantages inherent in FeSi 2 semiconductors Another object of the present invention is to provide a high-performance thermoelectric element suitable for high-temperature use.

【００１２】[0012]

【課題を解決するための手段】この目的を達成するため
の本発明による複合体焼結方法の第一の特徴構成は、特
許請求の範囲の欄の請求項１に記載した通り、同一粒径
に対して焼成時の収縮率が異なる２種類の焼結体を隣接
させた複合焼結体を、粉体焼結法によって同時に一体形
成する場合において、前記各焼結体の原料粉末の平均粒
径を焼成時の収縮率が大なる焼結体ほど大径にする点に
ある。The first feature of the composite sintering method according to the present invention for achieving this object is as described in claim 1 of the claims. In the case where a composite sintered body in which two types of sintered bodies having different shrinkage rates during firing are adjacent to each other is simultaneously formed integrally by a powder sintering method, the average particle size of the raw material powder of each of the sintered bodies is The point is that the larger the diameter of the sintered body is, the larger the shrinkage ratio during firing becomes.

【００１３】同第二の特徴構成は、特許請求の範囲の欄
の請求項２に記載した通り、前記第一の特徴構成に加え
て、前記２種類の焼結体の一方が、ＦｅＳｉ2 半導体で
あって、他方が、Ｆｅ、Ｎｉ、Ｃｏ、または、Ｍｎ、Ｃ
ｏ等のドーピング材を含むＦｅを成分とする金属である
点にある。According to a second feature of the present invention, as described in claim 2 of the claims, in addition to the first feature, one of the two types of sintered bodies is formed of an FeSi 2 semiconductor. And the other is Fe, Ni, Co or Mn, C
It is a metal containing Fe as a component containing a doping material such as o.

【００１４】以下に作用並びに効果を説明する。第一の
特徴構成によれば、一般に粉体粒子の粒径が小さくなる
ほど、熱収縮による凝集性が増すので、隣接する２種類
の焼結体間の実効的な収縮率差を低減することができ、
両焼結体を粉体焼結法によって同時に一体形成する場合
の焼成時の温度差に起因するクラックの発生を抑制する
ことができるのである。The operation and effect will be described below. According to the first characteristic configuration, in general, as the particle size of the powder particles becomes smaller, the cohesiveness due to heat shrinkage increases, so that it is possible to reduce the difference in effective shrinkage ratio between two adjacent types of sintered bodies. Can,
When both sintered bodies are simultaneously formed integrally by the powder sintering method, it is possible to suppress the occurrence of cracks due to the temperature difference during firing.

【００１５】第二の特徴構成によれば、ＦｅＳｉ2 半導
体上に低接触抵抗の電極をクラックの発生を抑制しなが
ら形成することができ、安定した製造歩留りと熱電素子
としての性能向上が同時に図れ、結果として、ＦｅＳｉ
2 半導体が本来有する上記利点を有効に活用し、高温使
用に適した高性能の熱電素子を提供することができるの
である。According to the second characteristic configuration, an electrode having a low contact resistance can be formed on the FeSi 2 semiconductor while suppressing the occurrence of cracks, and a stable production yield and an improvement in performance as a thermoelectric element can be achieved simultaneously. , As a result, FeSi
(2) It is possible to provide a high-performance thermoelectric element suitable for high-temperature use by effectively utilizing the above advantages inherent in semiconductors.

【００１６】[0016]

【発明の実施の形態】以下に、本発明に係る複合体焼結
方法の一実施の形態を、ＦｅＳｉ2 半導体からなる熱電
素子の作製に適用した場合について、図面に基づいて説
明する。図１に示すように、前記熱電素子は、棒状のＰ
型ＦｅＳｉ2 半導体１と棒状のＮ型ＦｅＳｉ2 半導体２
が夫々の一端同士１ａ、２ａにおいて平面視Ｖ字形状に
直接接続し、更に、前記Ｐ型ＦｅＳｉ2 半導体１と前記
Ｎ型ＦｅＳｉ2 半導体２の各他端１ｂ、２ｂ側の上面
に、Ｆｅを成分とする電極３が直接形成された構成とな
っている。ここで、前記熱電素子は、前記平面視Ｖ字形
状のＰ型ＦｅＳｉ2 半導体１とＮ型ＦｅＳｉ2 半導体２
からなる第１焼結体５と、同一粒径における焼成時の収
縮率が前記第１焼結体５より大きい前記電極３を形成す
る第２焼結体６とが隣接して一体形成された複合焼結体
７である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A description will be given below of a case where an embodiment of a composite sintering method according to the present invention is applied to the production of a thermoelectric element made of a FeSi 2 semiconductor with reference to the drawings. As shown in FIG. 1, the thermoelectric element has a rod-shaped P
-Type FeSi 2 semiconductor 1 and rod-shaped N-type FeSi 2 semiconductor 2
Are directly connected to each other at one end 1a, 2a in a V-shape in plan view, and further, Fe is formed on the upper surfaces of the other ends 1b, 2b of the P-type FeSi 2 semiconductor 1 and the N-type FeSi 2 semiconductor 2, The electrode 3 as a component is directly formed. Here, the thermoelectric element includes a P-type FeSi 2 semiconductor 1 and an N-type FeSi 2 semiconductor 2 having a V-shape in plan view.
And a second sintered body 6 forming the electrode 3 adjacent to the first sintered body 5 and having a smaller shrinkage ratio during firing with the same particle size than the first sintered body 5 are integrally formed. This is a composite sintered body 7.

【００１７】図２に示すように、前記複合焼結体７は、
前記Ｐ型ＦｅＳｉ2 半導体１、前記Ｎ型ＦｅＳｉ2 半導
体２、及び、前記電極３の各部を含む、直径４０ｍｍ、
厚さ７ｍｍの円盤体４を粉体焼結法の一種である無加圧
焼結法により同時に一体で作製した後に、マイクロカッ
ターで図中破線部分に沿ってＶ字形状に切削加工して作
製される。また、前記電極３の厚さは、全体の厚み７ｍ
ｍ中の２ｍｍで上面側に位置している。何れも焼成後の
寸法である。As shown in FIG. 2, the composite sintered body 7 is
A diameter of 40 mm including the P-type FeSi 2 semiconductor 1, the N-type FeSi 2 semiconductor 2, and each part of the electrode 3;
A disk 7 having a thickness of 7 mm is simultaneously and integrally formed by a pressureless sintering method, which is a kind of powder sintering method, and then cut into a V-shape along a broken line in the figure with a micro cutter. Is done. The thickness of the electrode 3 is 7 m in total thickness.
It is located on the upper surface side at 2 mm in m. All are dimensions after firing.

【００１８】以下、前記円盤体４の作製について説明す
る。前記Ｐ型ＦｅＳｉ2 半導体１の原料粉末は、Ｆｅ
（純度９９．９％以上）、Ｓｉ（純度９９．９％以
上）、Ｍｎ（純度９９．９９％以上）を原料としてＦｅ
(1 -X) Ｍｎx Ｓｉ2 （Ｘ＝０．０５〜０．１３）の組成
になるように秤量して真空溶解炉で溶解したものの粗粉
末を、ボールミルでメカニカルグライディングして平均
粒径５〜８ｍｍの微粉末としたものを使用する。一方、
前記Ｎ型ＦｅＳｉ2 半導体２の原料粉末は、Ｆｅ（純度
９９．９％以上）、Ｓｉ（純度９９．９％以上）、Ｃｏ
（純度９９．９％以上）を原料としてＦｅ(1-Y) ＣｏY
Ｓｉ2 （Ｙ＝０．０３〜０．１２）の組成になるように
秤量して真空溶解炉で溶解したものの粗粉末を、上記同
様に平均粒径５〜８ｍｍの微粉末としたものを使用す
る。前記電極３の原料粉末は、Ｆｅ（純度９９．９％以
上）の粗粉末を、上記と同様の工程を経て、平均粒径１
〜１０μｍの微粉末と、前記Ｐ型またはＮ型ＦｅＳｉ2
半導体１、２の原料粉末より大径にしたものを使用す
る。Hereinafter, the production of the disk 4 will be described. The raw material powder of the P-type FeSi 2 semiconductor 1 is Fe powder
(Purity 99.9% or more), Si (purity 99.9% or more), Mn (purity 99.99% or more)
(1 -X) Mn x Si 2 (X = 0.05 to 0.13) The composition was weighed to have a composition of 0.5 to 0.13 and melted in a vacuum melting furnace. 〜8 mm fine powder is used. on the other hand,
The raw material powder of the N-type FeSi 2 semiconductor 2 includes Fe (purity of 99.9% or more), Si (purity of 99.9% or more), Co
(Purity 99.9% or more) as raw material and Fe (1-Y) Co Y
A coarse powder obtained by weighing so as to have a composition of Si 2 (Y = 0.03 to 0.12) and melting in a vacuum melting furnace is used as a fine powder having an average particle diameter of 5 to 8 mm in the same manner as described above. I do. The raw material powder of the electrode 3 is obtained by subjecting a coarse powder of Fe (purity of 99.9% or more) to a process similar to that described above to obtain an average particle diameter of 1: 1.
10 μm fine powder and the P-type or N-type FeSi 2
A semiconductor having a larger diameter than the raw material powder of the semiconductors 1 and 2 is used.

【００１９】前記Ｐ型ＦｅＳｉ2 半導体１及び前記Ｎ型
ＦｅＳｉ2 半導体２の原料粉末を所定円筒容器内に夫々
半円柱分づつ充填し、更に、図２に示す電極形成部分に
前記電極３の原料粉末を充填して、円盤状に予備成形し
たものを、焼結温度１０５０℃、昇温時間３０分で、無
加圧焼結を施した。尚、焼結温度１０５０℃は、前記Ｐ
型ＦｅＳｉ2 半導体１及び前記Ｎ型ＦｅＳｉ2 半導体２
の原料粉末が焼結して、しかもβ相化する温度１１２４
°Ｋ以上に設定してある。Raw material powders of the P-type FeSi 2 semiconductor 1 and the N-type FeSi 2 semiconductor 2 are filled into predetermined cylindrical containers by half cylinders, respectively. The powder was filled and preliminarily formed into a disk shape, and pressureless sintering was performed at a sintering temperature of 1050 ° C. and a heating time of 30 minutes. The sintering temperature of 1050 ° C.
-Type FeSi 2 semiconductor 1 and N-type FeSi 2 semiconductor 2
Temperature at which the raw material powder sinters and becomes β-phase
° K or higher.

【００２０】以上の設定条件において、前記電極３のＦ
ｅ原料粉末が前記各ＦｅＳｉ2 半導体１、２の原料粉末
と平均粒径が同じ場合は、前記電極３の方が熱収縮しや
すいのであるが、上記した如く、Ｆｅ原料粉末の平均粒
径の方を大径にしてあるため、前記電極３の熱収縮率が
低下し、前記電極３と前記各ＦｅＳｉ2 半導体１、２間
の熱収縮率の差が縮まり、その熱収縮率の差によるスト
レスが緩和されクラック等の発生が抑制され、製造歩留
りが改善される。Under the above set conditions, the F of the electrode 3
When the raw material powder has the same average particle size as the raw material powder of each of the FeSi 2 semiconductors 1 and 2, the electrode 3 is more likely to be thermally contracted. Since the diameter is larger, the heat shrinkage of the electrode 3 is reduced, the difference in heat shrinkage between the electrode 3 and each of the FeSi 2 semiconductors 1 and 2 is reduced, and the stress due to the difference in heat shrinkage is reduced. , Cracks and the like are suppressed, and the production yield is improved.

【００２１】ところで、前記各ＦｅＳｉ2 半導体１、２
の熱電性能を決定する一要素として、当該部分の熱伝導
率は低い方が好ましい。一般に、原料粉末の粒径が小さ
いほどその熱伝導率は低くなるため、前記各ＦｅＳｉ2
半導体１、２の原料粉末の平均粒径が前記電極３のＦｅ
原料粉末より相対的に小径であることは、前記各ＦｅＳ
ｉ2 半導体１、２の熱電性能の高性能化とは矛盾せず、
むしろ好ましいのである。Incidentally, each of the FeSi 2 semiconductors 1, 2
As one factor that determines the thermoelectric performance of the device, the thermal conductivity of the portion is preferably low. In general, since as the particle size of the raw material powder is smaller its thermal conductivity is low, each of FeSi 2
The average particle size of the raw material powders of the semiconductors 1 and 2
The fact that the diameter is relatively smaller than that of the raw material powder means that each FeS
consistent with the higher thermoelectric performance of i 2 semiconductors 1 and 2,
It is rather preferred.

【００２２】尚、無加圧焼結法では、焼成後の緻密度が
９２％〜９３％であるため、耐久性を向上させるために
は、ホットプレス焼結法や熱間等方圧力焼結法等の使用
が好ましい。しかしながら、焼結法として、ホットプレ
ス焼結法や熱間等方圧力焼結法等の加圧焼結法を用いる
場合は、加圧用の黒鉛製のパンチの炭素と前記電極３の
Ｆｅが反応し、前記電極３が剥がれる虞があるため、前
記パンチを例えばアルミナ製等に変更する必要がある。In the pressureless sintering method, the compactness after sintering is 92% to 93%. Therefore, in order to improve the durability, hot press sintering or hot isostatic sintering is required. It is preferable to use the method. However, when a pressure sintering method such as a hot press sintering method or a hot isostatic pressure sintering method is used as the sintering method, carbon of the graphite punch for pressurization and Fe of the electrode 3 react. However, since the electrode 3 may be peeled off, it is necessary to change the punch to, for example, alumina.

【００２３】尚、上記製法で作製された熱電素子の内部
抵抗を、同形状で同じ作製方法で前記電極３を設けず超
音波ハンダ付けで電極部を設けた従来の熱電素子の内部
抵抗と比較した結果、従来６Ωであったものが、０．１
Ω以下に低減されていることが確認できた。これより、
Ｆｅを成分とする前記電極３と前記各ＦｅＳｉ2 半導体
１、２の間で良好なオーミック接触が形成されているの
が確認される。また、Ｎｉ、Ｃｏ、または、Ｍｎ、Ｃｏ
等のドーピング材を含むＦｅを成分とする電極でも、同
様の実験により良好なオーミック接触がクラック等の発
生を伴わずに形成できることが確認できている。The internal resistance of the thermoelectric element manufactured by the above manufacturing method was compared with the internal resistance of a conventional thermoelectric element having the same shape and the same manufacturing method but without the electrode 3 but provided with an electrode portion by ultrasonic soldering. As a result, what was conventionally 6Ω was changed to 0.1Ω.
It was confirmed that it was reduced to Ω or less. Than this,
It is confirmed that a good ohmic contact is formed between the electrode 3 containing Fe as a component and each of the FeSi 2 semiconductors 1 and 2. Also, Ni, Co, or Mn, Co
It has been confirmed by a similar experiment that an excellent ohmic contact can be formed without generating a crack or the like even with an electrode containing Fe containing a doping material such as.

【００２４】以上、本発明に係る複合体焼結方法につ
き、ＦｅＳｉ2 半導体とその電極の作製に適用した実施
の形態を説明したが、その用途は必ずしも本実施形態に
示すものに限定されるものではなく、同一粒径に対して
焼成時の収縮率が異なる２種類の焼結体を隣接させた構
成を有する他の複合焼結体の作製に適用しても構わな
い。As described above, the embodiment of the composite sintering method according to the present invention applied to the production of an FeSi 2 semiconductor and its electrode has been described. However, its application is not necessarily limited to the one shown in this embodiment. Instead, the present invention may be applied to the production of another composite sintered body having a configuration in which two types of sintered bodies having different shrinkage rates during firing with respect to the same particle size are adjacent to each other.

【００２５】[0025]

【発明の効果】以上説明したように、本発明によれば、
ＦｅＳｉ2 半導体とそれと良好なオーミック接触が可能
な電極を粉体焼結法により同時一体形成することで、低
接触抵抗の電極を実現して熱電素子としての性能の向上
を図り、ＦｅＳｉ2 半導体が本来有する高温度使用、耐
酸化性、導電型制御容易性、低原料コスト等の多くの利
点を有効に活用し、高温使用に適した高性能の熱電素子
を提供することができた。更に、この結果より、同一粒
径に対して焼成時の収縮率が異なる２種類の焼結体を隣
接させた複合焼結体を、両焼結体間の熱膨張率及び焼成
時の収縮率の差に起因するクラック発生の防止を図りな
がら、粉体焼結法によって同時に一体形成する複合体焼
結方法が提供できた。As described above, according to the present invention,
FeSi 2 semiconductor and therewith good ohmic contact can be the electrodes that simultaneously integrally formed by the powder sintering method, to achieve a low contact resistance electrodes aims to improve the performance as a thermoelectric element, FeSi 2 semiconductor Many advantages such as inherent high temperature use, oxidation resistance, easy control of conductivity type, and low raw material cost were effectively utilized, and a high performance thermoelectric element suitable for high temperature use could be provided. Furthermore, from this result, the composite sintered body in which two types of sintered bodies having different shrinkage rates at the time of firing for the same grain size were adjacent to each other was used to obtain the thermal expansion coefficient between both sintered bodies and the shrinkage rate at the time of firing. Thus, it is possible to provide a composite sintering method for simultaneously forming a composite body by a powder sintering method while preventing the occurrence of cracks due to the difference between the two.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明に係る複合体焼結方法で作製された複合
焼結体を示す斜視図FIG. 1 is a perspective view showing a composite sintered body produced by a composite sintered method according to the present invention.

【図２】本発明に係る複合体焼結方法の一実施形態を説
明する模式図FIG. 2 is a schematic diagram illustrating an embodiment of a composite sintering method according to the present invention.

【符号の説明】[Explanation of symbols]

１ Ｐ型ＦｅＳｉ2 半導体 １ａ Ｐ型ＦｅＳｉ2 半導体の一端 １ｂ Ｐ型ＦｅＳｉ2 半導体の他端 ２ Ｎ型ＦｅＳｉ2 半導体 ２ａ Ｎ型ＦｅＳｉ2 半導体の一端 ２ｂ Ｎ型ＦｅＳｉ2 半導体の他端 ３ 電極 ４ 円盤体 ５ 第１焼結体 ６ 第２焼結体 ７ 複合焼結体1 P-type FeSi 2 semiconductor 1a P-type FeSi 2 semiconductor end 1b P-type FeSi 2 semiconductor of the other end 2 N type FeSi 2 semiconductor 2a N-type FeSi 2 semiconductor end 2b N-type FeSi 2 semiconductor of the other end 3 electrode 4 disc Body 5 First sintered body 6 Second sintered body 7 Composite sintered body

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】 同一粒径に対して焼成時の収縮率が異な
る２種類の焼結体を隣接させた複合焼結体を、粉体焼結
法によって同時に一体形成する複合体焼結方法であっ
て、 前記各焼結体の原料粉末の平均粒径を焼成時の収縮率が
大なる焼結体ほど大径にすることを特徴とする複合体焼
結方法。1. A composite sintering method in which two types of sintered compacts having different shrinkage ratios at the time of firing for the same particle size are adjacently formed simultaneously by a powder sintering method. A composite sintering method, characterized in that the average particle size of the raw material powder of each of the sintered bodies is made larger as the sintered body has a larger shrinkage ratio during firing. 【請求項２】 前記２種類の焼結体の一方が、ＦｅＳｉ
2 半導体であって、他方が、Ｆｅ、Ｎｉ、Ｃｏ、また
は、Ｍｎ、Ｃｏ等のドーピング材を含むＦｅを成分とす
る金属である請求項１記載の複合体焼結方法。2. One of the two types of sintered bodies is FeSi
2. The composite sintering method according to claim 1, wherein two semiconductors are used, and the other is a metal containing Fe, Ni, Co, or Fe containing a doping material such as Mn or Co as a component.
JP9265520A 1997-09-30 1997-09-30 Method for sintering composite body Pending JPH11106802A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9265520A JPH11106802A (en) 1997-09-30 1997-09-30 Method for sintering composite body

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9265520A JPH11106802A (en) 1997-09-30 1997-09-30 Method for sintering composite body

Publications (1)

Publication Number Publication Date
JPH11106802A true JPH11106802A (en) 1999-04-20

Family

ID=17418293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9265520A Pending JPH11106802A (en) 1997-09-30 1997-09-30 Method for sintering composite body

Country Status (1)

Country Link
JP (1) JPH11106802A (en)

Similar Documents

Publication Publication Date Title
EP1324400A1 (en) Thermoelectric conversion element
JP5078908B2 (en) Thermoelectric tunnel equipment
US20080087317A1 (en) Thermoelectric Transducer
JP2006156993A (en) Thermoelectric conversion module, apparatus and method for thermoelectric generation using it, exhaust heat recovery system, solar heat using system, peltier cooling/heating system, nuclear thermoelectric generation system, and biomass system
TW201004003A (en) Thermoelectric conversion module and method of manufacturing the same
KR100341669B1 (en) Thermoelectric conversion element
JP2003309294A (en) Thermoelectric module
JP2003092435A (en) Thermoelectric module and its manufacturing method
JP3216378B2 (en) Thermoelectric device and method of manufacturing the same
JP2001217469A (en) Thermoelectric conversion element and its manufacturing method
CN110098312B (en) Connection method of segmented thermoelectric material
CN107665943A (en) Thermo-electric device electrode and preparation method thereof and thermo-electric device
CN207529976U (en) Thermo-electric device and its electrode
JPH11112037A (en) Thermionic element and method for forming electrode of the same
JPH06144825A (en) Production of thermoelectric element
KR20200054539A (en) Anti-diffusion layer of thermoelectric material and manufacturing method thereof
JPH11106802A (en) Method for sintering composite body
JPH09172204A (en) Thermoelectric conversion apparatus and thermoelectric its manufacture
JPH11298052A (en) Thermoelectric element, thermoelectric material and manufacture thereof
JP3763107B2 (en) Thermoelectric conversion module and manufacturing method thereof
JP2010016132A (en) Thermoelectric conversion module and method of producing the same
JP3588355B2 (en) Thermoelectric conversion module substrate and thermoelectric conversion module
JP2003332637A (en) Thermoelectric material and thermoelectric module using the same
JPH1022530A (en) Thermoplastic conversion element
JP2001189497A (en) Thermoelectric conversion element and manufacturing method therefor