JPH1065072A - Heat radiating electrode structure - Google Patents
Heat radiating electrode structureInfo
- Publication number
- JPH1065072A JPH1065072A JP8218585A JP21858596A JPH1065072A JP H1065072 A JPH1065072 A JP H1065072A JP 8218585 A JP8218585 A JP 8218585A JP 21858596 A JP21858596 A JP 21858596A JP H1065072 A JPH1065072 A JP H1065072A
- Authority
- JP
- Japan
- Prior art keywords
- heat
- semiconductor element
- electrode
- heat radiation
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、基板上にフェイス
ダウン実装された半導体素子の冷却に有用な放熱電極構
造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat radiation electrode structure useful for cooling a semiconductor element mounted face down on a substrate.
【０００２】[0002]
【従来の技術】従来、基板上にフェイスダウン実装され
た半導体素子の冷却には、半導体素子にシリコングリス
等を介して金属製の放熱器を取り付け、半導体素子で発
生した熱を該放熱器に伝えて放熱する方式が一般に採用
されている。2. Description of the Related Art Conventionally, to cool a semiconductor element mounted face down on a substrate, a metal radiator is attached to the semiconductor element via silicon grease or the like, and heat generated by the semiconductor element is applied to the radiator. The method of transmitting and dissipating heat is generally adopted.
【０００３】[0003]
【発明が解決しようとする課題】上記従来のものでは、
半導体素子に放熱器が取り付けられるため、実装基板が
その分厚くなり薄型化の障害となる不具合がある。SUMMARY OF THE INVENTION In the above prior art,
Since the radiator is attached to the semiconductor element, there is a problem that the mounting substrate becomes thicker and becomes an obstacle to thinning.
【０００４】本発明は上記事情に鑑みてなされたもの
で、その目的とするところは、薄型で且つ高い放熱性が
得られる放熱電極構造を提供することにある。The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a heat radiation electrode structure which is thin and has high heat radiation.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するた
め、本発明に係る放熱電極構造は、半導体素子がフェイ
スダウン実装される基板上に、半導体素子と僅かな間隙
をおいて対向する少なくとも１つの放熱用突起電極を設
け、半導体素子と放熱用突起電極との間隙に熱伝導性絶
縁材を充填した、ことをその主たる特徴としている。In order to achieve the above object, a heat radiation electrode structure according to the present invention is provided on a substrate on which a semiconductor element is mounted face-down, at least one of which faces the semiconductor element with a slight gap. The main feature is that two heat radiation projection electrodes are provided, and a gap between the semiconductor element and the heat radiation projection electrode is filled with a heat conductive insulating material.
【０００６】本発明に係る放熱電極構造によれば、半導
体素子で発生した熱を、熱伝導性絶縁材を介して放熱用
突起電極から基板に伝えて放熱することができ、従来の
ような放熱器を半導体素子に取り付ける必要がないので
実装基板の厚みが厚くならない。According to the heat dissipating electrode structure of the present invention, the heat generated in the semiconductor element can be transferred from the heat dissipating protruding electrode to the substrate via the heat conductive insulating material and dissipated, so that the conventional heat dissipating heat can be obtained. It is not necessary to attach the device to the semiconductor element, so that the thickness of the mounting board does not increase.
【０００７】[0007]
【発明の実施の形態】図１乃至図５には本発明の第１の
実施形態を示してある。以下に本実施形態に係る放熱電
極構造をその構築手順を交えて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1 to 5 show a first embodiment of the present invention. Hereinafter, the heat radiation electrode structure according to the present embodiment will be described together with its construction procedure.
【０００８】まず、図１に示すような基板１を用意す
る。この基板１の上面には、後述する半導体素子６が接
続される複数の電極２が設けられ、また後述する放熱用
バンプ４が形成される電極３がその内側位置に設けられ
ている。First, a substrate 1 as shown in FIG. 1 is prepared. A plurality of electrodes 2 to which a semiconductor element 6 described later is connected are provided on the upper surface of the substrate 1, and an electrode 3 on which a heat radiation bump 4 described later is formed is provided at an inner position thereof.
【０００９】次に、図１に示すように、電極３の上面
に、山型状の放熱用バンプ４を複数個形成する。この放
熱用バンプ４は熱伝導性の高いＡｕ，Ａｇ，Ａｌ，Ｃｕ
等の金属またはこれらの合金から成り、その形成方法は
周知のものと同様であるためここでの説明を省略する。Next, as shown in FIG. 1, a plurality of chevron-shaped heat radiation bumps 4 are formed on the upper surface of the electrode 3. The heat radiation bumps 4 are made of Au, Ag, Al, Cu having high thermal conductivity.
And the like, or an alloy thereof, and the forming method thereof is the same as that of the well-known one, so that the description is omitted here.
【００１０】次に、図２に示すように、電極３上に形成
された放熱用バンプ４に下面が平らな治具５を押し付け
て変形させ、放熱用バンプ４に基板上面と平行な平坦面
を形成する。本実施形態では加工成形後の放熱用バンプ
４’と電極３によって放熱用突起電極が構成される。Next, as shown in FIG. 2, a jig 5 having a flat lower surface is pressed against a heat-dissipating bump 4 formed on the electrode 3 to deform the same. To form In this embodiment, the heat-dissipating bump electrodes 4 ′ and the electrodes 3 after the forming process form the heat-dissipating bump electrodes.
【００１１】次に、図３に示すように、基板１の上面に
半導体素子６をフェイスダウン実装する。この半導体素
子６の下面には、電極２に対応する複数のコンタクト電
極７が設けられ、また電極３に対応するグランド電極８
がその内側位置に設けられている。また、コンタクト電
極７の下面には接続用バンプ９が予め形成されており、
該バンプ９は実装時に基板１上の電極２に接続される。Next, as shown in FIG. 3, a semiconductor element 6 is mounted face down on the upper surface of the substrate 1. A plurality of contact electrodes 7 corresponding to the electrodes 2 are provided on the lower surface of the semiconductor element 6, and a ground electrode 8 corresponding to the electrode 3 is provided.
Is provided at the inside position. In addition, connection bumps 9 are formed in advance on the lower surface of the contact electrodes 7,
The bumps 9 are connected to the electrodes 2 on the substrate 1 during mounting.
【００１２】基板１上に実装された半導体素子１の下面
（グランド電極８）と、放熱用バンプ４’の平坦面との
間には、好ましくは両者が接触しない範囲で極力狭い間
隙Ｓが形成される。換言すれば、先に述べた放熱用バン
プ４の成形荷重及び加工成形後の放熱用バンプ４’の基
板上面からの高さ寸法は上記間隙Ｓが確保できるように
設定される。A gap S is formed as small as possible between the lower surface (ground electrode 8) of the semiconductor element 1 mounted on the substrate 1 and the flat surface of the heat radiation bump 4 ', preferably in a range where they do not contact each other. Is done. In other words, the molding load of the heat-dissipating bumps 4 and the height of the heat-dissipating bumps 4 ′ from the upper surface of the substrate after the processing are set so that the gap S can be secured.
【００１３】ちなみに、図３では半導体素子６のコンタ
クト電極７に接続用バンプ９を形成したものを例示した
が、半導体素子６側に設けられた接続用バンプ９は、図
４に示すように基板１の電極２上に形成するようにして
も同様のフェイスダウン実装を行うことができる。FIG. 3 shows an example in which the connection bumps 9 are formed on the contact electrodes 7 of the semiconductor element 6. However, the connection bumps 9 provided on the semiconductor element 6 are formed on the substrate as shown in FIG. The same face-down mounting can be performed by forming the same on the one electrode 2.
【００１４】次に、図５に示すように、上記間隙Ｓを含
む基板１と半導体素子６との間の隙間に熱伝導性の高い
絶縁性樹脂１０、例えばエポキシ樹脂またはシリコン樹
脂を充填する。以上で基板１への半導体素子６の実装を
完了する。Next, as shown in FIG. 5, the gap between the substrate 1 and the semiconductor element 6 including the gap S is filled with an insulating resin 10 having a high thermal conductivity, for example, an epoxy resin or a silicon resin. Thus, the mounting of the semiconductor element 6 on the substrate 1 is completed.
【００１５】図５から分かるように、本実施形態に係る
放熱電極構造では、半導体素子６がフェイスダウン実装
される基板１上に、加工成形後の放熱用バンプ４’と電
極３によって放熱用突起電極が構成されており、該放熱
用突起電極と半導体素子６のグランド電極８との間に両
者が接触しない範囲で極力狭い間隙Ｓが形成され、この
間隙Ｓに熱伝導性の高い絶縁性樹脂１０が充填されてい
る。As can be seen from FIG. 5, in the heat radiation electrode structure according to the present embodiment, the heat radiation bumps 4 ′ and the electrodes 3 are formed on the substrate 1 on which the semiconductor element 6 is mounted face-down by the heat radiation bumps 4 ′. An electrode is formed, and a gap S is formed as small as possible between the projection electrode for heat dissipation and the ground electrode 8 of the semiconductor element 6 as long as the two are not in contact with each other. 10 are filled.
【００１６】この放熱電極構造によれば、半導体素子６
で発生した熱を、グランド電極８から絶縁性樹脂１０を
介して放熱用突起電極（放熱用バンプ４’及び電極３）
から基板１に伝えて放熱することができる。According to this heat radiation electrode structure, the semiconductor element 6
From the ground electrode 8 via the insulating resin 10 through the heat dissipation protrusion electrodes (heat dissipation bumps 4 'and the electrodes 3).
To the substrate 1 to dissipate heat.
【００１７】半導体素子６のグランド電極８と基板１上
の放熱用バンプ４’との間隙Ｓが狭く、しかも該間隙Ｓ
に熱伝導性の絶縁性樹脂１０が充填されているので、半
導体素子１の熱を放熱用突起電極（放熱用バンプ４’及
び電極３）に速やかに伝えて高い放熱性を得ることがで
きる。The gap S between the ground electrode 8 of the semiconductor element 6 and the radiating bump 4 'on the substrate 1 is small.
Is filled with the thermally conductive insulating resin 10, the heat of the semiconductor element 1 can be quickly transmitted to the heat projecting electrodes (heat projecting bumps 4 'and electrodes 3) to obtain high heat dissipation.
【００１８】また、放熱用バンプ４’に基板上面と平行
な平坦面を形成し、該平坦面をグランド電極８に向き合
わせてあるので、半導体素子１の熱を対向面間で効率よ
く伝えて基板１への熱伝導を効果的に行うことができ
る。Further, since a flat surface parallel to the upper surface of the substrate is formed on the heat radiation bump 4 'and the flat surface is opposed to the ground electrode 8, the heat of the semiconductor element 1 is efficiently transmitted between the opposing surfaces. Heat conduction to the substrate 1 can be effectively performed.
【００１９】更に、従来のような放熱器を半導体素子６
に取り付ける必要がないので、実装基板の厚みが厚くな
らない利点がある。Further, a radiator as in the prior art is connected to the semiconductor element 6.
Since there is no need to attach the mounting board, there is an advantage that the thickness of the mounting board is not increased.
【００２０】図６及び図７には本発明の第２の実施形態
を示してある。本実施形態に係る放熱電極構造が第１の
実施形態のものと異なるところは、放熱用バンプ４の代
わりに図６に示すような放熱用厚膜１１を電極３上に形
成し、該放熱用厚膜１１に基板上面と平行な平坦面を第
１実施形態と同様の治具５を用いて形成した点にある。
本実施形態では加工成形後の放熱用厚膜１１’と電極３
によって放熱用突起電極が構成される。FIGS. 6 and 7 show a second embodiment of the present invention. The heat radiation electrode structure according to the present embodiment is different from that of the first embodiment in that a heat radiation thick film 11 as shown in FIG. The point is that a flat surface parallel to the upper surface of the substrate is formed on the thick film 11 using the same jig 5 as in the first embodiment.
In this embodiment, the heat-dissipating thick film 11 ′ and the electrode 3
Thus, a heat radiation projection electrode is formed.
【００２１】放熱用厚膜１１は、スクリーン印刷法によ
って導体ペーストを所定形状で塗布しこれを乾燥し焼成
することにより得られる。導体ペーストは、熱伝導性の
高いＡｕ，Ａｇ，Ａｌ，Ｃｕ等の金属粉末と溶剤とバイ
ンダとを混合して調製したものが使用される。The heat-dissipating thick film 11 is obtained by applying a conductive paste in a predetermined shape by a screen printing method, and drying and firing the paste. As the conductor paste, one prepared by mixing a metal powder such as Au, Ag, Al, or Cu having high thermal conductivity, a solvent, and a binder is used.
【００２２】この放熱電極構造は、基板１にフェイスダ
ウン実装される半導体素子６の下面側に、厚膜形成可能
なエリアが確保できる場合に有用である。他の作用，効
果は第１の実施形態のものと同様である。This heat dissipating electrode structure is useful when an area where a thick film can be formed can be secured on the lower surface side of the semiconductor element 6 mounted face down on the substrate 1. Other operations and effects are the same as those of the first embodiment.
【００２３】図８及び図９には本発明の第３の実施形態
を示してある。本実施形態に係る放熱電極構造が第１の
実施形態のものと異なるところは、放熱用バンプ４を形
成した後に図８に示すようにこれを絶縁性樹脂１２で被
覆し、図９に示すように半導体素子６をフェイスダウン
実装するときの圧力を利用して放熱用バンプ４の加工成
形を行うようにした点にある。FIGS. 8 and 9 show a third embodiment of the present invention. The heat radiation electrode structure according to the present embodiment is different from that of the first embodiment in that the heat radiation bumps 4 are formed and then covered with an insulating resin 12 as shown in FIG. In this case, the heat-dissipating bumps 4 are formed by utilizing the pressure when the semiconductor element 6 is mounted face-down.
【００２４】この放熱電極構造によれば、治具５を用い
て放熱用バンプ４の加工成形を行う工程を省略して構築
手順を簡略化することができる。他の作用，効果は第１
の実施形態のものと同様である。According to this heat radiation electrode structure, the step of processing and forming the heat radiation bumps 4 using the jig 5 can be omitted, and the construction procedure can be simplified. Other actions and effects are first
This is the same as that of the embodiment.
【００２５】勿論、本実施形態における改良事項は第２
の実施形態にも適用可能であり、図１０に示すように放
熱用厚膜１１を絶縁性樹脂１２で被覆し、半導体素子６
をフェイスダウン実装するときの圧力を利用して放熱用
厚膜１１の加工成形を行うようにしてもよい。Of course, the improvement in this embodiment is the second
The heat radiation thick film 11 is covered with an insulating resin 12 as shown in FIG.
The heat-dissipating thick film 11 may be processed and formed by utilizing the pressure at the time of face-down mounting.
【００２６】[0026]
【発明の効果】以上詳述したように、本発明によれば、
半導体素子で発生した熱を、熱伝導性絶縁材を介して放
熱用突起電極から基板に伝えて放熱することが可能であ
り、半導体素子と放熱用突起電極との間隙が狭く、しか
も該間隙に熱伝導性絶縁材が充填されているので、半導
体素子の熱を放熱用突起電極に速やかに伝えて高い放熱
性を得ることができる。また、従来のような放熱器を半
導体素子に取り付ける必要がないので、実装基板の厚み
が厚くならない利点がある。As described in detail above, according to the present invention,
The heat generated in the semiconductor element can be transmitted to the substrate from the projecting electrode for heat dissipation through the heat conductive insulating material to dissipate the heat.The gap between the semiconductor element and the projecting electrode for heat dissipation is narrow, and the gap Since the heat conductive insulating material is filled, the heat of the semiconductor element can be quickly transmitted to the projecting electrode for heat dissipation, and high heat dissipation can be obtained. In addition, since it is not necessary to attach a radiator to the semiconductor element as in the related art, there is an advantage that the thickness of the mounting substrate does not increase.
【図１】本発明の第１の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 1 is a view showing a construction procedure of a heat radiation electrode structure according to a first embodiment of the present invention.
【図２】本発明の第１の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 2 is a view showing a construction procedure of a heat radiation electrode structure according to the first embodiment of the present invention.
【図３】本発明の第１の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 3 is a view showing a construction procedure of a heat radiation electrode structure according to the first embodiment of the present invention.
【図４】本発明の第１の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 4 is a diagram showing a procedure for constructing a heat radiation electrode structure according to the first embodiment of the present invention.
【図５】本発明の第１の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 5 is a diagram showing a construction procedure of a heat radiation electrode structure according to the first embodiment of the present invention.
【図６】本発明の第２の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 6 is a view showing a construction procedure of a heat radiation electrode structure according to a second embodiment of the present invention.
【図７】本発明の第２の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 7 is a view showing a construction procedure of a heat radiation electrode structure according to a second embodiment of the present invention.
【図８】本発明の第３の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 8 is a view showing a construction procedure of a heat radiation electrode structure according to a third embodiment of the present invention.
【図９】本発明の第３の実施形態に係る放熱電極構造の
構築手順を示す図FIG. 9 is a diagram showing a construction procedure of a heat radiation electrode structure according to a third embodiment of the present invention.
【図１０】第３の実施形態における改良事項を第２の実
施形態に適用した例を示す図FIG. 10 is a diagram showing an example in which improvements in the third embodiment are applied to the second embodiment.
１…基板、２，３…電極、４，４’…放熱用バンプ、５
…治具、６…半導体素子、７…コンタクト電極、８…グ
ランド電極、９…接続用バンプ、Ｓ…間隙、１０…絶縁
性樹脂、１１，１１’…放熱用厚膜、１２…絶縁性樹
脂。DESCRIPTION OF SYMBOLS 1 ... Substrate, 2, 3 ... Electrode, 4, 4 '... Heat dissipation bump, 5
... Jig, 6 ... Semiconductor element, 7 ... Contact electrode, 8 ... Ground electrode, 9 ... Bump for connection, S ... Gap, 10 ... Insulating resin, 11, 11 '... Thick film for heat dissipation, 12 ... Insulating resin .
Claims (3)
基板上に、半導体素子と僅かな間隙をおいて対向する少
なくとも１つの放熱用突起電極を設け、半導体素子と放
熱用突起電極との間隙に熱伝導性絶縁材を充填した、 ことを特徴する放熱電極構造。At least one heat-dissipating projection electrode is provided on a substrate on which a semiconductor element is mounted face-down with a slight gap therebetween, and a heat gap is provided between the semiconductor element and the heat-dissipation projection electrode. A heat dissipating electrode structure characterized by being filled with a conductive insulating material.
平坦面を有する、 ことを特徴とする請求項１記載の放熱電極構造。2. The heat radiation electrode structure according to claim 1, wherein the heat radiation projection electrode has a flat surface facing the semiconductor element.
部分にグランド電極を有する、 ことを特徴とする請求項１または２項記載の放熱電極構
造。3. The heat dissipation electrode structure according to claim 1, wherein the semiconductor element has a ground electrode at a portion facing the projection electrode for heat dissipation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8218585A JPH1065072A (en) | 1996-08-20 | 1996-08-20 | Heat radiating electrode structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8218585A JPH1065072A (en) | 1996-08-20 | 1996-08-20 | Heat radiating electrode structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1065072A true JPH1065072A (en) | 1998-03-06 |
Family
ID=16722268
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8218585A Pending JPH1065072A (en) | 1996-08-20 | 1996-08-20 | Heat radiating electrode structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1065072A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6259156B1 (en) | 1998-03-13 | 2001-07-10 | Nec Corporation | Semiconductor device and method for manufacturing same |
| US6960825B2 (en) | 1999-11-24 | 2005-11-01 | Denso Corporation | Semiconductor device having radiation structure |
| US7208827B2 (en) | 1999-12-14 | 2007-04-24 | Infineon Technologies Ag | Encasing arrangement for a semiconductor component |
| KR101108748B1 (en) * | 2010-08-23 | 2012-02-24 | 삼성전기주식회사 | Package of semiconductor and method of manufacturing the same |
| US8283775B2 (en) | 2008-10-03 | 2012-10-09 | Panasonic Corporation | Wiring board, semiconductor device and method for manufacturing the same |
-
1996
- 1996-08-20 JP JP8218585A patent/JPH1065072A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6259156B1 (en) | 1998-03-13 | 2001-07-10 | Nec Corporation | Semiconductor device and method for manufacturing same |
| US6372550B2 (en) | 1998-03-13 | 2002-04-16 | Nec Corporation | Semiconductor device and method for manufacturing same |
| US6627989B2 (en) | 1998-03-13 | 2003-09-30 | Nec Electronics Corporation | Semiconductor device and method for manufacturing same |
| US6960825B2 (en) | 1999-11-24 | 2005-11-01 | Denso Corporation | Semiconductor device having radiation structure |
| US6967404B2 (en) | 1999-11-24 | 2005-11-22 | Denso Corporation | Semiconductor device having radiation structure |
| US6992383B2 (en) | 1999-11-24 | 2006-01-31 | Denso Corporation | Semiconductor device having radiation structure |
| US7208827B2 (en) | 1999-12-14 | 2007-04-24 | Infineon Technologies Ag | Encasing arrangement for a semiconductor component |
| US8283775B2 (en) | 2008-10-03 | 2012-10-09 | Panasonic Corporation | Wiring board, semiconductor device and method for manufacturing the same |
| KR101108748B1 (en) * | 2010-08-23 | 2012-02-24 | 삼성전기주식회사 | Package of semiconductor and method of manufacturing the same |
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