JP3522975B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP3522975B2 JP3522975B2 JP14930696A JP14930696A JP3522975B2 JP 3522975 B2 JP3522975 B2 JP 3522975B2 JP 14930696 A JP14930696 A JP 14930696A JP 14930696 A JP14930696 A JP 14930696A JP 3522975 B2 JP3522975 B2 JP 3522975B2
- Authority
- JP
- Japan
- Prior art keywords
- metal
- solder layer
- insulating substrate
- semiconductor device
- base material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置に係
り、特に電力用半導体素子の発生熱の放散性を向上させ
るために素子搭載基板と放熱板とが半田固着された構造
を有する電力用半導体装置に関するもので、例えばＩＧ
ＢＴ（絶縁ゲート型バイポートランジスタ）などに使用
されるものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a power semiconductor having a structure in which an element mounting substrate and a heat sink are fixed by soldering in order to improve the dissipation of heat generated by a power semiconductor element. Related to equipment, eg IG
It is used for BT (insulated gate type bipolar transistor) and the like.
【０００２】[0002]
【従来の技術】図１は、一般的なＩＧＢＴモジュールの
断面構造を概略的に示している。図１において、１１は
それぞれ電力用半導体素子であるＩＧＢＴチップ、１２
はＩＧＢＴチップを搭載する電気伝導度の高い素子搭載
用絶縁基板、１３は例えばＣｕをベースとする放熱板、
１４は上記素子搭載用絶縁基板１２と放熱板１３とを固
着した半田層であり、例えばシート状に形成されたＰｂ
Ｓｎ共晶半田が用いられている。2. Description of the Related Art FIG. 1 schematically shows a cross-sectional structure of a general IGBT module. In FIG. 1, 11 is an IGBT chip, which is a power semiconductor element, and 12 is a power semiconductor element.
Is an insulating substrate for mounting an element having a high electrical conductivity on which an IGBT chip is mounted, 13 is a heat sink based on Cu, for example,
Reference numeral 14 is a solder layer in which the element mounting insulating substrate 12 and the heat radiating plate 13 are fixed to each other, for example, Pb formed in a sheet shape.
Sn eutectic solder is used.
【０００３】上記素子搭載用絶縁基板１２は、例えばセ
ラミックスのような絶縁基材１５の素子実装面上に例え
ばＣｕなどのメタルパターン１６が形成されており、上
記絶縁基材１５の裏面に例えばＣｕなどのメタル１７が
形成されている。The element mounting insulating substrate 12 has a metal pattern 16 such as Cu formed on the element mounting surface of an insulating base material 15 such as ceramics, and the back surface of the insulating base material 15 includes Cu. A metal 17 such as is formed.
【０００４】そして、上記メタルパターン１６の素子搭
載部上に前記チップ１１が第１の半田層１８により固着
され、メタルパターン１６の配線部と前記チップ１１の
パッド部とがボンディングワイヤーにより接続されてお
り、裏面のメタル１７が第２の半田層１４により前記放
熱板に固着されている。Then, the chip 11 is fixed on the element mounting portion of the metal pattern 16 by the first solder layer 18, and the wiring portion of the metal pattern 16 and the pad portion of the chip 11 are connected by a bonding wire. The metal 17 on the back surface is fixed to the heat dissipation plate by the second solder layer 14.
【０００５】なお、図８は、従来のＩＧＢＴモジュール
における素子搭載用絶縁基板１２と放熱板１３とを第２
の半田層１４で固着した部分の周辺部Ａを拡大して示
す。上記構造においては、ＩＧＢＴチップ１１と放熱板
１３との間に電気伝導度の高い素子搭載用絶縁基板１２
が介在し、ＩＧＢＴチップ１１と絶縁基板１２とが第１
の半田層１８により固着され、絶縁基板１２と放熱板１
３とが第２の半田層１４により固着されることにより、
ＩＧＢＴチップ１１と外部との電気的絶縁を保ちながら
高い放熱性を実現している。Incidentally, FIG. 8 shows an insulating substrate 12 for mounting elements and a heat dissipation plate 13 in a conventional IGBT module as a second component.
The peripheral portion A of the portion fixed by the solder layer 14 is shown in an enlarged manner. In the above structure, the insulating substrate 12 for mounting an element having high electric conductivity is provided between the IGBT chip 11 and the heat sink 13.
And the IGBT chip 11 and the insulating substrate 12 are the first
Fixed by the solder layer 18 of the insulating substrate 12 and the heat sink 1.
3 and 3 are fixed by the second solder layer 14,
High heat dissipation is realized while maintaining electrical insulation between the IGBT chip 11 and the outside.
【０００６】なお、前記半田は、例えばＰｂＳｎを混合
した金属合金であり、一般に、熱伝導が悪く、電気抵抗
も大きいので、放熱経路の熱抵抗を抑制するために前記
第２の半田層１４は厚さは１００μｍ前後（余裕を持た
せるために１５０μｍ以下）に構成されている。The solder is a metal alloy mixed with PbSn, for example, and generally has poor heat conduction and high electric resistance. Therefore, in order to suppress the heat resistance of the heat radiation path, the second solder layer 14 is formed. The thickness is around 100 μm (150 μm or less to allow a margin).
【０００７】ところで、電力用半導体素子１１は発生熱
が大きいので、半導体素子の使用状態における発生熱を
放散する放熱経路の熱抵抗の増加に起因して半導体素子
の不良（熱損失の増加、熱破壊など）が発生するおそれ
がある。By the way, since the power semiconductor element 11 generates a large amount of heat, the semiconductor element fails (increases in heat loss, heat (Destruction, etc.) may occur.
【０００８】即ち、上記したようにセラミック基板にＣ
ｕが張り合わされた素子搭載用絶縁基板１２とＣｕをベ
ースとする放熱板１３とが半田固着された構造は、絶縁
基板１２の熱膨脹係数（セラミック基板により支配され
る）と放熱板１３の熱膨脹係数との違いにより、温度サ
イクルにより膨脹・収縮が繰り返されるので、両者間の
半田（第２の半田層１４）に疲労が生じ、半田クラック
が発生し、半田の脆弱化が進行する。That is, as described above, C is formed on the ceramic substrate.
The structure in which the element mounting insulating substrate 12 to which u is bonded and the Cu-based heat dissipation plate 13 are solder-bonded to each other has a thermal expansion coefficient of the insulating substrate 12 (dominated by the ceramic substrate) and a thermal expansion coefficient of the heat dissipation plate 13. Since the expansion and contraction are repeated due to the temperature cycle, the solder (second solder layer 14) between the two becomes fatigued, a solder crack is generated, and the solder becomes fragile.
【０００９】これにより、放熱経路の熱抵抗が増加し、
半導体素子の発生熱を十分に放散することが不可能にな
り、最終的には、半導体素子に急速な温度上昇が生じ、
熱破壊が発生するおそれがある。As a result, the thermal resistance of the heat radiation path increases,
It becomes impossible to sufficiently dissipate the heat generated by the semiconductor element, and eventually the semiconductor element rapidly rises in temperature,
Thermal destruction may occur.
【００１０】[0010]
【発明が解決しようとする課題】上記したように素子搭
載用絶縁基板と放熱板とが半田固着された構造を有する
従来の半導体装置は、半導体素子の使用状態における発
生熱を放散する放熱経路の熱抵抗の増加に起因して半導
体装置の不良が発生するおそれがあるという問題があっ
た。As described above, the conventional semiconductor device having the structure in which the element mounting insulating substrate and the heat dissipation plate are fixed by soldering is provided with a heat dissipation path for dissipating heat generated in the use state of the semiconductor element. There is a problem that a semiconductor device may be defective due to an increase in thermal resistance.
【００１１】本発明は上記の問題点を解決すべくなされ
たもので、半導体素子搭載用絶縁基板と放熱板とを固着
する半田のクラック発生による脆弱化の進行を抑制で
き、信頼性の高い電力用半導体装置を実現し得る半導体
装置を提供することを目的とする。[0011] The present invention has been made to solve the above problems, it is possible to suppress the progress of the weakening due to solder cracking for fixing the semiconductor device mounting insulating substrate and the heat radiating plate, highly reliable An object of the present invention is to provide a semiconductor device capable of realizing a power semiconductor device.
【００１２】[0012]
【課題を解決するための手段】本発明の半導体装置は、
半導体素子と、表面に前記半導体素子が固着された絶縁
基材及び前記絶縁基材の裏面に形成され、外周が前記絶
縁基材の外周より小さくなるように形成された裏面メタ
ルを有する絶縁基板と、金属放熱板と、前記金属放熱板
の平坦面上に前記絶縁基板の裏面メタルが対接した状態
で両者を固着する半田層とを具備し、前記裏面メタルは
中央部よりも周辺部の方が薄くなるように段差が形成さ
れていることで前記裏面メタルと金属放熱板との固着部
における半田層の中央部よりも周辺部の方が厚くなるよ
うに形成されていることを特徴とする。さらに、本発明
の半導体装置は、半導体素子と、表面に前記半導体素子
が固着された絶縁基材及び前記絶縁基材の裏面に形成さ
れ、外周が前記絶縁基材の外周より小さくなるように形
成された裏面メタルを有する絶縁基板と、金属放熱板
と、前記金属放熱板の平坦面上に前記絶縁基板の裏面メ
タルが対接した状態で両者を固着する半田層とを具備
し、前記裏面メタルは中央部よりも周辺部に向かうほど
薄くなるようにテーパ面が形成されていることで前記裏
面メタルと金属放熱板との固着部における半田層の中央
部よりも周辺部の方が厚くなるように形成されているこ
とを特徴とする。The semiconductor device of the present invention comprises:
An insulating substrate having a semiconductor element and an insulating base material having the semiconductor element fixed to the front surface and a back surface metal formed on the back surface of the insulating base material so that the outer circumference is smaller than the outer circumference of the insulating base material; , A metal heat sink and said metal heat sink
And a solder layer for fixing the backside metal of the insulating substrate in contact with each other on the flat surface of the backside metal, and the backside metal is formed with a step so that the peripheral portion is thinner than the central portion. It is characterized in that the peripheral portion is thicker than the central portion of the solder layer in the fixing portion between the back metal and the metal heat dissipation plate . Further, the semiconductor device of the present invention is formed on a semiconductor element, an insulating base material having the semiconductor element fixed to the front surface and a back surface of the insulating base material, and formed so that the outer circumference is smaller than the outer circumference of the insulating base material. An insulating substrate having a backside metal formed thereon, a metal radiator plate, and a solder layer for fixing the backside metal of the insulating substrate to the flat surface of the metal radiator plate in a state of being in contact with each other. Is formed such that the taper surface becomes thinner toward the peripheral portion than at the central portion, so that the peripheral portion becomes thicker than the central portion of the solder layer at the fixing portion between the back surface metal and the metal heat dissipation plate. It is characterized in that it is formed in.
【００１３】[0013]
【発明の実施の形態】以下、図面を参照して本発明の実
施の形態を詳細に説明する。図１は、本発明の半導体装
置の第１の実施の形態に係る電力用半導体装置としてＩ
ＧＢＴモジュールの断面構造の一例を示している。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows an electric power semiconductor device according to a first embodiment of a semiconductor device of the present invention.
The example of the cross-section of a GBT module is shown.
【００１４】図１に示すＩＧＢＴモジュールは、電力用
半導体素子であるＩＧＢＴチップ１１と例えばＣｕをベ
ースとする金属放熱板１３との間に絶縁基材１５の両面
がメタライズされた電気伝導度の高い絶縁基板１２が介
在し、電力用半導体素子１１と絶縁基板１２とが第１の
半田層１８により固着され、絶縁基板１２と金属放熱板
１３とが第２の半田層１４により固着されている。In the IGBT module shown in FIG. 1, both sides of an insulating base material 15 are metalized between an IGBT chip 11 which is a power semiconductor element and a metal heat radiating plate 13 which is made of Cu, for example, and has high electrical conductivity. With the insulating substrate 12 interposed, the power semiconductor element 11 and the insulating substrate 12 are fixed to each other by the first solder layer 18, and the insulating substrate 12 and the metal heat dissipation plate 13 are fixed to each other by the second solder layer 14.
【００１５】なお、前記素子搭載用の絶縁基板１２は、
例えばセラミックスのような絶縁基材１５の素子実装面
上に例えばＣｕなどのメタルパターン１６が形成されて
おり、上記絶縁基材１５の裏面に例えばＣｕなどのメタ
ル１７が形成されている。The insulating substrate 12 for mounting the element is
For example, a metal pattern 16 such as Cu is formed on the element mounting surface of the insulating base material 15 such as ceramics, and a metal 17 such as Cu is formed on the back surface of the insulating base material 15.
【００１６】そして、上記絶縁基板１２のメタルパター
ン１６の素子搭載部上に前記半導体素子が搭載された状
態で両者が第１の半田層１８により固着されており、上
記金属放熱板１３上に前記絶縁基板１２の裏面のメタル
１８が対接した状態で両者が第２の半田層１４により固
着されている。また、前記絶縁基板１２のメタルパター
ン１６の配線部と前記半導体素子１１のパッド部とはボ
ンディングワイヤーにより接続されている。Then, the semiconductor element is mounted on the element mounting portion of the metal pattern 16 of the insulating substrate 12 and both are fixed by a first solder layer 18, and the semiconductor element is mounted on the metal heat dissipation plate 13. The metal 18 on the back surface of the insulating substrate 12 is in contact with the two, and both are fixed by the second solder layer 14. Further, the wiring portion of the metal pattern 16 of the insulating substrate 12 and the pad portion of the semiconductor element 11 are connected by a bonding wire.
【００１７】さらに、本発明においては、前記第２の半
田層１４は、前記絶縁基板１２と放熱板１３との固着部
における中央部よりも周辺部（全周）の方が厚くなるよ
うに形成されている。Further, in the present invention, the second solder layer 14 is formed such that the peripheral portion (entire circumference) is thicker than the central portion in the fixing portion between the insulating substrate 12 and the heat dissipation plate 13. Has been done.
【００１８】図２は、図１中の第２の半田層１４の固着
部分の構造の一例について一部Ａを取り出して拡大して
示す断面図である。図２は、図１中の前記絶縁基板１２
の裏面メタル１７ａに、中央部よりも周辺部の方が薄く
なるように段差が形成されることによって、第２の半田
層１４の固着部分における中央部よりも周辺部の方が厚
くなっている構造を示している。FIG. 2 is a sectional view showing a part A of the structure of the fixed portion of the second solder layer 14 in FIG. 1 in an enlarged manner. 2 shows the insulating substrate 12 shown in FIG.
Since the step is formed on the back surface metal 17a so that the peripheral portion is thinner than the central portion, the peripheral portion is thicker than the central portion in the fixing portion of the second solder layer 14. The structure is shown.
【００１９】この場合、前記固着部分における中央部
は、放熱性の点では薄いほどよいが、絶縁基板と放熱板
との熱膨脹係数の違いに起因する応力を緩和する作用の
点では厚い方がよく、現状では１００μｍ前後に設定さ
れる。In this case, the central portion of the fixed portion is preferably thin in terms of heat dissipation, but thicker is preferable in terms of the action of relieving stress caused by the difference in thermal expansion coefficient between the insulating substrate and the heat dissipation plate. Currently, it is set to around 100 μm.
【００２０】そして、前記固着部分における周辺部は、
中央部の厚さの１．５倍以上に設定される。ここで、絶
縁基板と放熱板とを固着している半田のクラック発生に
よる脆弱化は、接合周辺部から進行することに着目する
（例えば、wuchen Wu, Marcel Held, wt al.'Thermal S
tress Related Packaging Failure in Power IGBT Modu
les'の報告参照）。The peripheral portion of the fixed portion is
It is set to be 1.5 times or more the thickness of the central portion. Here, pay attention to the fact that the fragility of the solder that fixes the insulating substrate and the heat dissipation plate due to cracking progresses from the periphery of the joint (for example, wuchen Wu, Marcel Held, wt al.'Thermal S
tress Related Packaging Failure in Power IGBT Modu
See les' report).
【００２１】図３（ａ）および（ｂ）は、絶縁基板１２
・放熱板１３間の半田接合領域の温度サイクル試験前後
における状態の一例を概略的に示している。温度サイク
ル試験後には、半田接合周辺部に半田の脆弱化が進行し
た領域がみられ、接合周辺部から半田の脆弱化が進行し
ていることが分かる。3A and 3B show the insulating substrate 12
-A schematic example of the state before and after the temperature cycle test of the solder joint area between the heat sinks 13 is shown. After the temperature cycle test, it is understood that the realm of solder weakening proceeded to solder joint periphery Mirare, solder embrittlement from joining the peripheral portion is in progress.
【００２２】しかし、前記半田接合領域の厚さをある範
囲まで（１．５倍以上）厚くすることにより、半田のク
ラック発生、脆弱化を抑制できることが実験により判明
している。However, it has been proved by experiments that by increasing the thickness of the solder joint region to a certain range (1.5 times or more), it is possible to suppress cracking and weakening of the solder.
【００２３】よって、本発明の半導体装置では、熱膨脹
係数が互いに異なる絶縁基板１２と金属放熱板１３とを
固着している第２の半田層１４の固着部分における中央
部よりもクラックが発生し易い周辺部の方がある範囲ま
で厚くなっている構造を有するので、温度サイクルによ
る第２の半田層１４の固着部分の周辺部におけるクラッ
ク発生、脆弱化を抑制できる。Therefore, in the semiconductor device of the present invention, cracks are more likely to occur than in the central portion of the fixing portion of the second solder layer 14 fixing the insulating substrate 12 and the metal heat dissipation plate 13 having different thermal expansion coefficients. Since the peripheral portion has a structure in which the peripheral portion is thickened to a certain extent, it is possible to suppress cracking and weakening in the peripheral portion of the fixed portion of the second solder layer 14 due to the temperature cycle.
【００２４】この場合、第２の半田層１４の固着部分の
中央部（半導体チップの直下付近）の厚さは従来の半導
体装置と変わらないので、従来の半導体装置と比べて熱
抵抗の増加は殆んど生じない。In this case, since the thickness of the central portion of the fixed portion of the second solder layer 14 (in the vicinity of directly below the semiconductor chip) is the same as that of the conventional semiconductor device, the thermal resistance is not increased as compared with the conventional semiconductor device. It hardly happens.
【００２５】従って、本発明の半導体装置は、大きな熱
サイクルの発生する厳しい環境下で使用しても、半田の
脆弱化が進行しにくく、放熱経路の悪化によ半導体素子
の不良を抑制でき、信頼性の高い電力用半導体装置を実
現できる。Therefore, even if the semiconductor device of the present invention is used in a severe environment in which a large thermal cycle occurs, the brittleness of the solder is unlikely to progress, and the semiconductor element failure can be suppressed due to the deterioration of the heat dissipation path. It is possible to realize a highly reliable power semiconductor device.
【００２６】図４は、上記したような図２の構造を有す
る半導体デバイスと前記したような図８の構造を有する
従来例の半導体デバイスとについて温度サイクル試験を
行った後における絶縁基板・放熱板間の半田接合領域の
接合率の変化を測定した結果を示している。FIG. 4 shows an insulating substrate / heat sink after a temperature cycle test is performed on the semiconductor device having the structure shown in FIG. 2 and the conventional semiconductor device having the structure shown in FIG. The result of having measured the change of the joining rate of the solder joining area between is shown.
【００２７】図５乃至図８は、それぞれ図２中の第２の
半田層１４の固着部分の構造の他の例を示す断面図であ
る。図５は、前記絶縁基板１２の裏面メタル１７ｂに、
中央部よりも周辺部に向かうほど薄くなるようにテーパ
面が形成されることによって、第２の半田層１４の固着
部分における中央部よりも周辺部の方が厚くなっている
（周辺部の最大厚さが中央部の厚さの１．５倍以上）構
造を示している。5 to 8 are sectional views showing other examples of the structure of the fixing portion of the second solder layer 14 in FIG. 2, respectively. FIG. 5 shows the back surface metal 17b of the insulating substrate 12,
By forming the tapered surface so as to become thinner toward the peripheral portion than in the central portion, the peripheral portion is thicker than the central portion in the fixing portion of the second solder layer 14 (maximum of the peripheral portion). The thickness is 1.5 times or more the thickness of the central portion).
【００２８】図５の構造でも、前述した図２の構造とほ
ぼ同様の作用・効果が得られる。図６は、前記金属放熱
板１３ａの表面側に中央部よりも周辺部の方が薄くなる
ように段差が形成されることによって、第２の半田層１
４の固着部分における中央部よりも周辺部の方が厚くな
っている（周辺部の厚さが中央部の厚さの１．５倍以
上）構造を示している。The structure shown in FIG. 5 can also obtain substantially the same actions and effects as the structure shown in FIG. In FIG. 6, the second solder layer 1 is formed by forming a step on the surface side of the metal heat dissipation plate 13a so that the peripheral portion is thinner than the central portion.
4 shows a structure in which the peripheral portion of the fixed portion 4 is thicker than the central portion (the thickness of the peripheral portion is 1.5 times or more the thickness of the central portion).
【００２９】図７は、前記金属放熱板１３ｂの表面側に
中央部よりも周辺部に向かうほど薄くなるようにテーパ
面が形成されることによって、第２の半田層１４の固着
部分における中央部よりも周辺部の方が厚くなっている
（周辺部の最大厚さが中央部の厚さの１．５倍以上）構
造を示している。In FIG. 7, a taper surface is formed on the surface side of the metal heat dissipation plate 13b so that the taper surface becomes thinner toward the peripheral portion than at the central portion, so that the central portion in the fixed portion of the second solder layer 14 is formed. A structure in which the peripheral portion is thicker than that (the maximum thickness of the peripheral portion is 1.5 times or more the thickness of the central portion) is shown.
【００３０】図６および図７の構造でも、前述した図２
の構造とほぼ同様の作用・効果が得られる。なお、本発
明の半導体装置では、第２の半田層１４の固着部分にお
ける中央部よりも周辺部の方が厚くなっている構造を有
すればよく、前記絶縁基板１２の裏面の形状、前記金属
放熱板１３の表面側の形状は、前記各例に限定されるも
のではない。In the structure of FIGS. 6 and 7, the structure shown in FIG.
The same action and effect as the structure of can be obtained. The semiconductor device of the present invention may have a structure in which the peripheral portion of the fixed portion of the second solder layer 14 is thicker than the central portion, and the shape of the back surface of the insulating substrate 12 and the metal The shape of the heat dissipation plate 13 on the front surface side is not limited to the above examples.
【００３１】[0031]
【発明の効果】上述したように本発明の半導体装置によ
れば、半導体素子搭載用絶縁基板と放熱板とを固着する
半田のクラック発生による脆弱化の進行を抑制でき、信
頼性の高い電力用半導体装置を実現し得る半導体装置を
提供することができる。According to the semiconductor device of the present invention as described above according to the present invention, it is possible to suppress the progress of weakening due to solder cracking for fixing the semiconductor device mounting insulating substrate and the heat radiating plate, Shin <br/> Lai It is possible to provide a semiconductor device which can realize a highly-stable power semiconductor device.
【図１】本発明の半導体装置の第１の実施の形態に係る
ＩＧＢＴモジュールの断面構造の一例を概略的に示す断
面図。FIG. 1 is a sectional view schematically showing an example of a sectional structure of an IGBT module according to a first embodiment of a semiconductor device of the present invention.
【図２】図１中の第２の半田層の固着部分の構造の一例
について一部を取り出して拡大して示す断面図。FIG. 2 is a cross-sectional view showing an enlarged part of an example of a structure of a fixed portion of a second solder layer in FIG.
【図３】図１中の絶縁基板・放熱板間の第２の半田層の
温度サイクル試験前後における状態の一例を示す図。FIG. 3 is a diagram showing an example of a state before and after a temperature cycle test of a second solder layer between the insulating substrate and the heat sink in FIG.
【図４】図２の構造を有する半導体デバイスと前記した
ような図８の構造を有する従来例の半導体デバイスとに
ついて温度サイクル試験を行った後における絶縁基板・
放熱板間の半田接合領域の接合率の変化を測定した結果
を示す特性図。4 is an insulating substrate after a temperature cycle test is performed on the semiconductor device having the structure of FIG. 2 and the conventional semiconductor device having the structure of FIG. 8 as described above.
FIG. 6 is a characteristic diagram showing the results of measuring changes in the bonding rate of the solder bonding area between the heat sinks.
【図５】図２中の第２の半田層の固着部分の構造の他の
例を示す断面図。5 is a cross-sectional view showing another example of the structure of the fixed portion of the second solder layer in FIG.
【図６】図２中の第２の半田層の固着部分の構造のさら
に他の例を示す断面図。FIG. 6 is a cross-sectional view showing still another example of the structure of the fixed portion of the second solder layer in FIG.
【図７】図２中の第２の半田層の固着部分の構造のさら
に他の例を示す断面図。FIG. 7 is a sectional view showing still another example of the structure of the fixed portion of the second solder layer in FIG.
【図８】従来のＩＧＢＴモジュールにおける素子搭載用
絶縁基板と放熱板とを第２の半田層で固着した様子を拡
大して示す断面図。FIG. 8 is an enlarged cross-sectional view showing a state in which an element mounting insulating substrate and a heat dissipation plate are fixed to each other by a second solder layer in a conventional IGBT module.
１１…電力用半導体素子（チップ）、 １２…素子搭載用絶縁基板、 １３、１３ａ、１３ｂ…金属放熱板、 １４…第２の半田層、 １５…絶縁基材、 １６…メタルパターン、 １７、１７ａ、１７ｂ…メタル、 １８…第１の半田層。 11 ... Power semiconductor element (chip), 12 ... Insulation substrate for mounting elements, 13, 13a, 13b ... Metal heat sink, 14 ... the second solder layer, 15 ... Insulating base material, 16 ... Metal pattern, 17, 17a, 17b ... Metal, 18 ... First solder layer.
Claims (3)
縁基材の裏面に形成され、外周が前記絶縁基材の外周よ
り小さくなるように形成された裏面メタルを有する絶縁
基板と、 金属放熱板と、 前記金属放熱板の平坦面上に前記絶縁基板の裏面メタル
が対接した状態で両者を固着する半田層とを具備し、 前記裏面メタルは中央部よりも周辺部の方が薄くなるよ
うに段差が形成されていることで前記裏面メタルと金属
放熱板との固着部における半田層の中央部よりも周辺部
の方が厚くなるように形成されていることを特徴とする
半導体装置。1. A semiconductor element, an insulating base material having the semiconductor element fixed to the front surface, and a back surface metal formed on the back surface of the insulating base material so that the outer circumference is smaller than the outer circumference of the insulating base material. An insulating substrate having a metal heat radiating plate, and a solder layer for fixing the metal radiating plate and the back surface metal of the insulating substrate in contact with each other on the flat surface of the metal heat radiating plate. the backside metal and metal by being also stepped so it is thinner in the peripheral portion is formed
A semiconductor device, wherein the peripheral portion of the solder layer at the portion fixed to the heat sink is thicker than the central portion.
縁基材の裏面に形成され、外周が前記絶縁基材の外周よ
り小さくなるように形成された裏面メタルを有する絶縁
基板と、 金属放熱板と、 前記金属放熱板の平坦面上に前記絶縁基板の裏面メタル
が対接した状態で両者を固着する半田層とを具備し、 前記裏面メタルは中央部よりも周辺部に向かうほど薄く
なるようにテーパ面が形成されていることで前記裏面メ
タルと金属放熱板との固着部における半田層の中央部よ
りも周辺部の方が厚くなるように形成されていることを
特徴とする半導体装置。2. A semiconductor element, an insulating base material having the semiconductor element fixed to the front surface, and a back surface metal formed on the back surface of the insulating base material so that the outer circumference is smaller than the outer circumference of the insulating base material. An insulating substrate having a metal heat radiating plate, and a solder layer for fixing the metal radiating plate and the back surface metal of the insulating substrate in contact with each other on the flat surface of the metal heat radiating plate. Also, since the tapered surface is formed so as to become thinner toward the peripheral portion, the peripheral portion is formed to be thicker than the central portion of the solder layer in the fixing portion between the back metal and the metal heat dissipation plate. A semiconductor device characterized in that
の最大厚さは中央部の厚さの１．５倍以上であることを
特徴とする請求項１または２記載の半導体装置。3. The semiconductor device according to claim 1, wherein the maximum thickness of the peripheral portion of the solder layer in the fixing portion is 1.5 times or more the thickness of the central portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14930696A JP3522975B2 (en) | 1996-06-11 | 1996-06-11 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14930696A JP3522975B2 (en) | 1996-06-11 | 1996-06-11 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09331150A JPH09331150A (en) | 1997-12-22 |
| JP3522975B2 true JP3522975B2 (en) | 2004-04-26 |
Family
ID=15472260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14930696A Expired - Fee Related JP3522975B2 (en) | 1996-06-11 | 1996-06-11 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3522975B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4816501B2 (en) * | 2007-02-26 | 2011-11-16 | 株式会社日立製作所 | Power semiconductor module and inverter |
| JP5659935B2 (en) * | 2011-04-14 | 2015-01-28 | 三菱電機株式会社 | Semiconductor device |
| JP5602095B2 (en) | 2011-06-09 | 2014-10-08 | 三菱電機株式会社 | Semiconductor device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60101743U (en) * | 1983-12-16 | 1985-07-11 | 株式会社東芝 | semiconductor equipment |
| JPH0562048U (en) * | 1992-01-24 | 1993-08-13 | 日本電子機器株式会社 | Power element fixing structure |
| JPH088373A (en) * | 1994-06-23 | 1996-01-12 | Toshiba Corp | Heat sink |
| JPH0870071A (en) * | 1994-08-29 | 1996-03-12 | Toshiba Corp | Radiator |
-
1996
- 1996-06-11 JP JP14930696A patent/JP3522975B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09331150A (en) | 1997-12-22 |
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