JPH1041843A - Electric field detecting circuit - Google Patents
Electric field detecting circuitInfo
- Publication number
- JPH1041843A JPH1041843A JP19304696A JP19304696A JPH1041843A JP H1041843 A JPH1041843 A JP H1041843A JP 19304696 A JP19304696 A JP 19304696A JP 19304696 A JP19304696 A JP 19304696A JP H1041843 A JPH1041843 A JP H1041843A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- electric field
- control signal
- circuit
- intermediate frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Superheterodyne Receivers (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、受信機の入力電界
を検出する電界検出回路に関する。The present invention relates to an electric field detection circuit for detecting an input electric field of a receiver.
【０００２】[0002]
【従来の技術】特開昭６２−２３６２９号公報に記述さ
れている従来の電界検出回路を備えた受信機は、図３に
示すように、ピンダイオードを用いた可変抵抗減衰器２
２と、前置高周波低雑音増幅器２３と、周波数変換器２
４と、局部発振器２５と、前置中間周波増幅器２６と、
中間周波数帯域ろ波器２７と、主中間周波数増幅器２８
と、復調器２９と、ＡＧＣ電圧検出回路３０と、可変抵
抗減衰器２２を制御する制御回路３１とを有している。2. Description of the Related Art A receiver provided with a conventional electric field detecting circuit described in Japanese Patent Application Laid-Open No. 62-23629 is a variable resistance attenuator 2 using a pin diode as shown in FIG.
2, a high frequency low noise amplifier 23, and a frequency converter 2
4, a local oscillator 25, a pre-intermediate frequency amplifier 26,
An intermediate frequency bandpass filter 27 and a main intermediate frequency amplifier 28
, A demodulator 29, an AGC voltage detection circuit 30, and a control circuit 31 for controlling the variable resistance attenuator 22.
【０００３】受信機入力端子３２に入力された受信入力
電界は、可変抵抗減衰器２２、前置高周波低雑音増幅器
２３を経て周波数変換器２４により中間周波数に変換さ
れ、前置中間周波増幅器２６により増幅される。更に、
前置中間周波増悪機２６により増幅された信号は中間周
波帯域ろ波器２７を経て主中間周波増幅器２８に入力さ
れ、この主中間周波増幅器２８のＡＧＣ機能で一定レベ
ルの信号になり、復調器２９で復調され受信機出力端子
３３から出力される。A received input electric field inputted to a receiver input terminal 32 is converted into an intermediate frequency by a frequency converter 24 through a variable resistance attenuator 22 and a high-frequency low-noise amplifier 23, and is converted to an intermediate frequency by a front intermediate-frequency amplifier 26. Amplified. Furthermore,
The signal amplified by the pre-intermediate frequency amplifying device 26 is input to a main intermediate frequency amplifier 28 through an intermediate frequency band filter 27, and is converted into a signal of a constant level by the AGC function of the main intermediate frequency amplifier 28. The signal is demodulated at 29 and output from the receiver output terminal 33.
【０００４】受信機入力端子３２に入力された受信入力
電界の変化は、主中間周波増幅器２８のもつＡＧＣ機能
の動作範囲内で一定レベルに保たれ、ＡＧＣ電圧検出回
路３０により受信入力電界の変化に応じたＡＧＣ電圧信
号３４を取り出すことができる。The change of the received input electric field input to the receiver input terminal 32 is maintained at a constant level within the operating range of the AGC function of the main intermediate frequency amplifier 28, and the AGC voltage detection circuit 30 changes the received input electric field. AGC voltage signal 34 corresponding to the above can be taken out.
【０００５】制御回路３１は、ＡＧＣ電圧信号３４のレ
ベルによって可変抵抗減衰器２２を構成しているピンダ
イオードに入力するバイアス電流３５を供給している。[0005] The control circuit 31 supplies a bias current 35 to be input to a pin diode constituting the variable resistance attenuator 22 according to the level of the AGC voltage signal 34.
【０００６】従って、受信入力電界の変化によって、Ａ
ＧＣ電圧信号３４及びバイアス電流３５が変化し、この
バイアス電流３５によって可変抵抗減衰器２２の減衰量
が変化するため、最大可変減衰量まで受信機の特性を劣
化することなく電界検出を行うことができる。Therefore, the change in the received input electric field causes the A
Since the GC voltage signal 34 and the bias current 35 change, and the amount of attenuation of the variable resistance attenuator 22 changes due to the bias current 35, the electric field can be detected without deteriorating the characteristics of the receiver up to the maximum variable attenuation. it can.
【０００７】[0007]
【発明が解決しようとする課題】第一の問題点は、図３
の従来の回路において、可変抵抗減衰器２２を高周波増
幅器の前に置くと、可変抵抗減衰器２２の減衰量が増加
するに従い感度が悪くなるということである。The first problem is that FIG.
In the prior art circuit, if the variable resistance attenuator 22 is placed in front of the high frequency amplifier, the sensitivity becomes worse as the attenuation of the variable resistance attenuator 22 increases.
【０００８】その理由は、減衰量の分だけ受信機全体の
ＮＦ（雑音指数）が悪化するからである。[0008] The reason is that the NF (noise figure) of the entire receiver deteriorates by the amount of attenuation.
【０００９】第二の問題点は、図３の従来の回路におい
て、可変抵抗減衰器としてピンダイオードを用いたもの
に限定していることである。A second problem is that the conventional circuit shown in FIG. 3 is limited to a circuit using a pin diode as a variable resistance attenuator.
【００１０】本発明の課題は、上述の問題点を解決し、
アンテナより電界強度の高い高周波受信信号が入力して
も、中間周波数増幅器が飽和することなく正確な電界が
検出できる電界検出回路を提供することにある。An object of the present invention is to solve the above-mentioned problems,
An object of the present invention is to provide an electric field detection circuit capable of detecting an accurate electric field without saturating an intermediate frequency amplifier even when a high-frequency reception signal having a higher electric field strength than an antenna is input.
【００１１】本発明の別の課題は、上述の問題点を解決
し、アンテナより電界強度の高い高周波受信信号が入力
しても、中間周波数増幅器が飽和することなく正確な電
界が検出できる電界検出回路を有する受信機を提供する
ことにある。Another object of the present invention is to solve the above-mentioned problems, and to detect an electric field without saturating an intermediate frequency amplifier even when a high-frequency received signal having a higher electric field strength is input from an antenna. An object of the present invention is to provide a receiver having a circuit.
【００１２】[0012]
【課題を解決するための手段】本発明によれば、アンテ
ナより入力される高周波受信信号を増幅する高周波増幅
部と、前記高周波増幅部の出力を第１の中間周波数信号
に変換するミキサ回路と、前記第１の中間周波数信号を
入力とし、減衰量の増加分を表す第１の制御信号を受け
ている時、前記減衰量の増加分だけ通過減衰量を増加さ
せる可変アッテネータと、前記可変アッテネータの出力
を増幅し、第２の中間周波数信号を出力する中間周波数
増幅部と、前記第２の中間周波数信号を入力とし、前記
第２の中間周波数信号のレベルに対応したアナログ電圧
を出力するリミッタアンプ回路と、前記アナログ電圧を
デジタル電圧に変換するアナログ／デジタル変換器と、
前記デジタル電圧を入力とし、前記可変アッテネータが
前記第１の制御信号を受けていない時における前記デジ
タル電圧に対応した前記高周波受信信号の電界強度を表
す電界レベル信号を出力するテーブルと、前記デジタル
電圧を入力とし、前記デジタル電圧が所定のしきい値を
越えた時に、前記減衰量の増加分を表す前記第１の制御
信号を出力すると共に、この減衰量の増加分に比例した
レベルを持つ第２の制御信号を出力する制御回路と、前
記第２の制御信号と前記電界レベル信号との加算値を電
界検出信号として出力する回路とを備えたことを特徴と
する電界検出回路が得られる。According to the present invention, there is provided a high-frequency amplifier for amplifying a high-frequency reception signal input from an antenna, and a mixer circuit for converting an output of the high-frequency amplifier into a first intermediate frequency signal. A variable attenuator that receives the first intermediate frequency signal as an input, and receives a first control signal indicating an increase in attenuation, and increases a passing attenuation by the increase in attenuation; and a variable attenuator. An intermediate frequency amplifying unit that amplifies the output of the second intermediate frequency signal and outputs a second intermediate frequency signal; and a limiter that receives the second intermediate frequency signal as an input and outputs an analog voltage corresponding to the level of the second intermediate frequency signal An amplifier circuit; an analog / digital converter for converting the analog voltage to a digital voltage;
A table for receiving the digital voltage as an input and outputting an electric field level signal representing an electric field intensity of the high-frequency reception signal corresponding to the digital voltage when the variable attenuator is not receiving the first control signal; And when the digital voltage exceeds a predetermined threshold, outputs the first control signal indicating the increase in the attenuation, and outputs a first control signal having a level proportional to the increase in the attenuation. An electric field detection circuit comprising: a control circuit that outputs a second control signal; and a circuit that outputs a sum of the second control signal and the electric field level signal as an electric field detection signal.
【００１３】更に本発明によれば、前記制御回路は、前
記デジタル電圧が所定のしきい値以下である時には、前
記第１の制御信号及び前記第２の制御信号を出力しない
ことを特徴とする電界検出回路が得られる。Further, according to the present invention, the control circuit does not output the first control signal and the second control signal when the digital voltage is lower than a predetermined threshold. An electric field detection circuit is obtained.
【００１４】また本発明によれば、アンテナより入力さ
れる高周波受信信号を増幅する高周波増幅部と、前記高
周波増幅部の出力を第１の中間周波数信号に変換するミ
キサ回路と、前記第１の中間周波数信号を入力とし、減
衰量の増加分を表す第１の制御信号を受けている時、前
記減衰量の増加分だけ通過減衰量を増加させる可変アッ
テネータと、前記可変アッテネータの出力を増幅し、第
２の中間周波数信号を出力する中間周波数増幅部と、前
記第２の中間周波数信号を入力とし、前記第２の中間周
波数信号のレベルに対応したアナログ電圧を出力するリ
ミッタアンプ回路と、前記アナログ電圧をデジタル電圧
に変換するアナログ／デジタル変換器と、前記デジタル
電圧を入力とし、前記可変アッテネータが前記第１の制
御信号を受けていない時における前記デジタル電圧に対
応した前記高周波受信信号の電界強度を表す電界レベル
信号を出力するテーブルと、前記デジタル電圧を入力と
し、前記デジタル電圧が所定のしきい値を越えた時に、
前記減衰量の増加分を表す前記第１の制御信号を出力す
ると共に、この減衰量の増加分に比例したレベルを持つ
第２の制御信号を出力する制御回路と、前記第２の制御
信号と前記電界レベル信号との加算値を電界検出信号と
して出力する回路とを備えた電界検出回路を有すること
を特徴とする受信機が得られる。According to the invention, a high-frequency amplifier for amplifying a high-frequency reception signal input from an antenna, a mixer circuit for converting an output of the high-frequency amplifier to a first intermediate frequency signal, When an intermediate frequency signal is input and a first control signal indicating an increase in the attenuation is received, a variable attenuator for increasing the passage attenuation by the increase in the attenuation, and an output of the variable attenuator are amplified. An intermediate frequency amplifying unit that outputs a second intermediate frequency signal, a limiter amplifier circuit that receives the second intermediate frequency signal as input, and outputs an analog voltage corresponding to a level of the second intermediate frequency signal; An analog / digital converter for converting an analog voltage to a digital voltage; and the digital attenuator, wherein the variable attenuator receives the first control signal. A table for outputting an electric field level signal representative of the electric field intensity of the high frequency received signal corresponding to the digital voltage when had, the digital voltage as an input, when the digital voltage exceeds a predetermined threshold,
A control circuit that outputs the first control signal indicating the increase in the attenuation and outputs a second control signal having a level proportional to the increase in the attenuation; And a circuit that outputs a value added to the electric field level signal as an electric field detection signal.
【００１５】更に本発明によれば、前記制御回路は、前
記デジタル電圧が所定のしきい値以下である時には、前
記第１の制御信号及び前記第２の制御信号を出力しない
ことを特徴とする受信機が得られる。Further, according to the present invention, the control circuit does not output the first control signal and the second control signal when the digital voltage is equal to or lower than a predetermined threshold. A receiver is obtained.
【００１６】[0016]
【発明の実施の形態】次に本発明の実施例について図面
を参照して説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings.
【００１７】図１を参照すると、本発明の一実施例によ
る電界検出回路を備えた受信機が示されている。Referring to FIG. 1, there is shown a receiver having an electric field detection circuit according to one embodiment of the present invention.
【００１８】この電界検出回路は、アンテナ１より入力
される高周波受信信号を増幅する高周波増幅部２を有す
る。ミキサ回路３は、高周波増幅部２の出力を第１の中
間周波数信号１２に変換する。This electric field detection circuit has a high-frequency amplifier 2 for amplifying a high-frequency reception signal input from an antenna 1. The mixer circuit 3 converts the output of the high-frequency amplifier 2 into a first intermediate frequency signal 12.
【００１９】可変アッテネータ４は、第１の中間周波数
信号１２を入力とし、減衰量の増加分を表す第１の制御
信号１１を受けている時、前記減衰量の増加分だけ通過
減衰量を増加させる。中間周波数増幅部５は、可変アッ
テネータ４の出力を増幅し、第２の中間周波数信号１３
を出力する。When the variable attenuator 4 receives the first intermediate frequency signal 12 as an input and receives the first control signal 11 indicating the increase in the attenuation, the variable attenuator 4 increases the passing attenuation by the increase in the attenuation. Let it. The intermediate frequency amplifying unit 5 amplifies the output of the variable attenuator 4 and outputs the second intermediate frequency signal 13
Is output.
【００２０】リミッタアンプ回路６は、第２の中間周波
数信号１３を入力とし、第２の中間周波数信号１３のレ
ベルに対応したアナログ電圧１４を出力する。アナログ
／デジタル変換器７は、アナログ電圧１４をデジタル電
圧１５に変換する。The limiter amplifier circuit 6 receives the second intermediate frequency signal 13 as an input, and outputs an analog voltage 14 corresponding to the level of the second intermediate frequency signal 13. The analog / digital converter 7 converts the analog voltage 14 into a digital voltage 15.
【００２１】テーブル９は、デジタル電圧１５を入力と
し、可変アッテネータ４が第１の制御信号１１を受けて
いない時におけるデジタル電圧１５に対応した前記高周
波受信信号の電界強度を表す電界レベル信号１７を出力
する。The table 9 receives a digital voltage 15 as an input, and generates an electric field level signal 17 representing the electric field strength of the high frequency reception signal corresponding to the digital voltage 15 when the variable attenuator 4 does not receive the first control signal 11. Output.
【００２２】制御回路８は、デジタル電圧１５を入力と
し、デジタル電圧１５が所定のしきい値を越えた時に、
前記減衰量の増加分を表す前記第１の制御信号１１を出
力すると共に、この減衰量の増加分に比例したレベルを
持つ第２の制御信号１６を出力する。制御回路８は、デ
ジタル電圧１５が所定のしきい値以下である時には、第
１の制御信号１１及び第２の制御信号１６を出力しな
い。The control circuit 8 receives the digital voltage 15 as an input, and when the digital voltage 15 exceeds a predetermined threshold,
The controller outputs the first control signal indicating the increase in the attenuation and outputs the second control signal having a level proportional to the increase in the attenuation. The control circuit 8 does not output the first control signal 11 and the second control signal 16 when the digital voltage 15 is equal to or lower than a predetermined threshold.
【００２３】加減算回路１０は、制御回路８の出力であ
る第２の制御信号１６と電界レベル信号１７とを加え合
わせ、加算値を電界検出信号として出力する。The addition / subtraction circuit 10 adds the second control signal 16 output from the control circuit 8 and the electric field level signal 17, and outputs an addition value as an electric field detection signal.
【００２４】上述した構造で、電界検出回路は、電界強
度の高い高周波受信信号が入力したとき、受信機のダイ
ナミックレンジが不足している場合でも正確な電界検出
が可能となる。With the above-described structure, the electric field detection circuit can accurately detect an electric field even when the dynamic range of the receiver is insufficient when a high-frequency reception signal having a high electric field intensity is input.
【００２５】次に図２を参照して、図１の受信機の電界
検出回路の詳細を説明する。Next, the details of the electric field detection circuit of the receiver shown in FIG. 1 will be described with reference to FIG.
【００２６】アンテナ１より入力される高周波受信信号
は、高周波増幅回路１８で増幅され受信帯域外の不要な
成分を高周波フィルタ１９でろ波し、ミキサ回路３で第
１の中間周波数信号１２に変換される。The high-frequency reception signal input from the antenna 1 is amplified by the high-frequency amplification circuit 18, and an unnecessary component outside the reception band is filtered by the high-frequency filter 19, and converted into the first intermediate frequency signal 12 by the mixer circuit 3. You.
【００２７】第１の中間周波数信号１２は、可変アッテ
ネータ４を通って中間周波数増幅回路２０で増幅され、
ミキサ回路３によって生じた不要な成分を中間周波数フ
ィルタ２１でろ波し、第２の中間周波数信号１３として
出力される。第２の中間周波数信号１３はリミッタアン
プ回路６に入力され、第２の中間周波数信号１３のレベ
ルに対応したアナログ電圧１４を出力する。アナログ電
圧１４はアナログ／デジタル変換器７によってデジタル
電圧１５に変換される。The first intermediate frequency signal 12 passes through the variable attenuator 4 and is amplified by the intermediate frequency amplifier circuit 20.
Unwanted components generated by the mixer circuit 3 are filtered by an intermediate frequency filter 21 and output as a second intermediate frequency signal 13. The second intermediate frequency signal 13 is input to the limiter amplifier circuit 6, and outputs an analog voltage 14 corresponding to the level of the second intermediate frequency signal 13. The analog voltage 14 is converted into a digital voltage 15 by the analog / digital converter 7.
【００２８】アンテナ１より入力される高周波受信信号
の電界強度と中間周波数増幅回路２０の飽和レベルとを
考慮して制御回路８にデジタル電圧１５のしきい値を設
けておく。A threshold value of the digital voltage 15 is provided in the control circuit 8 in consideration of the electric field strength of the high frequency reception signal input from the antenna 1 and the saturation level of the intermediate frequency amplification circuit 20.
【００２９】アンテナ１より入力される高周波受信信号
の電界強度が弱い場合、デジタル電圧１５がしきい値よ
り低いため、制御回路８は、可変アッテネータ４の減衰
量を増加させる第１の制御信号１１及び減衰量の増加分
に比例した第２の制御信号１６を送出しない。このと
き、テーブル９の出力であるデジタル電圧１５に対応し
た電界レベル信号１７が加減算回路１０を経て電界検出
が行われる。When the electric field strength of the high-frequency reception signal input from the antenna 1 is weak, the digital voltage 15 is lower than the threshold value, so that the control circuit 8 controls the first control signal 11 for increasing the attenuation of the variable attenuator 4. And does not send out the second control signal 16 proportional to the increase in the attenuation. At this time, the electric field level signal 17 corresponding to the digital voltage 15 output from the table 9 passes through the addition / subtraction circuit 10 to detect the electric field.
【００３０】アンテナ１より入力される高周波受信信号
の電界強度が強くなると、デジタル電圧１５がしきい値
を越え、制御回路８から可変アッテネータ４の減衰量を
増加する制御信号１１が送られる。第１の中間周波数信
号１２は、可変アッテネータ４で通過減衰量を増加され
た後、中間周波数増幅回路２０で増幅し、ミキサ回路３
で生じた不要な成分を中間周波数フィルタ２１でろ波
し、第２の中間周波数信号１３に変換されリミッタアン
プ回路６に入力する。リミッタアンプ回路６は第２の中
間周波数信号１３に対応したアナログ電圧１４を出力す
る。このとき、可変アッテネータ４の減衰量の分だけ中
間周波数増幅回路２０の入力レベルが下がるため、中間
周波数増幅回路２０が飽和することなくアンテナ１より
入力される高周波受信信号の電界強度に対応した第２の
中間周波数信号１３が出力され、リミッタアンプ回路６
によって第２の中間周波数信号１３に対応したアナログ
電圧１４が出力される。アナログ電圧１４は、アナログ
／デジタル変換器７によってデジタル電圧１５に変換さ
れ、可変アッテネータ４の減衰量の増加分に比例した第
２の制御信号１６とテーブル９の出力である電界レベル
信号１７とを加減算回路１０で加え合わせることによっ
て電界検出を行うことができる。When the electric field strength of the high frequency reception signal input from the antenna 1 increases, the digital voltage 15 exceeds the threshold value, and the control circuit 8 sends a control signal 11 for increasing the attenuation of the variable attenuator 4. The first intermediate frequency signal 12 has its passing attenuation increased by the variable attenuator 4, and is then amplified by the intermediate frequency amplifying circuit 20 so as to be amplified by the mixer circuit 3.
The unnecessary components generated in the above are filtered by the intermediate frequency filter 21, converted into the second intermediate frequency signal 13, and input to the limiter amplifier circuit 6. The limiter amplifier circuit 6 outputs an analog voltage 14 corresponding to the second intermediate frequency signal 13. At this time, the input level of the intermediate frequency amplifying circuit 20 is reduced by the amount of attenuation of the variable attenuator 4, so that the intermediate frequency amplifying circuit 20 does not saturate and the second level corresponding to the electric field strength of the high-frequency reception signal input from the antenna 1 2 is output, and the limiter amplifier circuit 6
As a result, an analog voltage 14 corresponding to the second intermediate frequency signal 13 is output. The analog voltage 14 is converted into a digital voltage 15 by the analog / digital converter 7, and a second control signal 16 proportional to the increase in the attenuation of the variable attenuator 4 and an electric field level signal 17 output from the table 9 are converted. Electric field detection can be performed by adding in the addition / subtraction circuit 10.
【００３１】[0031]
【発明の効果】本発明による第一の効果は、アンテナに
入力する高周波受信信号の電界強度が高い場合でも、中
間周波数増幅回路が飽和することなく正確な電界を検出
することができることである。The first effect of the present invention is that even when the electric field strength of the high-frequency reception signal input to the antenna is high, an accurate electric field can be detected without saturation of the intermediate frequency amplifier circuit.
【００３２】その理由は、電界強度が高い場合、中間周
波数増幅回路の前の可変アッテネータの減衰量を増加さ
せることによって中間周波数増幅回路が飽和することを
防ぎ、また、その減衰量に比例した制御信号と入力電界
に比例した電界レベル信号とを加え合わせることによっ
て正確な電界検出をすることができるからである。The reason is that when the electric field strength is high, the attenuation of the intermediate frequency amplification circuit is prevented by increasing the attenuation of the variable attenuator in front of the intermediate frequency amplification circuit, and the control is performed in proportion to the attenuation. This is because accurate electric field detection can be performed by adding the signal and an electric field level signal proportional to the input electric field.
【００３３】本発明による第二の効果は、可変抵抗減衰
器をミキサ回路の後に置くことによって、可変抵抗減衰
器の減衰量が増しても受信機全体のＮＦに与える影響は
小さいため感度が悪化しないことである。The second effect of the present invention is that by placing the variable resistance attenuator after the mixer circuit, even if the attenuation of the variable resistance attenuator is increased, the influence on the NF of the entire receiver is small, so that the sensitivity is deteriorated. That is not to do.
【００３４】その理由は、感度は受信機の入力端で規定
されており、受信機の入力端と可変抵抗減衰器の間に増
幅するものがない場合、可変抵抗減衰器の減衰量がその
ままＮＦ及び感度の悪化につながるためである。The reason is that the sensitivity is specified at the input terminal of the receiver, and when there is no amplification between the input terminal of the receiver and the variable resistance attenuator, the attenuation of the variable resistance attenuator is NF In addition, this leads to deterioration in sensitivity.
【００３５】本発明による第三の効果は、従来の技術の
ように可変抵抗減衰器にピンダイオードを用いる方法に
限定する必要はないことである。A third effect of the present invention is that it is not necessary to limit the method to using a pin diode for a variable resistance attenuator as in the prior art.
【００３６】その理由は、可変抵抗減衰器をＩＣ等で構
成することによってロジック的に制御することも考えら
れるためである。The reason is that it is conceivable that the variable resistance attenuator may be controlled in a logical manner by configuring the variable resistance attenuator with an IC or the like.
【図１】本発明の一実施例による電界検出回路を備えた
受信機のブロック図である。FIG. 1 is a block diagram of a receiver including an electric field detection circuit according to one embodiment of the present invention.
【図２】図１の受信機の電界検出回路の詳細を示すブロ
ック図である。FIG. 2 is a block diagram illustrating details of an electric field detection circuit of the receiver in FIG. 1;
【図３】従来の電界検出回路を備えた受信機のブロック
図である。FIG. 3 is a block diagram of a receiver including a conventional electric field detection circuit.
１ アンテナ ２ 高周波増幅部 ３ ミキサ回路 ４ 可変アッテネータ ５ 中間周波数増幅部 ６ リミッタアンプ回路 ７ アナログ／デジタル変換器 ８ 制御回路 ９ テーブル １０ 加減算回路 １１ 第１の制御信号 １２ 第１の中間周波数信号 １３ 第２の中間周波数信号 １４ アナログ電圧 １５ デジタル電圧 １６ 第２の制御信号 １７ 電界レベル信号 １８ 高周波増幅回路 １９ 高周波フィルタ ２０ 中間周波数増幅回路 ２１ 中間周波数フィルタ ２２ 可変抵抗減衰器 ２３ 前置低周波低雑音増幅器 ２４ 周波数変換器 ２５ 局部発振器 ２６ 前置中間周波増幅器 ２７ 中間周波帯域ろ波器 ２８ 主中間周波増幅器 ２９ 復調器 ３０ ＡＧＣ電圧検出回路 ３１ 制御回路 ３２ 受信機入力端子 ３３ 受信機出力端子 ３４ ＡＧＣ電圧信号 ３５ バイアス電流 DESCRIPTION OF SYMBOLS 1 Antenna 2 High frequency amplification part 3 Mixer circuit 4 Variable attenuator 5 Intermediate frequency amplification part 6 Limiter amplifier circuit 7 Analog / digital converter 8 Control circuit 9 Table 10 Addition and subtraction circuit 11 First control signal 12 First intermediate frequency signal 13th 2 intermediate frequency signal 14 analog voltage 15 digital voltage 16 second control signal 17 electric field level signal 18 high frequency amplifier circuit 19 high frequency filter 20 intermediate frequency amplifier circuit 21 intermediate frequency filter 22 variable resistor attenuator 23 prefix low frequency low noise amplifier 24 frequency converter 25 local oscillator 26 pre-intermediate frequency amplifier 27 intermediate frequency bandpass filter 28 main intermediate frequency amplifier 29 demodulator 30 AGC voltage detection circuit 31 control circuit 32 receiver input terminal 33 receiver output terminal 34 AGC voltage signal 35 bias current
Claims (4)
を増幅する高周波増幅部と、 前記高周波増幅部の出力を第１の中間周波数信号に変換
するミキサ回路と、 前記第１の中間周波数信号を入力とし、減衰量の増加分
を表す第１の制御信号を受けている時、前記減衰量の増
加分だけ通過減衰量を増加させる可変アッテネータと、 前記可変アッテネータの出力を増幅し、第２の中間周波
数信号を出力する中間周波数増幅部と、 前記第２の中間周波数信号を入力とし、前記第２の中間
周波数信号のレベルに対応したアナログ電圧を出力する
リミッタアンプ回路と、 前記アナログ電圧をデジタル電圧に変換するアナログ／
デジタル変換器と、 前記デジタル電圧を入力とし、前記可変アッテネータが
前記第１の制御信号を受けていない時における前記デジ
タル電圧に対応した前記高周波受信信号の電界強度を表
す電界レベル信号を出力するテーブルと、 前記デジタル電圧を入力とし、前記デジタル電圧が所定
のしきい値を越えた時に、前記減衰量の増加分を表す前
記第１の制御信号を出力すると共に、この減衰量の増加
分に比例したレベルを持つ第２の制御信号を出力する制
御回路と、 前記第２の制御信号と前記電界レベル信号との加算値を
電界検出信号として出力する回路とを備えたことを特徴
とする電界検出回路。1. A high-frequency amplifier for amplifying a high-frequency reception signal input from an antenna; a mixer circuit for converting an output of the high-frequency amplifier to a first intermediate frequency signal; and an input of the first intermediate frequency signal. And a variable attenuator for increasing the passage attenuation by the increase of the attenuation when receiving the first control signal representing the increase of the attenuation, amplifying the output of the variable attenuator, and providing a second intermediate An intermediate frequency amplifier that outputs a frequency signal; a limiter amplifier circuit that receives the second intermediate frequency signal as input and outputs an analog voltage corresponding to the level of the second intermediate frequency signal; To convert to analog /
A digital converter, a table which receives the digital voltage as an input, and outputs an electric field level signal representing an electric field strength of the high frequency reception signal corresponding to the digital voltage when the variable attenuator does not receive the first control signal; Receiving the digital voltage as input, outputting the first control signal indicating the increase in the attenuation when the digital voltage exceeds a predetermined threshold value, and outputting the first control signal in proportion to the increase in the attenuation. And a control circuit for outputting a second control signal having a predetermined level, and a circuit for outputting a sum of the second control signal and the electric field level signal as an electric field detection signal. circuit.
定のしきい値以下である時には、前記第１の制御信号及
び前記第２の制御信号を出力しないことを特徴とする請
求項１に記載の電界検出回路。2. The control circuit according to claim 1, wherein the control circuit does not output the first control signal and the second control signal when the digital voltage is lower than a predetermined threshold. Electric field detection circuit.
を増幅する高周波増幅部と、 前記高周波増幅部の出力を第１の中間周波数信号に変換
するミキサ回路と、 前記第１の中間周波数信号を入力とし、減衰量の増加分
を表す第１の制御信号を受けている時、前記減衰量の増
加分だけ通過減衰量を増加させる可変アッテネータと、 前記可変アッテネータの出力を増幅し、第２の中間周波
数信号を出力する中間周波数増幅部と、 前記第２の中間周波数信号を入力とし、前記第２の中間
周波数信号のレベルに対応したアナログ電圧を出力する
リミッタアンプ回路と、 前記アナログ電圧をデジタル電圧に変換するアナログ／
デジタル変換器と、 前記デジタル電圧を入力とし、前記可変アッテネータが
前記第１の制御信号を受けていない時における前記デジ
タル電圧に対応した前記高周波受信信号の電界強度を表
す電界レベル信号を出力するテーブルと、 前記デジタル電圧を入力とし、前記デジタル電圧が所定
のしきい値を越えた時に、前記減衰量の増加分を表す前
記第１の制御信号を出力すると共に、この減衰量の増加
分に比例したレベルを持つ第２の制御信号を出力する制
御回路と、 前記第２の制御信号と前記電界レベル信号との加算値を
電界検出信号として出力する回路とを備えた電界検出回
路を有することを特徴とする受信機。3. A high-frequency amplifier for amplifying a high-frequency reception signal input from an antenna, a mixer circuit for converting an output of the high-frequency amplifier into a first intermediate frequency signal, and an input of the first intermediate frequency signal. And a variable attenuator for increasing the passage attenuation by the increase of the attenuation when receiving the first control signal representing the increase of the attenuation, amplifying the output of the variable attenuator, and providing a second intermediate An intermediate frequency amplifier that outputs a frequency signal; a limiter amplifier circuit that receives the second intermediate frequency signal as input and outputs an analog voltage corresponding to the level of the second intermediate frequency signal; To convert to analog /
A digital converter, a table which receives the digital voltage as an input, and outputs an electric field level signal representing an electric field strength of the high frequency reception signal corresponding to the digital voltage when the variable attenuator does not receive the first control signal; Receiving the digital voltage as input, outputting the first control signal indicating the increase in the attenuation when the digital voltage exceeds a predetermined threshold value, and outputting the first control signal in proportion to the increase in the attenuation. A control circuit that outputs a second control signal having a predetermined level; and a circuit that outputs a sum of the second control signal and the electric field level signal as an electric field detection signal. Features receiver.
定のしきい値以下である時には、前記第１の制御信号及
び前記第２の制御信号を出力しないことを特徴とする請
求項３に記載の受信機。4. The control circuit according to claim 3, wherein the control circuit does not output the first control signal and the second control signal when the digital voltage is lower than a predetermined threshold. Receiver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19304696A JPH1041843A (en) | 1996-07-23 | 1996-07-23 | Electric field detecting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19304696A JPH1041843A (en) | 1996-07-23 | 1996-07-23 | Electric field detecting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1041843A true JPH1041843A (en) | 1998-02-13 |
Family
ID=16301284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19304696A Pending JPH1041843A (en) | 1996-07-23 | 1996-07-23 | Electric field detecting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH1041843A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1705804A2 (en) * | 2005-03-23 | 2006-09-27 | Robert Bosch Gmbh | Radio receiver |
| KR101032300B1 (en) * | 2010-11-30 | 2011-05-06 | 삼성탈레스 주식회사 | Radar receiving apparatus for correcting noise gain using digital variable attenuator and method thereof |
-
1996
- 1996-07-23 JP JP19304696A patent/JPH1041843A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1705804A2 (en) * | 2005-03-23 | 2006-09-27 | Robert Bosch Gmbh | Radio receiver |
| EP1705804A3 (en) * | 2005-03-23 | 2007-10-03 | Robert Bosch Gmbh | Radio receiver |
| KR101032300B1 (en) * | 2010-11-30 | 2011-05-06 | 삼성탈레스 주식회사 | Radar receiving apparatus for correcting noise gain using digital variable attenuator and method thereof |
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