JPH1022574A - Semiconductor laser - Google Patents
Semiconductor laserInfo
- Publication number
- JPH1022574A JPH1022574A JP16914796A JP16914796A JPH1022574A JP H1022574 A JPH1022574 A JP H1022574A JP 16914796 A JP16914796 A JP 16914796A JP 16914796 A JP16914796 A JP 16914796A JP H1022574 A JPH1022574 A JP H1022574A
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- Japan
- Prior art keywords
- layer
- electrode
- ridge
- semiconductor laser
- electrode layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体レーザに関
し、特に詳しくは半導体レーザのヒートシンクへの固着
に関するものである。The present invention relates to a semiconductor laser, and more particularly to fixing a semiconductor laser to a heat sink.
【０００２】[0002]
【従来の技術】高出力半導体レーザを作成する上で、高
効率・高品質なレーザ光を得るために例えばインデック
スガイド構造のレーザが考えられる。これらの構造のレ
ーザを作成するプロセスは一般的には電流注入領域両側
面を活性層近傍深さまでエッチング除去してリッジ形状
を形成するリッジストライプ方式とリッジ部周辺に選択
的に化合物エピタキシャル膜を形成して埋め込み、平坦
化と電流狭窄を行う選択埋込ストライプ方式がある。2. Description of the Related Art In producing a high-output semiconductor laser, a laser having an index guide structure, for example, is conceivable to obtain high-efficiency and high-quality laser light. Generally, the process of creating a laser with these structures is a ridge stripe method in which both sides of the current injection region are etched away to the depth near the active layer to form a ridge shape, and a compound epitaxial film is formed selectively around the ridge. There is a selective embedding stripe method for embedding, flattening and current confinement.
【０００３】これらのプロセスはそれぞれ長所がある反
面、問題点も持ち合わせている。図４に従来例を示す。
当初のリッジ形成は、製作法が比較的簡単であるという
ことからリッジ部を残し周辺を除去してしまう方法を用
いていた。しかし、リッジ部のみ高さが高く突出してい
る為に、冷却板（以降ヒートシンクと称す）へのボンデ
ィングの際に、リッジ部とヒートシンクが大きな圧力で
直接接触して半導体レーザにダメージを与えてしまった
り、リッジ部以外の周辺部には半田材がぬれないといっ
た問題が生じる。While each of these processes has advantages, it also has its own problems. FIG. 4 shows a conventional example.
Initially, the ridge was formed using a method in which the ridge was left and the periphery was removed because the manufacturing method was relatively simple. However, since only the ridge protrudes high, the ridge and the heat sink directly contact with a large pressure when bonding to a cooling plate (hereinafter referred to as a heat sink), and the semiconductor laser may be damaged. There is a problem that the solder material does not get wet around the periphery other than the ridge portion.
【０００４】ダメージの改善に関しては、図５に示すよ
うにリッジ側面に溝を形成してその周辺はリッジと同じ
高さに成るようにした支持部付きリッジ構造として圧力
の集中を緩和した方法もあるが、この場合にも溝の部分
を完全に半田材とぬれさせることが困難であるという欠
点が残る。半田材とぬれない部分があると、半導体レー
ザから発せられる熱を十分に逃がすことができず出力の
飽和が生じ高出力を得ることが困難となる。また、長時
間駆動した場合の寿命も短くなってしまうといった問題
点も持ち合わせている。なお、この支持部付きリッジ構
造においては、仮に溝に半田材が十分にぬれたときにで
も局所的応力が加わり、レーザ素子自身に歪が加わり信
頼性を悪化させるおそれがある。In order to improve the damage, as shown in FIG. 5, there is also a method in which a groove is formed on the side surface of the ridge and the periphery thereof is at the same height as the ridge to reduce the concentration of pressure by using a ridge structure with a support portion. However, in this case as well, the disadvantage remains that it is difficult to completely wet the groove with the solder material. If there is a portion that does not get wet with the solder material, the heat generated from the semiconductor laser cannot be sufficiently released and output saturation occurs, making it difficult to obtain high output. In addition, there is also a problem that the life when driven for a long time is shortened. In the ridge structure with the support, even if the solder material is sufficiently wetted in the groove, local stress is applied, and the laser element itself may be distorted to deteriorate reliability.
【０００５】また、図６に示すように図４における半導
体レーザのリッジ周辺の除去領域を選択的に埋め込む方
法の場合、埋め込み再成長という煩雑なプロセスを行わ
ねばならず、この埋め込みの際の表面状態の安定化には
十分注意する必要があり、製造歩留まりや再現性といっ
た点で非常に不利である。また、これと類似した方法で
特開平１−201980号に開示されているように、再成長す
る代わりにリッジ側面にポリイミドを絶縁膜を介して形
成し、その上に電極を成膜するといった方法もあるが、
高出力のレーザ光を得るために高電流を印加し、素子温
度が上昇した場合には、ポリイミドが熱により変質・変
形してしまいヒートシンクとの接着が不十分となり素子
寿命が短くなるといった問題が生じ、製品として適性が
ない。As shown in FIG. 6, in the case of selectively embedding the removal region around the ridge of the semiconductor laser in FIG. 4, a complicated process called embedding regrowth must be performed. Care must be taken to stabilize the state, which is very disadvantageous in terms of manufacturing yield and reproducibility. Also, as disclosed in JP-A-1-201980 in a similar manner, instead of regrowth, a polyimide is formed on the side surface of the ridge via an insulating film, and an electrode is formed thereon. There are also
If a high current is applied to obtain a high output laser beam and the device temperature rises, the polyimide will be altered and deformed by heat, resulting in insufficient adhesion to the heat sink and shortening the device life. Occurs and is not suitable as a product.
【０００６】[0006]
【発明が解決しようとする課題】上述のように、リッジ
型半導体レーザにおいて、リッジ側面に半田材が十分に
ぬれない場合の熱発散効率の低さ、および／またはヒー
トシンクとの接着面積が狭いことによるリッジ近辺の半
田材による応力等のダメージは、半導体レーザの高出力
化、高信頼性の妨げとなっている。As described above, in the ridge type semiconductor laser, the heat dissipation efficiency is low when the solder material is not sufficiently wetted on the side surfaces of the ridge, and / or the bonding area with the heat sink is small. The damage such as stress due to the solder material near the ridge caused by high power and high reliability of the semiconductor laser is hindered.
【０００７】本発明は上記事情に鑑みてなされたもので
あって、リッジ溝を容易な方法で高温に耐えうる材料で
平坦化した、高信頼性、高出力を達成する半導体レーザ
を提供するものである。The present invention has been made in view of the above circumstances, and provides a semiconductor laser which achieves high reliability and high output by flattening a ridge groove with a material which can withstand high temperatures by an easy method. It is.
【０００８】[0008]
【課題を解決するための手段】本発明の第一の半導体レ
ーザは、片面に第一の電極層を形成された第一導電型基
板上に、少なくとも第一導電型クラッド層、活性層およ
び第二導電型クラッド層をこの順に含む複数の半導体層
が積層され、該半導体層上に第二の電極層が形成され、
該第二の電極層側がヒートシンクに固着される半導体レ
ーザにおいて、前記ヒートシンクに固着される固着面側
から少なくとも前記第二導電型クラッド層に達する深さ
までの前記半導体層に、互いに間隔をおいて延びる少な
くとも一対の切欠部が形成され、該一対の切欠部の間の
リッジ部上に開口を有する絶縁膜が前記切欠部の側面お
よび底面に形成され、前記開口を覆うようにして前記第
二の電極層が形成され、前記固着面側の露出部の全面に
スピン塗布法により金属が塗布され、アニールされるこ
とにより、前記切欠部が前記金属によって前記リッジ部
の高さと略同じ高さまで埋め込まれ、前記固着面が平坦
化されていることを特徴とするものである。A first semiconductor laser according to the present invention comprises at least a first conductive type clad layer, an active layer and a first conductive type clad layer on a first conductive type substrate having a first electrode layer formed on one surface. A plurality of semiconductor layers including a two-conductivity-type cladding layer in this order are stacked, and a second electrode layer is formed on the semiconductor layer,
In the semiconductor laser in which the second electrode layer side is fixed to a heat sink, the semiconductor layer extends from the fixing surface side fixed to the heat sink to at least a depth reaching the second conductivity type cladding layer with an interval therebetween. At least a pair of cutouts are formed, and an insulating film having an opening on a ridge portion between the pair of cutouts is formed on side and bottom surfaces of the cutout, and the second electrode is formed so as to cover the opening. A layer is formed, a metal is applied to the entire surface of the exposed portion on the fixing surface side by a spin coating method, and annealing is performed, so that the cutout portion is filled with the metal to a height substantially equal to the height of the ridge portion, The fixing surface is flattened.
【０００９】本発明の第二の半導体レーザは、片面に第
一の電極層を形成された第一導電型基板上に、少なくと
も第一導電型クラッド層、活性層および第二導電型クラ
ッド層をこの順に含む複数の半導体層が積層され、該半
導体層上に第二の電極層が形成され、該第二の電極層側
がヒートシンクに固着される半導体レーザにおいて、前
記ヒートシンクに固着される固着面側から少なくとも前
記第二導電型クラッド層に達する深さまでの前記半導体
層に、互いに間隔をおいて延びる少なくとも一対の切欠
部が形成され、該一対の切欠部の間のリッジ部上に開口
を有する絶縁膜が前記切欠部の側面および底面に形成さ
れ、前記切欠部にスピン塗布法によりケイ素化合物が塗
布され、アニールされることにより、前記切欠部が前記
ケイ素化合物によって前記リッジ部の高さと略同じ高さ
まで埋め込まれ、前記固着面側の露出部の全面に前記第
二の電極層が形成され、前記ヒートシンクに固着される
面が平坦化されていることを特徴とするものである。A second semiconductor laser according to the present invention comprises at least a first conductivity type clad layer, an active layer and a second conductivity type clad layer on a first conductivity type substrate having a first electrode layer formed on one surface. In a semiconductor laser in which a plurality of semiconductor layers including this order are laminated, a second electrode layer is formed on the semiconductor layer, and the second electrode layer side is fixed to a heat sink, a fixing surface side fixed to the heat sink. At least a pair of notches extending at a distance from each other are formed in the semiconductor layer to a depth reaching at least the second conductivity type cladding layer, and the insulating layer has an opening on a ridge portion between the pair of notches. A film is formed on the side and bottom surfaces of the notch, and the notch is coated with a silicon compound by a spin coating method and annealed, so that the notch is formed of the silicon compound. The second electrode layer is formed on the entire surface of the exposed portion on the fixing surface side, and the surface fixed to the heat sink is flattened. It is assumed that.
【００１０】すなわち、本発明の半導体レーザは、通常
リッジ型半導体レーザにおいてヒートシンクとの固着面
に形成される凹凸が、スピン塗布およびアニールという
簡単な方法を用いて金属またはケイ素化合物により平坦
化されたものである。That is, in the semiconductor laser of the present invention, the irregularities formed on the surface fixed to the heat sink in the normal ridge type semiconductor laser are planarized by a metal or silicon compound by a simple method of spin coating and annealing. Things.
【００１１】上記において、切欠部とはリッジ部両側部
を切り欠いて形成された部分であってもよいし、リッジ
部両側部に形成された溝状の部分であってもよい。In the above description, the notch may be a portion formed by cutting both sides of the ridge, or a groove-shaped portion formed on both sides of the ridge.
【００１２】ここで、第一導電型および第二導電型とい
う言葉は伝導機構の異なることを明らかにするために用
いており、例えば第一導電型がｎ型に対応する場合は第
二導電型はｐ型に対応するものである。Here, the terms "first conductivity type" and "second conductivity type" are used to clarify that the conduction mechanism is different. For example, when the first conductivity type corresponds to n-type, the second conductivity type is used. Corresponds to the p-type.
【００１３】[0013]
【発明の効果】本発明の半導体レーザ装置は、リッジ型
半導体レーザのリッジ溝をスピン塗布法およびアニール
によって、金属またはケイ素化合物で埋め込むという容
易な方法で、ヒートシンクとの固着面が平坦化されたも
のであり、該固着面が平坦化されたことにより、ヒート
シンクへの隙間のない接着ができ、局所応力の発生を防
止することができる。また、隙間のない接着により、駆
動時の熱発散効率も向上することができ、高信頼性、高
出力および長寿命化を達成することができる。According to the semiconductor laser device of the present invention, the surface fixed to the heat sink is planarized by an easy method of embedding the ridge groove of the ridge type semiconductor laser with a metal or a silicon compound by spin coating and annealing. The flattening of the fixing surface enables the bonding to the heat sink without a gap, thereby preventing the occurrence of local stress. In addition, due to the adhesion without gaps, the heat dissipation efficiency during driving can be improved, and high reliability, high output, and long life can be achieved.
【００１４】[0014]
【発明の実施の形態】以下に、本発明の具体的な実施の
形態について説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described.
【００１５】図１に本発明の第一の実施の形態のリッジ
型インデックスガイド半導体レーザ断面模式図を示す。
n-GaAs基板21（Si=2×1018cm-3ドープ）上にn-GaAsバッ
ファ層22（Si=1×1018cm-3ドープ、0.5μm）、n-Al0.5G
a0.5Asクラッド層23（Si=1×1018cm-3ドープ、2.5μ
m）、アンドープＳＣＨ活性層24、p-Al0.5Ga0.5Asクラ
ッド層25（Zn=1×1018cm-3ドープ、2μm）、p-GaAsキャ
ップ層26（Zn=5×1018cm-3ドープ、0.3μm）を減圧ＭＯ
ＣＶＤ法により積層する。ＳＣＨ活性層24の層構成はn-
GaAs基板21側からAl0.25Ga0.75As光ガイド層（アンドー
プ、0.05μm）、Al0.05Ga0.95As量子井戸層（アンドー
プ、8nm）、Al0.25Ga0.75As光ガイド層（アンドープ、
0.05μm）である。FIG. 1 is a schematic sectional view of a ridge-type index guide semiconductor laser according to a first embodiment of the present invention.
n-GaAs buffer layer 22 (Si = 1 × 10 18 cm −3 doped, 0.5 μm) on n-GaAs substrate 21 (Si = 2 × 10 18 cm −3 doped), n-Al 0.5 G
a 0.5 As cladding layer 23 (Si = 1 × 10 18 cm -3 doped, 2.5μ
m), undoped SCH active layer 24, p-Al 0.5 Ga 0.5 As clad layer 25 (Zn = 1 × 10 18 cm −3 doped, 2 μm), p-GaAs cap layer 26 (Zn = 5 × 10 18 cm −3) Dope, 0.3μm) reduced pressure MO
The layers are stacked by a CVD method. The layer configuration of the SCH active layer 24 is n-
From the GaAs substrate 21 side, an Al 0.25 Ga 0.75 As optical guide layer (undoped, 0.05 μm), an Al 0.05 Ga 0.95 As quantum well layer (undoped, 8 nm), an Al 0.25 Ga 0.75 As optical guide layer (undoped,
0.05 μm).
【００１６】その後、フォトリソグラフィー法によりレ
ジストマスクを作製し、これをSiO2マスクに転写してレ
ジストマスク除去した後、硫酸：過酸化水素：水＝10:
1:1のエッチング液にて200 μｍ幅のメサ形状でリッジ
幅が10μｍとなるようにエッチングを行う。リッジ部で
はp-Al0.5Ga0.5Asクラッド層25の残し厚みが0.2μmとな
るようにエッチングを行いメサ部で等価的な屈折率が高
くなるようにして屈折率導波路を形成する。Thereafter, a resist mask is formed by a photolithography method, transferred to an SiO 2 mask, and the resist mask is removed. Then, sulfuric acid: hydrogen peroxide: water = 10:
Etching is performed with a 1: 1 etchant so that the ridge width becomes 10 μm in a 200 μm width mesa shape. In the ridge portion, etching is performed so that the remaining thickness of the p-Al 0.5 Ga 0.5 As clad layer 25 is 0.2 μm, and a refractive index waveguide is formed in the mesa portion such that the equivalent refractive index is increased.
【００１７】メサ作製後、プラズマＣＶＤ法でSiO2膜27
を形成し、フォトリソグラフィとエッチングによりメサ
上部のSiO2膜を除去して電極窓30を形成した。ｐ側電極
Ti/Pt/Au28を形成し400 ℃以上でシンターしてオーミッ
ク電極とし、塗布型平坦化材、例えば有機溶媒にAu超微
粒子（0.01μm ）を混入した溶剤をスピン塗布31し、25
0 ℃以上でアニールを行う。その後AuGe/Ni/Auによって
ｎ側電極29を形成し、350 ℃でシンターしてオーミック
電極とした。作製したレーザの前面に反射率10％以下の
ＬＲコーティング、後面に95％以上のＨＲコーティング
を施し、チップはヒートシンク上にｐ側電極29側をボン
ディングした。After forming the mesa, an SiO 2 film 27 is formed by a plasma CVD method.
Was formed, and the SiO 2 film on the mesa was removed by photolithography and etching to form an electrode window 30. p-side electrode
Ti / Pt / Au28 is formed and sintered at 400 ° C. or higher to form an ohmic electrode, and a coating type flattening material, for example, a solvent in which Au ultrafine particles (0.01 μm) is mixed in an organic solvent, is spin-coated 31, and 25
Anneal at 0 ° C or higher. Thereafter, an n-side electrode 29 was formed of AuGe / Ni / Au, and sintered at 350 ° C. to form an ohmic electrode. An LR coating having a reflectivity of 10% or less was applied to the front surface of the manufactured laser, and an HR coating having a HR coating of 95% or more was applied to the rear surface.
【００１８】図２は、従来のリッジ型半導体レーザ素子
および本発明に係る固着面が平坦化された半導体レーザ
素子それぞれのＩ−Ｌ特性を示している。それぞれ、破
線および実線で示されている。図２から本発明の半導体
レーザ素子は、高電流印加時においても従来の素子と比
較して素子の寿命が保たれており、高出力が得られてい
ることが明らかである。FIG. 2 shows the IL characteristics of the conventional ridge-type semiconductor laser device and the semiconductor laser device according to the present invention, in which the fixing surface is flattened. These are indicated by broken and solid lines, respectively. From FIG. 2, it is clear that the semiconductor laser device of the present invention has a longer life than a conventional device even when a high current is applied, and high output is obtained.
【００１９】なお、上述の塗布型平坦化材はAu材に限定
されるものではなく、電気抵抗率の低い金属であれば使
用可能である。The above-mentioned coating type flattening material is not limited to the Au material, but may be any metal having a low electric resistivity.
【００２０】本発明の第二の実施の形態のリッジ型イン
デックスガイド半導体レーザの断面模式図を図３に示
す。n-GaAs基板21（Si=2×1018cm-3ドープ）上にn-GaAs
バッファ層22（Si=1×1018cm-3ドープ、0.5μm）、n-Al
0.5Ga0.5Asクラッド層23（Ｓｉ＝１×１０１８ｃｍ−３
ドープ、2.5μm）、アンドープＳＣＨ活性層24、p-Al
0.5Ga0.5Asクラッド層25（Zn=1×1018cm-3ドープ、2μ
m）、p-GaAsキャップ層26（Zn=5×1018cm-3ドープ、0.3
μm）を減圧ＭＯＣＶＤ法により積層する。ＳＣＨ活性
層24の層構成はn-GaAs基板21側からAl0.25Ga0.75As光ガ
イド層（アンドープ、0.05μm ）、Al0.05Ga0.95As量子
井戸層（アンドープ、8nm ）、Al0.25Ga0.75As光ガイド
層（アンドープ、0.05μm ）である。FIG. 3 is a schematic sectional view of a ridge-type index guide semiconductor laser according to a second embodiment of the present invention. n-GaAs on n-GaAs substrate 21 (Si = 2 × 10 18 cm -3 doped)
Buffer layer 22 (Si = 1 × 10 18 cm −3 doped, 0.5 μm), n-Al
0.5 Ga 0.5 As cladding layer 23 (Si = 1 × 10 18 cm −3)
Doped, 2.5 μm), undoped SCH active layer 24, p-Al
0.5 Ga 0.5 As clad layer 25 (Zn = 1 × 10 18 cm -3 doped, 2μ
m), p-GaAs cap layer 26 (Zn = 5 × 10 18 cm −3 dope, 0.3
μm) are laminated by a reduced pressure MOCVD method. The layer configuration of the SCH active layer 24 includes an Al 0.25 Ga 0.75 As optical guide layer (undoped, 0.05 μm), an Al 0.05 Ga 0.95 As quantum well layer (undoped, 8 nm), and an Al 0.25 Ga 0.75 As light from the n-GaAs substrate 21 side. A guide layer (undoped, 0.05 μm).
【００２１】その後、フォトリソグラフィー法によりレ
ジストマスクを作製し、これをSiO2マスクに転写してレ
ジストマスク除去した後、硫酸：過酸化水素：水＝10:
1:1のエッチング液にて200 μm 幅のメサ形状でリッジ
幅が10μm となるようにエッチングを行う。リッジ部で
はp-Al0.5Ga0.5Asクラッド層25の残し厚みが0.2μmとな
るようにエッチングを行いメサ部で等価的な屈折率が高
くなるようにして屈折率導波路を形成する。Thereafter, a resist mask is formed by a photolithography method, transferred to an SiO 2 mask, and the resist mask is removed. Then, sulfuric acid: hydrogen peroxide: water = 10:
Etching is performed with a 1: 1 etchant so that the ridge width is 10 μm in a 200 μm width mesa shape. In the ridge portion, etching is performed so that the remaining thickness of the p-Al 0.5 Ga 0.5 As clad layer 25 is 0.2 μm, and a refractive index waveguide is formed in the mesa portion such that the equivalent refractive index is increased.
【００２２】メサ作製後、プラズマＣＶＤ法でSiO2膜27
を形成し、塗布型平坦材をスピン塗布32し、250 ℃以上
の温度でアニールする。これによってリッジ溝が埋ま
り、平坦化が達成される。フォトリソグラフィとエッチ
ングによりメサ上部のSiO2膜を除去して電極窓30を形成
した。ｐ側電極Ti/Pt/Au28を形成し、400 ℃でシンター
してオーミック電極とした後、ｎ側電極AuGe/Ni/Au29を
形成し、350 ℃でシンターしてオーミック電極とした。
作製したレーザの前面に反射率10％以下のＬＲコーティ
ング、後面に95％以上のＨＲコーティングを施し、チッ
プはヒートシンク上にｐ側電極側をボンディングした。After the formation of the mesa, the SiO 2 film 27 is formed by a plasma CVD method.
Is formed, and a coating type flat material is spin-coated 32 and annealed at a temperature of 250 ° C. or more. As a result, the ridge groove is filled and flattening is achieved. The electrode window 30 was formed by removing the SiO 2 film on the mesa by photolithography and etching. After forming a p-side electrode Ti / Pt / Au28 and sintering at 400 ° C. to form an ohmic electrode, an n-side electrode AuGe / Ni / Au29 was formed and sintering at 350 ° C. to form an ohmic electrode.
An LR coating having a reflectance of 10% or less was applied to the front surface of the fabricated laser, and an HR coating having a HR coating of 95% or more was applied to the rear surface.
【００２３】上記のように、本発明の半導体レーザは、
リッジ溝に塗布型平坦化材をスピン塗布し、アニールす
ることによって容易に平坦化が行われた後に、ヒートシ
ンクに半田材を用いてボンディングされるため、隙間の
ない、局所応力のない接着を得ることができる。As described above, the semiconductor laser of the present invention
Spin coating a flattening material on the ridge groove, annealing it, and then annealing it. After that, it is bonded to the heat sink using solder material, so that there is no gap and adhesion without local stress. be able to.
【００２４】なお、上述の実施の形態においては、AlGa
As系の半導体材料について説明したが、材料はこれに限
るものではなく、半導体レーザを構成できるものであれ
ば他の材料であってもよい。In the above-described embodiment, AlGa is used.
Although the As-based semiconductor material has been described, the material is not limited to this, and other materials may be used as long as they can form a semiconductor laser.
【００２５】また、メサ幅は200μm に限定されず、２
μm のような狭ストライプから300μmのような広ストラ
イプであってもよく、さらには、ストライプを複数並べ
たアレーであってもよい。Further, the mesa width is not limited to 200 μm and is not limited to 200 μm.
It may be a narrow stripe such as μm to a wide stripe such as 300 μm, or an array in which a plurality of stripes are arranged.
【図１】本発明の第一の実施の形態に係る電極平坦化リ
ッジ型インデックスガイド半導体レーザの断面図FIG. 1 is a cross-sectional view of an electrode-flattened ridge type index guide semiconductor laser according to a first embodiment of the present invention.
【図２】本発明の第一の実施の形態の電極平坦化リッジ
型インデックスガイド半導体レーザのＩ−Ｌ特性を示す
説明図FIG. 2 is an explanatory diagram showing IL characteristics of the electrode-flattened ridge-type index guide semiconductor laser according to the first embodiment of the present invention;
【図３】本発明の第二の実施の形態に係る絶縁膜平坦化
リッジ型インデックスガイド半導体レーザ断面図FIG. 3 is a sectional view of a ridge type index guide semiconductor laser with a planarized insulating film according to a second embodiment of the present invention;
【図４】従来のリッジ型インデックスガイド半導体レー
ザ断面図FIG. 4 is a sectional view of a conventional ridge type index guide semiconductor laser.
【図５】従来のリッジ型インデックスガイド半導体レー
ザ断面図FIG. 5 is a sectional view of a conventional ridge type index guide semiconductor laser.
【図６】従来のリッジ型インデックスガイド半導体レー
ザ断面図FIG. 6 is a sectional view of a conventional ridge type index guide semiconductor laser.
21 n-GaAs基板 22 n-GaAsバッファ層 23 n-Al0.5Ga0.5Asクラッド層 24 アンドープＳＣＨ活性層 25 p-Al0.5Ga0.5Asクラッド層 26 p-GaAsキャップ層 27 SiO2膜 28 ｐ型側Ti/Pt/Au電極 29 ｎ型側AuGe/Ni/Au電極 30 電極窓 31, 32 スピン塗布部21 n-GaAs substrate 22 n-GaAs buffer layer 23 n-Al 0.5 Ga 0.5 As cladding layer 24 undoped SCH active layer 25 p-Al 0.5 Ga 0.5 As cladding layer 26 p-GaAs cap layer 27 SiO 2 film 28 p-type side Ti / Pt / Au electrode 29 n-type AuGe / Ni / Au electrode 30 Electrode window 31, 32 Spin coating
Claims (2)
電型基板の他面上に、少なくとも第一導電型クラッド
層、活性層および第二導電型クラッド層をこの順に含む
複数の半導体層が積層され、該半導体層上に第二の電極
層が形成され、該第二の電極層側がヒートシンクに固着
される半導体レーザにおいて、 前記ヒートシンクに固着される固着面側から少なくとも
前記第二導電型クラッド層に達する深さまでの前記半導
体層に、互いに間隔をおいて延びる少なくとも一対の切
欠部が形成され、 該一対の切欠部の間のリッジ部上に開口を有する絶縁膜
が前記切欠部の側面および底面に形成され、 前記開口を覆うようにして前記第二の電極層が形成さ
れ、 前記固着面側の露出部の全面にスピン塗布法により金属
が塗布され、アニールされることにより、前記切欠部が
前記金属によって前記リッジ部の高さと略同じ高さまで
埋め込まれ、前記固着面が平坦化されていることを特徴
とする半導体レーザ。1. A plurality of cladding layers including at least a first-conductivity-type clad layer, an active layer and a second-conductivity-type clad layer on another surface of a first-conductivity-type substrate having a first electrode layer formed on one surface. In a semiconductor laser in which a semiconductor layer is laminated, a second electrode layer is formed on the semiconductor layer, and the second electrode layer side is fixed to a heat sink, at least the second At least a pair of notches extending at a distance from each other are formed in the semiconductor layer to a depth reaching the conductive type cladding layer, and the insulating film having an opening on a ridge portion between the pair of notches is formed by the notch. The second electrode layer is formed so as to cover the opening, and a metal is applied to the entire exposed portion on the fixing surface side by a spin coating method and is annealed. More, a semiconductor laser wherein the notch is embedded to a height substantially the same height of the ridge portion by the metal, wherein said fixed surface is flattened.
電型基板の他面上に、少なくとも第一導電型クラッド
層、活性層および第二導電型クラッド層をこの順に含む
複数の半導体層が積層され、該半導体層上に第二の電極
層が形成され、該第二の電極層側がヒートシンクに固着
される半導体レーザにおいて、 前記ヒートシンクに固着される固着面側から少なくとも
前記第二導電型クラッド層に達する深さまでの前記半導
体層に、互いに間隔をおいて延びる少なくとも一対の切
欠部が形成され、 該一対の切欠部の間のリッジ部上に開口を有する絶縁膜
が前記切欠部の側面および底面に形成され、 前記切欠部にスピン塗布法によりケイ素化合物が塗布さ
れ、アニールされることにより、前記切欠部が前記ケイ
素化合物によって前記リッジ部の高さと略同じ高さまで
埋め込まれ、 前記固着面側の露出部の全面に前記第二の電極層が形成
され、前記ヒートシンクに固着される面が平坦化されて
いることを特徴とする半導体レーザ。2. A method according to claim 1, wherein the first electrode layer is formed on one surface of the first conductive type substrate, and the other surface includes at least a first conductive type clad layer, an active layer, and a second conductive type clad layer. In a semiconductor laser in which a semiconductor layer is laminated, a second electrode layer is formed on the semiconductor layer, and the second electrode layer side is fixed to a heat sink, at least the second At least a pair of notches extending at a distance from each other are formed in the semiconductor layer to a depth reaching the conductive type cladding layer, and the insulating film having an opening on a ridge portion between the pair of notches is formed by the notch. A silicon compound is applied to the notch by a spin coating method and is annealed, so that the notch has a height of the ridge formed by the silicon compound. A semiconductor laser, wherein the second electrode layer is formed on the entire surface of the exposed portion on the fixing surface side, and the surface fixed to the heat sink is flattened.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16914796A JP3722912B2 (en) | 1996-06-28 | 1996-06-28 | Semiconductor laser manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16914796A JP3722912B2 (en) | 1996-06-28 | 1996-06-28 | Semiconductor laser manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1022574A true JPH1022574A (en) | 1998-01-23 |
| JP3722912B2 JP3722912B2 (en) | 2005-11-30 |
Family
ID=15881164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16914796A Expired - Fee Related JP3722912B2 (en) | 1996-06-28 | 1996-06-28 | Semiconductor laser manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3722912B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002134820A (en) * | 2000-10-27 | 2002-05-10 | Oki Electric Ind Co Ltd | Semiconductor laser |
| CN100364189C (en) * | 2004-01-30 | 2008-01-23 | 夏普株式会社 | Semiconductor laser and its producing method |
| JP2009212176A (en) * | 2008-03-03 | 2009-09-17 | Nec Corp | Semiconductor laser |
| CN103545714A (en) * | 2013-10-20 | 2014-01-29 | 北京工业大学 | Semiconductor laser unit with novel near-cavity-surface current non-injection region structure and manufacturing method |
| JP2014203960A (en) * | 2013-04-04 | 2014-10-27 | 日本電信電話株式会社 | Direct modulation laser of high speed high temperature operation and manufacturing method therefor |
-
1996
- 1996-06-28 JP JP16914796A patent/JP3722912B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002134820A (en) * | 2000-10-27 | 2002-05-10 | Oki Electric Ind Co Ltd | Semiconductor laser |
| CN100364189C (en) * | 2004-01-30 | 2008-01-23 | 夏普株式会社 | Semiconductor laser and its producing method |
| JP2009212176A (en) * | 2008-03-03 | 2009-09-17 | Nec Corp | Semiconductor laser |
| JP2014203960A (en) * | 2013-04-04 | 2014-10-27 | 日本電信電話株式会社 | Direct modulation laser of high speed high temperature operation and manufacturing method therefor |
| CN103545714A (en) * | 2013-10-20 | 2014-01-29 | 北京工业大学 | Semiconductor laser unit with novel near-cavity-surface current non-injection region structure and manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3722912B2 (en) | 2005-11-30 |
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