JPH10154632A - Three-terminal capacitor - Google Patents
Three-terminal capacitorInfo
- Publication number
- JPH10154632A JPH10154632A JP8312039A JP31203996A JPH10154632A JP H10154632 A JPH10154632 A JP H10154632A JP 8312039 A JP8312039 A JP 8312039A JP 31203996 A JP31203996 A JP 31203996A JP H10154632 A JPH10154632 A JP H10154632A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- ground
- internal electrode
- external electrode
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、３端子コンデン
サ、特に、ノイズフィルタ等として使用される積層型３
端子コンデンサに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a three-terminal capacitor, and more particularly, to a three-terminal capacitor used as a noise filter.
Regarding terminal capacitors.
【０００２】[0002]
【従来の技術】この種のコンデンサとしては、従来よ
り、図９及び図１０に示すものが知られている。この３
端子コンデンサ８１は、絶縁体セラミックシート８２と
信号内部電極８３とグランド内部電極８４を積み重ねて
積層体８６とした後、この積層体８６の側面部に入力外
部電極８７、出力外部電極８８及びグランド外部電極８
９，９０が設けられる。入力外部電極８７は信号内部電
極８３の一方の引出し部８３ａに接続され、出力外部電
極８８は信号内部電極８３の他方の引出し部８３ｂに接
続され、グランド外部電極８９，９０はそれぞれグラン
ド内部電極８４の両引出し部８４ａ，８４ｂに接続され
る。2. Description of the Related Art Conventionally, as this kind of capacitor, those shown in FIGS. 9 and 10 are known. This 3
The terminal capacitor 81 is formed by stacking an insulating ceramic sheet 82, a signal internal electrode 83, and a ground internal electrode 84 to form a laminate 86. Electrode 8
9, 90 are provided. The input external electrode 87 is connected to one lead portion 83a of the signal internal electrode 83, the output external electrode 88 is connected to the other lead portion 83b of the signal internal electrode 83, and the ground external electrodes 89 and 90 are connected to the ground internal electrode 84, respectively. Are connected to the two drawers 84a and 84b.
【０００３】[0003]
【発明が解決しようとする課題】この３端子コンデンサ
８１は、印刷配線板等に半田付けされた後、通常の環境
条件の下で用いられる場合には何ら問題は生じない。し
かしながら、例えば−５５℃〜＋１５０℃といった温度
差に繰り返し晒されるような特に厳しい環境条件の下で
用いられる場合、内部電極８３，８４と外部電極８７〜
９０の接続部分から外れた外部電極８７〜９０の縁部、
すなわち、内部電極８３の引出し部８３ａ，８３ｂと外
部電極８７，８８の縁の間の領域Ａ（図１０において、
点線で囲まれた領域）、あるいは内部電極８４の引出し
部８４ａ，８４ｂと外部電極８９，９０の縁の間の領域
Ｂにおいて、積層体８６の絶縁体セラミック自体が貝殻
形状に剥れたり欠けたりすることがある。これは、半田
付けの際の半田の熱収縮によって外部電極８７〜９０や
絶縁体セラミックに応力が働くが、特に外部電極８７〜
９０を乾式めっき法にて形成した場合のように、外部電
極８７〜９０と絶縁体セラミックとの間の密着強度が大
きいと、この応力が外部電極８７〜９０と絶縁体セラミ
ックとの界面での剥れに作用せず、絶縁体セラミック自
体に作用し、絶縁体セラミック自体に貝殻形状の剥れを
もたらすからであると考えられる。When the three-terminal capacitor 81 is used under normal environmental conditions after being soldered to a printed wiring board or the like, no problem occurs. However, when used under particularly severe environmental conditions such as repeated exposure to a temperature difference of, for example, −55 ° C. to + 150 ° C., the internal electrodes 83 and 84 and the external electrodes 87 to
Edge portions of the external electrodes 87 to 90 deviated from the connection portion of the 90;
That is, the region A between the lead portions 83a and 83b of the internal electrode 83 and the edges of the external electrodes 87 and 88 (in FIG.
In the region B between the lead portions 84a and 84b of the internal electrode 84 and the edges of the external electrodes 89 and 90, the insulating ceramic itself of the laminate 86 is peeled or chipped in a shell shape. May be. This is because stress acts on the external electrodes 87 to 90 and the insulating ceramic due to thermal contraction of the solder during soldering.
If the adhesion strength between the external electrodes 87 to 90 and the insulating ceramic is large, as in the case where the external electrodes 87 to 90 are formed by a dry plating method, this stress is generated at the interface between the external electrodes 87 to 90 and the insulating ceramic. This is considered to be because it does not act on peeling, acts on the insulating ceramic itself, and causes shell-shaped peeling of the insulating ceramic itself.
【０００４】そこで、本発明の目的は、外部電極位置に
おける絶縁体セラミックの剥れや欠けを防止することが
できる３端子コンデンサを提供することにある。An object of the present invention is to provide a three-terminal capacitor capable of preventing the insulating ceramic from peeling or chipping at the position of the external electrode.
【０００５】[0005]
【課題を解決するための手段と作用】以上の目的を達成
するため、本発明に係る３端子コンデンサは、（ａ）絶
縁体セラミック膜と信号内部電極とグランド内部電極と
を積み重ねて構成した積層体と、（ｂ）前記積層体の側
面部に設けられ、前記信号内部電極の一方の露出部に接
続した乾式めっき入力外部電極と、（ｃ）前記積層体の
側面部に設けられ、前記信号内部電極の他方の露出部に
接続した乾式めっき出力外部電極と、（ｄ）前記積層体
の側面部に設けられ、前記グランド内部電極の露出部に
接続した乾式めっきグランド外部電極と、（ｅ）前記積
層体内に埋設され、前記積層体の側面部に露出した端部
が前記入力外部電極、出力外部電極及びグランド外部電
極の少なくとも一つの外部電極の縁部に接続した補強用
ダミー内部電極と、を備えたことを特徴とする。In order to achieve the above object, a three-terminal capacitor according to the present invention comprises (a) a laminated structure in which an insulating ceramic film, a signal internal electrode and a ground internal electrode are stacked. And (b) a dry plating input external electrode provided on a side surface of the laminate and connected to one exposed portion of the signal internal electrode; and (c) a signal provided on a side surface of the laminate, A dry plating output external electrode connected to the other exposed portion of the internal electrode; (d) a dry plating ground external electrode provided on the side surface of the laminate and connected to the exposed portion of the ground internal electrode; A reinforcing dummy internal electrode connected to an edge of at least one of the input external electrode, the output external electrode, and the ground external electrode, the end of which is embedded in the laminate and is exposed on a side surface of the laminate; Characterized by comprising a.
【０００６】以上の構成により、補強用ダミー内部電極
がくさびの役割をするため、外部電極の縁部に位置する
部分の絶縁体セラミックが補強され、この部分の絶縁体
セラミックに半田の熱収縮による応力が加わっても、絶
縁体セラミックが剥がれたり欠けたりしない。さらに、
補強用ダミー内部電極の端部を、この補強用ダミー内部
電極に接続している外部電極からはみ出させることによ
り、外部電極の縁部の密着強度がアップし、外部電極の
縁部が絶縁体セラミックから剥れる心配もない。With the above structure, the reinforcing dummy internal electrode plays the role of a wedge, so that the insulating ceramic in the portion located at the edge of the external electrode is reinforced, and the insulating ceramic in this portion is caused by the heat shrinkage of the solder. Even when stress is applied, the insulating ceramic does not peel or chip. further,
By making the end of the reinforcing dummy internal electrode protrude from the external electrode connected to the reinforcing dummy internal electrode, the adhesion strength of the edge of the external electrode is increased, and the edge of the external electrode is made of an insulating ceramic. There is no worry about peeling off.
【０００７】[0007]
【発明の実施の形態】以下、本発明に係る３端子コンデ
ンサの実施形態について添付図面を参照して説明する。 ［第１実施形態、図１及び図２］図１に示すように、積
層型３端子コンデンサ１は、補強用ダミー内部電極３〜
８を表面に設けた誘電体セラミックシート２と、グラン
ド内部電極９を表面に設けた誘電体セラミックシート２
と、信号内部電極１０を表面に設けた誘電体セラミック
シート２と、保護用誘電体セラミックシート２等にて構
成されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a three-terminal capacitor according to the present invention will be described with reference to the accompanying drawings. [First Embodiment, FIGS. 1 and 2] As shown in FIG. 1, a multilayer three-terminal capacitor 1 includes reinforcing dummy internal electrodes 3 to 3.
And a dielectric ceramic sheet 2 having a ground internal electrode 9 on the surface.
, A dielectric ceramic sheet 2 provided with a signal internal electrode 10 on the surface, a protective dielectric ceramic sheet 2 and the like.
【０００８】補強用ダミー内部電極３，４は、それぞれ
誘電体セラミックシート２の中央部左寄りの位置及び右
寄りの位置に手前側の辺から奥側の辺に渡って帯状に形
成され、その一方の引出し部３ａ，４ａがシート２の手
前側の辺に露出し、他方の引出し部３ｂ，４ｂがシート
２の奥側の辺に露出している。さらに、補強用ダミー内
部電極５，６，７，８が、それぞれシート２の四つの隅
部に形成され、その引出し部５ａ，６ａがシート２の左
辺に露出し、引出し部７ａ，８ａがシート２の右辺に露
出している。The reinforcing dummy internal electrodes 3 and 4 are formed in a band shape from the front side to the back side at the center portion of the dielectric ceramic sheet 2 on the left side and on the right side, respectively. The drawers 3a and 4a are exposed on the near side of the sheet 2, and the other drawers 3b and 4b are exposed on the far side of the sheet 2. Further, reinforcing dummy internal electrodes 5, 6, 7, and 8 are formed at four corners of the sheet 2, respectively, and the extraction portions 5a and 6a are exposed on the left side of the sheet 2, and the extraction portions 7a and 8a are 2 is exposed on the right side.
【０００９】グランド内部電極９は、誘電体セラミック
シート２の表面に広面積に形成され、その一方の引出し
部９ａがシート２の手前側の辺の中央部に露出し、他方
の引出し部９ｂがシート２の奥側の辺の中央部に露出し
ている。信号内部電極１０は、誘電体セラミックシート
２の中央部の位置に左辺から右辺に渡って帯状に形成さ
れ、その一方の引出し部１０ａがシート２の左辺に露出
し、他方の引出し部１０ｂがシート２の右辺に露出して
いる。電極３〜１０はＡｇ−Ｐｄ，Ａｇ，Ｐｄ，Ｎｉ，
Ｃｕ等の材料からなり、スパッタリング法、真空蒸着
法、印刷法、転写法等の任意の方法により形成される。The ground internal electrode 9 is formed in a wide area on the surface of the dielectric ceramic sheet 2, and one of the lead portions 9 a is exposed at the center of the near side of the sheet 2, and the other lead portion 9 b is formed. It is exposed at the center of the back side of the sheet 2. The signal internal electrode 10 is formed in a band shape from the left side to the right side at the position of the center of the dielectric ceramic sheet 2, one of the lead portions 10 a is exposed on the left side of the sheet 2, and the other lead portion 10 b is formed on the sheet. 2 is exposed on the right side. The electrodes 3 to 10 are made of Ag-Pd, Ag, Pd, Ni,
It is made of a material such as Cu and formed by any method such as a sputtering method, a vacuum evaporation method, a printing method, and a transfer method.
【００１０】誘電体セラミックシート２は、図１に示す
ように積み重ねられた後、一体的に焼成され、図２に示
した積層体１１とされる。積層体１１の左右の側面部に
は入力外部電極１２、出力外部電極１３が形成され、積
層体１１の手前側及び奥側の側面部にはそれぞれグラン
ド外部電極１４，１５が形成される。外部電極１２〜１
５は、Ａｇ−Ｐｄ，Ａｇ，Ｐｄ，Ｎｉ，Ｃｕ等の材料か
らなり、スパッタリング法、真空蒸着法、溶射法、イオ
ンプレーティング法等の乾式めっき法により形成され
る。The dielectric ceramic sheets 2 are stacked as shown in FIG. 1 and then integrally fired to form a laminate 11 shown in FIG. Input external electrodes 12 and output external electrodes 13 are formed on the left and right side surfaces of the multilayer body 11, and ground external electrodes 14 and 15 are formed on the front and rear side surfaces of the multilayer body 11, respectively. External electrodes 12-1
Reference numeral 5 is made of a material such as Ag-Pd, Ag, Pd, Ni, or Cu, and is formed by a dry plating method such as a sputtering method, a vacuum deposition method, a thermal spraying method, and an ion plating method.
【００１１】入力外部電極１２は信号内部電極１０の引
出し部１０ａと補強用ダミー内部電極５，６の引出し部
５ａ，６ａに接続され、出力外部電極１３は信号内部電
極１０の引出し部１０ｂと補強用ダミー内部電極７，８
の引出し部７ａ，８ａに接続され、グランド外部電極１
４はグランド内部電極９の引出し部９ａと補強用ダミー
内部電極３，４の引出し部３ａ，４ａに接続され、グラ
ンド外部電極１５はグランド内部電極９の引出し部９ｂ
と補強用ダミー内部電極３，４の引出し部３ｂ，４ｂに
接続される。The input external electrode 12 is connected to the lead portion 10a of the signal internal electrode 10 and the lead portions 5a, 6a of the reinforcing dummy internal electrodes 5, 6, and the output external electrode 13 is connected to the lead portion 10b of the signal internal electrode 10 for reinforcement. Dummy internal electrodes 7, 8
Of the ground external electrode 1
4 is connected to the lead portion 9a of the ground internal electrode 9 and the lead portions 3a and 4a of the reinforcing dummy internal electrodes 3 and 4, and the ground external electrode 15 is connected to the lead portion 9b of the ground internal electrode 9.
And the lead-out portions 3b, 4b of the reinforcing dummy internal electrodes 3, 4.
【００１２】こうして得られた積層型３端子コンデンサ
１は、信号内部電極１０とグランド内部電極９の間で静
電容量が形成される。補強用ダミー内部電極３〜８は、
積層体１１の上下両端部近傍でグランド内部電極９の外
側に配設されており、コンデンサ１の電気的特性に殆ん
ど影響を及ぼさない。さらに、補強用ダミー内部電極３
の引出し部３ａ，３ｂの一部は、グランド内部電極９の
引出し部９ａ，９ｂの左側縁部とオーバラップしてい
る。オーバラップ量ｄは、引出し部３ａ，３ｂの幅の略
半分の寸法に設定するのが好ましい。同様に、補強用ダ
ミー内部電極４の引出し部４ａ，４ｂの一部は、グラン
ド内部電極９の引出し部９ａ，９ｂの右側縁部とオーバ
ラップしている。ただし、必らずしも引出し部３ａ〜４
ｂを引出し部９ａ，９ｂにオーバラップさせる必要はな
いことは言うまでもない。The multilayer three-terminal capacitor 1 thus obtained has a capacitance between the signal internal electrode 10 and the ground internal electrode 9. The reinforcing dummy internal electrodes 3 to 8
It is arranged near the upper and lower ends of the multilayer body 11 and outside the ground internal electrode 9, and hardly affects the electrical characteristics of the capacitor 1. Further, the reinforcing dummy internal electrode 3
Of the lead portions 3a and 3b overlap the left edge portions of the lead portions 9a and 9b of the ground internal electrode 9. It is preferable that the overlap amount d is set to a dimension that is approximately half the width of the drawers 3a and 3b. Similarly, portions of the lead portions 4 a and 4 b of the reinforcing dummy internal electrode 4 overlap with the right edge portions of the lead portions 9 a and 9 b of the ground internal electrode 9. However, the drawers 3a to 4
Needless to say, it is not necessary to overlap b with the drawers 9a and 9b.
【００１３】補強用ダミー内部電極３，４は、その引出
し部３ａ，４ａ、３ｂ，４ｂがそれぞれグランド外部電
極１４，１５の左右両側の縁部に接続し、くさびの役割
をする。従って、グランド外部電極１４，１５の左右両
側の縁部に位置する部分の絶縁体セラミックが補強され
る。補強用ダミー内部電極５，６は、その引出し部５
ａ，６ａがそれぞれ入力外部電極１２の四隅の縁部に接
続し、くさびの役割をする。従って、入力外部電極１２
の四隅に位置する部分の絶縁体セラミックが補強され
る。同様に、補強用のダミー内部電極７，８は、その引
出し部７ａ，８ａがそれぞれ出力外部電極１３の四隅の
縁部に接続し、くさびの役割をする。従って、出力外部
電極１３の四隅に位置する部分の絶縁体セラミックが補
強される。The lead-out portions 3a, 4a, 3b, 4b of the reinforcing dummy internal electrodes 3, 4 are connected to the left and right edges of the ground external electrodes 14, 15, respectively, and serve as wedges. Therefore, the insulating ceramics at the portions located on the left and right edges of the ground external electrodes 14 and 15 are reinforced. The reinforcing dummy internal electrodes 5 and 6 are connected to the lead-out portions 5 thereof.
a and 6a are connected to the edges of the four corners of the input external electrode 12, and serve as wedges. Therefore, the input external electrode 12
The insulator ceramics at the four corners are reinforced. Similarly, the lead-out portions 7a, 8a of the reinforcing dummy internal electrodes 7, 8 are connected to the edges of the four corners of the output external electrode 13, respectively, and serve as wedges. Therefore, the insulating ceramics at the four corners of the output external electrode 13 are reinforced.
【００１４】この結果、このコンデンサ１を印刷配線板
等に半田付けした後、例えば−５５℃〜＋１５０℃とい
った大きい温度差に繰り返し晒すような特に厳しい環境
条件の下で用いても、信号内部電極１０の引出し部１０
ａ，１０ｂと外部電極１２，１３の縁の間の領域Ａ（図
２において点線で囲まれた領域）、あるいはグランド内
部電極９の引出し部９ａ，９ｂと外部電極１４，１５の
縁の間の領域Ｂにおいて、積層体１１の絶縁体セラミッ
クが貝殻形状に剥れることを防止することができる。As a result, even if the capacitor 1 is soldered to a printed wiring board or the like and then repeatedly exposed to a large temperature difference of, for example, -55.degree. 10 drawers 10
a, 10b and the region between the edges of the external electrodes 12, 13 (the region surrounded by the dotted line in FIG. 2) or the region between the lead portions 9a, 9b of the ground internal electrode 9 and the edges of the external electrodes 14, 15. In the region B, the insulating ceramic of the laminate 11 can be prevented from peeling off in a shell shape.
【００１５】［第２実施形態、図３及び図４］図３に示
すように、積層型３端子コンデンサ２１は、補強用ダミ
ー内部電極２３，２４を表面に設けた誘電体セラミック
シート２２と、グランド内部電極２５を表面に設けた誘
電体セラミックシート２２と、信号内部電極２６を表面
に設けた誘電体セラミックシート２２と、保護用誘電体
セラミックシート２２等にて構成されている。[Second Embodiment, FIGS. 3 and 4] As shown in FIG. 3, a multilayer three-terminal capacitor 21 includes a dielectric ceramic sheet 22 having reinforcing dummy internal electrodes 23 and 24 provided on the surface thereof. It comprises a dielectric ceramic sheet 22 provided with a ground internal electrode 25 on the surface, a dielectric ceramic sheet 22 provided with a signal internal electrode 26 on the surface, a protective dielectric ceramic sheet 22 and the like.
【００１６】補強用ダミー内部電極２３，２４は、それ
ぞれ誘電体セラミックシート２２の中央部左寄りの位置
及び右寄りの位置に手前側の辺から奥側の辺に渡って帯
状に形成され、その一方の引出し部２３ａ，２４ａがシ
ート２２の手前側の辺に露出し、他方の引出し部２３
ｂ，２４ｂがシート２２の奥側の辺に露出している。グ
ランド内部電極２５は、誘電体セラミックシート２２の
表面に広面積に形成され、その一方の引出し部２５ａが
シート２２の手前側の辺の中央部に露出し、他方の引出
し部２５ｂがシート２２の奥側の辺の中央部に露出して
いる。信号内部電極２６は、誘電体セラミックシート２
２の中央部の位置に左辺から右辺に渡って帯状に形成さ
れ、その一方の引出し部２６ａがシート２２の左辺に露
出し、他方の引出し部２６ｂがシート２２の右辺に露出
している。The reinforcing dummy internal electrodes 23 and 24 are formed in a band shape from the near side to the far side at the center portion of the dielectric ceramic sheet 22 on the left side and on the right side, respectively. The drawers 23a and 24a are exposed on the near side of the sheet 22, and the other drawer 23
b, 24b are exposed on the inner side of the sheet 22. The ground internal electrode 25 is formed in a large area on the surface of the dielectric ceramic sheet 22, and one of the lead portions 25 a is exposed at the center of the front side of the sheet 22, and the other lead portion 25 b is formed on the surface of the sheet 22. It is exposed at the center of the back side. The signal internal electrode 26 is formed of the dielectric ceramic sheet 2.
2 is formed in a band shape from the left side to the right side at one position, and one of the drawers 26a is exposed on the left side of the sheet 22, and the other drawer 26b is exposed on the right side of the sheet 22.
【００１７】誘電体セラミックシート２２は、図３に示
すように積み重ねられた後、一体的に焼成され、図４に
示した積層体３１とされる。積層体３１の左右の側面部
には入力外部電極３２、出力外部電極３３が乾式めっき
法にて形成され、積層体３１の手前側及び奥側の側面部
にはそれぞれグランド外部電極３４，３５が乾式めっき
法にて形成される。The dielectric ceramic sheets 22 are stacked as shown in FIG. 3 and then integrally fired to form a laminate 31 shown in FIG. Input external electrodes 32 and output external electrodes 33 are formed on the left and right side surfaces of the laminated body 31 by dry plating, and ground external electrodes 34 and 35 are formed on the front and rear side surfaces of the laminated body 31, respectively. It is formed by a dry plating method.
【００１８】入力外部電極３２は信号内部電極２６の引
出し部２６ａに接続され、出力外部電極３３は信号内部
電極２６の引出し部２６ｂに接続され、グランド外部電
極３４はグランド内部電極２５の引出し部２５ａと補強
用ダミー内部電極２３，２４の引出し部２３ａ，２４ａ
に接続され、グランド外部電極３５はグランド内部電極
２５の引出し部２５ｂと補強用ダミー内部電極２３，２
４の引出し部２３ｂ，２４ｂに接続される。さらに、補
強用ダミー内部電極２３，２４の引出し部２３ａ，２４
ａ、２３ｂ，２４ｂの一部がそれぞれグランド外部電極
３４，３５からはみ出している。The input external electrode 32 is connected to the lead 26a of the signal internal electrode 26, the output external electrode 33 is connected to the lead 26b of the signal internal electrode 26, and the ground external electrode 34 is connected to the lead 25a of the ground internal electrode 25. And lead portions 23a and 24a of reinforcing dummy internal electrodes 23 and 24
And the ground external electrode 35 is connected to the lead portion 25 b of the ground internal electrode 25 and the reinforcing dummy internal electrodes 23 and 2.
4 are connected to the drawers 23b and 24b. Further, the lead portions 23a, 24 of the reinforcing dummy internal electrodes 23, 24 are provided.
A part of a, 23b, 24b protrudes from the ground external electrodes 34, 35, respectively.
【００１９】こうして得られた積層型３端子コンデンサ
２１は、信号内部電極２６とグランド内部電極２５の間
で静電容量が形成される。補強用ダミー内部電極２３，
２４は、積層体３１の上下両端部近傍でグランド内部電
極２５の外側に配設されており、コンデンサ２１の電気
的特性に殆んど影響を及ぼさない。さらに、補強用ダミ
ー内部電極２３の引出し部２３ａ，２３ｂの一部は、グ
ランド内部電極２５の引出し部２５ａ，２５ｂの左側縁
部とオーバラップしている。同様に、補強用ダミー内部
電極２４の引出し部２４ａ，２４ｂの一部は、グランド
内部電極の引出し部２５ａ，２５ｂの右側縁部とオーバ
ラップしている。補強用ダミー内部電極２３，２４は、
その引出し部２３ａ，２４ａ、２３ｂ，２４ｂがそれぞ
れグランド外部電極３４，３５の左右両側の縁部に接続
し、くさびの役割をする。従って、グランド外部電極３
４，３５の左右両側の縁部に位置する部分の絶縁体セラ
ミックが補強される。In the multilayer three-terminal capacitor 21 thus obtained, a capacitance is formed between the signal internal electrode 26 and the ground internal electrode 25. Reinforcing dummy internal electrode 23,
Numerals 24 are arranged near the upper and lower ends of the multilayer body 31 and outside the ground internal electrode 25, and hardly affect the electrical characteristics of the capacitor 21. Further, portions of the lead portions 23a and 23b of the reinforcing dummy internal electrode 23 overlap with the left side edges of the lead portions 25a and 25b of the ground internal electrode 25. Similarly, portions of the lead portions 24a and 24b of the reinforcing dummy internal electrode 24 overlap the right side edges of the lead portions 25a and 25b of the ground internal electrode. The reinforcing dummy internal electrodes 23 and 24 are
The lead portions 23a, 24a, 23b, 24b are connected to the left and right edges of the ground external electrodes 34, 35, respectively, and serve as wedges. Therefore, the ground external electrode 3
The portions of the insulating ceramic located at the left and right edges of the 4, 35 are reinforced.
【００２０】以上の構成からなるコンデンサ２１は、前
記第１実施形態のコンデンサ１と同様の作用効果を奏す
ると共に、さらに、補強用ダミー内部電極２３，２４の
引出し部２３ａ，２４ａ、２３ｂ，２４ｂの一部がそれ
ぞれグランド外部電極３４，３５からはみ出しているの
で、グランド外部電極３４，３５の縁部の密着強度がア
ップし、グランド外部電極３４，３５の縁部が積層体３
１から剥れる心配もない。The capacitor 21 having the above-described structure has the same operation and effect as the capacitor 1 of the first embodiment, and furthermore, the lead-out portions 23a, 24a, 23b, 24b of the reinforcing dummy internal electrodes 23, 24. Since the portions protrude from the ground external electrodes 34 and 35, the adhesion strength of the edges of the ground external electrodes 34 and 35 is increased, and the edges of the ground external electrodes 34 and 35 are stacked.
There is no worry about peeling off from one.
【００２１】［第３実施形態、図５及び図６］図５に示
すように、積層型３端子コンデンサ４１は、グランド内
部電極５１及び補強用ダミー内部電極４３，４４，４
５，４６を表面に設けた誘電体セラミックシート４２
と、信号内部電極５２及び補強用ダミー内部電極４７，
４８，４９，５０を表面に設けた誘電体セラミックシー
ト４２と、保護用誘電体セラミックシート４２等にて構
成されている。[Third Embodiment, FIGS. 5 and 6] As shown in FIG. 5, the multilayer three-terminal capacitor 41 includes a ground internal electrode 51 and reinforcing dummy internal electrodes 43, 44, and 4.
Dielectric ceramic sheet 42 provided with 5, 46 on its surface
And the signal internal electrode 52 and the reinforcing dummy internal electrode 47,
It is composed of a dielectric ceramic sheet 42 provided on the surface with 48, 49, 50, a protective dielectric ceramic sheet 42 and the like.
【００２２】グランド内部電極５１は、誘電体セラミッ
クシート４２の表面に広面積に形成され、その一方の引
出し部５１ａがシート４２の手前側の辺の中央部に露出
し、他方の引出し部５１ｂがシート４２の奥側の辺の中
央部に露出している。補強用ダミー内部電極４３〜４６
は、シート４２の同一面にグランド内部電極５１と共に
形成されており、それぞれシート２の手前側の辺及び奥
側の辺の中央部左寄りの位置及び右寄りの位置に露出し
ている。The ground internal electrode 51 is formed in a wide area on the surface of the dielectric ceramic sheet 42. One of the lead portions 51a is exposed at the center of the near side of the sheet 42, and the other lead portion 51b is provided. The sheet 42 is exposed at the center of the back side. Reinforcement dummy internal electrodes 43 to 46
Are formed together with the ground internal electrodes 51 on the same surface of the sheet 42 and are exposed at the center left and right positions of the near side and the far side of the sheet 2, respectively.
【００２３】信号内部電極５２は、誘電体セラミックシ
ート４２の中央部の位置に左辺から右辺に渡って帯状に
形成され、その一方の引出し部５２ａがシート４２の左
辺に露出し、他方の引出し部５２ｂがシート４２の右辺
に露出している。補強用ダミー内部電極４７〜５０は、
シート４２の同一面に信号内部電極５２と共に形成され
ており、それぞれシート４２の４隅に露出している。The signal internal electrode 52 is formed in a band shape from the left side to the right side at the center of the dielectric ceramic sheet 42. One of the lead portions 52a is exposed on the left side of the sheet 42 and the other lead portion is provided. 52b is exposed on the right side of the sheet 42. The reinforcing dummy internal electrodes 47 to 50 are
It is formed on the same surface of the sheet 42 together with the signal internal electrodes 52, and is exposed at four corners of the sheet 42, respectively.
【００２４】誘電体セラミックシート４２は、図５に示
すように積み重ねられた後、一体的に焼成され、図６に
示した積層体６１とされる。積層体６１の左右の側面部
には入力外部電極６２、出力外部電極６３が乾式めっき
法にて形成され、積層体６１の手前側及び奥側の側面部
にはそれぞれ外部電極６４，６５が乾式めっき法にて形
成される。After the dielectric ceramic sheets 42 are stacked as shown in FIG. 5, they are integrally fired to form a laminate 61 shown in FIG. An input external electrode 62 and an output external electrode 63 are formed on the left and right side surfaces of the laminate 61 by dry plating, and external electrodes 64 and 65 are provided on the front and rear side surfaces of the laminate 61 respectively. It is formed by a plating method.
【００２５】入力外部電極６２は信号内部電極５２の引
出し部５２ａと補強用ダミー内部電極４７，４８に接続
され、出力外部電極６３は信号内部電極５２の引出し部
５２ｂと補強用ダミー内部電極４９，５０に接続され、
グランド外部電極６４はグランド内部電極５１の引出し
部５１ａと補強用ダミー内部電極４３，４５に接続さ
れ、グランド外部電極６５はグランド内部電極５１の引
出し部５１ｂと補強用ダミー内部電極４４，４６に接続
される。The input external electrode 62 is connected to the lead portion 52a of the signal internal electrode 52 and the reinforcing dummy internal electrodes 47 and 48, and the output external electrode 63 is connected to the lead portion 52b of the signal internal electrode 52 and the reinforcing dummy internal electrodes 49 and 48. Connected to 50,
The ground external electrode 64 is connected to the lead portion 51a of the ground internal electrode 51 and the reinforcing dummy internal electrodes 43, 45, and the ground external electrode 65 is connected to the lead portion 51b of the ground internal electrode 51 and the reinforcing dummy internal electrodes 44, 46. Is done.
【００２６】こうして得られた積層型３端子コンデンサ
４１は、信号内部電極５２とグランド内部電極５１の間
で静電容量が形成される。補強用ダミー内部電極４３〜
５０は、コンデンサ４１の電気的特性に殆んど影響を及
ぼさない。補強用ダミー内部電極４３，４４，４５，４
６はそれぞれグランド外部電極６４，６５の左右両側の
縁部に接続し、くさびの役割をする。補強用ダミー内部
電極４７，４８は、入力外部電極６２の左右両側の縁部
に接続し、くさびの役割をする。同様に、補強用ダミー
内部電極４９，５０は、出力外部電極６３の左右両側の
縁部に接続し、くさびの役割をする。特に、入力外部電
極６２及び出力外部電極６３の折り返し部分も補強用ダ
ミー内部電極４７〜５０に接続されているので、くさび
としての効果は一層効果的である。従って、このコンデ
ンサ４１は前記第１実施形態のコンデンサ１と同様の作
用効果を奏する。また、補強用ダミー内部電極４３〜５
０を、信号内部電極５２やグランド内部電極５１が設け
られた静電体セラミックシート４２に併設したため、そ
の分だけ誘電体セラミックシート４２を省略することが
でき、薄型のコンデンサ４１を得ることができる。The multilayer three-terminal capacitor 41 thus obtained has a capacitance between the signal internal electrode 52 and the ground internal electrode 51. Reinforcing dummy internal electrode 43 ~
50 has almost no effect on the electrical characteristics of the capacitor 41. Reinforcement dummy internal electrodes 43, 44, 45, 4
Numerals 6 are connected to the right and left edges of the ground external electrodes 64 and 65, respectively, and serve as wedges. The reinforcing dummy internal electrodes 47 and 48 are connected to the left and right edges of the input external electrode 62 and serve as wedges. Similarly, the reinforcing dummy internal electrodes 49 and 50 are connected to the left and right edges of the output external electrode 63 and serve as wedges. In particular, since the folded portions of the input external electrode 62 and the output external electrode 63 are also connected to the reinforcing dummy internal electrodes 47 to 50, the effect as a wedge is more effective. Therefore, the capacitor 41 has the same operation and effect as the capacitor 1 of the first embodiment. Also, the reinforcing dummy internal electrodes 43 to 5 are provided.
Since 0 is provided in addition to the electrostatic ceramic sheet 42 provided with the signal internal electrode 52 and the ground internal electrode 51, the dielectric ceramic sheet 42 can be omitted by that much, and the thin capacitor 41 can be obtained. .
【００２７】［他の実施形態］なお、本発明に係る３端
子コンデンサは前記実施形態に限定するものではなく、
その要旨の範囲内で種々に変更することができる。補強
用ダミー内部電極の形状、枚数、配設位置、あるいは積
層位置等は任意であり、例えば、前記第１実施形態のよ
うに、補強用ダミー内部電極３〜８を積層体１１の上下
両端部近傍でかつグランド内部電極９の外側に必らずし
も配設する必要はなく、図７及び図８に示すように、積
層体１１の中央部で二つのグランド内部電極９の間の位
置に配設するものであってもよい。この場合であって
も、補強用ダミー内部電極３〜８はグランド内部電極９
に挟まれており、コンデンサの電気特性に殆んど影響を
及ぼさない。しかし、この補強用ダミー内部電極３〜８
は、必ずしもグランド内部電極９に挟まれていなくとも
よい。[Other Embodiments] The three-terminal capacitor according to the present invention is not limited to the above-described embodiment.
Various changes can be made within the scope of the gist. The shape, the number, the arrangement position, the lamination position, and the like of the reinforcing dummy internal electrodes are arbitrary. For example, as in the first embodiment, the reinforcing dummy internal electrodes 3 to 8 are connected to the upper and lower ends of the laminated body 11. It is not always necessary to dispose it near and outside the ground internal electrode 9, as shown in FIGS. 7 and 8, at a position between the two ground internal electrodes 9 at the center of the laminate 11. It may be provided. Even in this case, the reinforcing dummy internal electrodes 3 to 8 are connected to the ground internal electrodes 9.
And has almost no effect on the electrical characteristics of the capacitor. However, the reinforcing dummy internal electrodes 3 to 8
Need not necessarily be sandwiched between the ground internal electrodes 9.
【００２８】また、入力外部電極、出力外部電極及びグ
ランド外部電極の少なくともいずれか一つの外部電極の
縁部に、補強用ダミー内部電極が接続されていれば効果
が得られることになり、全ての外部電極の縁部に補強用
ダミー内部電極が接続している必要はない。The effect can be obtained if the reinforcing dummy internal electrode is connected to the edge of at least one of the input external electrode, the output external electrode and the ground external electrode. It is not necessary that the reinforcing dummy internal electrode is connected to the edge of the external electrode.
【００２９】[0029]
【発明の効果】以上の説明で明らかなように、本発明に
よれば、入力外部電極、出力外部電極及びグランド外部
電極の少なくともいずれか一つの外部電極の縁部に、補
強用ダミー内部電極を接続したので、半田の熱収縮によ
る応力が絶縁体セラミックに加わっても、補強用のダミ
ー内部電極がくさびの役割を果たし、絶縁体セラミック
の剥れや欠けから３端子コンデンサを保護することがで
きる。また、補強用ダミー内部電極の、積層体側面部に
露出した端部を、この補強用ダミー内部電極に接続して
いる外部電極からはみ出させることにより、外部電極の
縁部の剥れも防止することができる。この結果、剥れや
欠けによって信号内部電極とグランド外部電極との間隔
が短かくなる等の心配がなくなり、耐電圧信頼性が低下
する等の不具合がなくなる。As is apparent from the above description, according to the present invention, a reinforcing dummy internal electrode is provided at the edge of at least one of the input external electrode, the output external electrode and the ground external electrode. Since the connection is made, even if the stress due to the thermal shrinkage of the solder is applied to the insulating ceramic, the reinforcing dummy internal electrode serves as a wedge, and can protect the three-terminal capacitor from peeling or chipping of the insulating ceramic. . Further, the edge of the reinforcing dummy internal electrode, which is exposed on the side surface of the laminate, protrudes from the external electrode connected to the reinforcing dummy internal electrode, thereby preventing the edge of the external electrode from peeling off. be able to. As a result, there is no fear that the distance between the signal internal electrode and the ground external electrode becomes short due to peeling or chipping, and there is no problem such as a decrease in withstand voltage reliability.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明に係る３端子コンデンサの第１実施形態
を示す分解斜視図。FIG. 1 is an exploded perspective view showing a first embodiment of a three-terminal capacitor according to the present invention.
【図２】図１に示した３端子コンデンサの外観を示す斜
視図。FIG. 2 is an exemplary perspective view showing the appearance of the three-terminal capacitor shown in FIG. 1;
【図３】本発明に係る３端子コンデンサの第２実施形態
を示す分解斜視図。FIG. 3 is an exploded perspective view illustrating a second embodiment of the three-terminal capacitor according to the present invention.
【図４】図３に示した３端子コンデンサの外観を示す斜
視図。FIG. 4 is an exemplary perspective view showing the appearance of the three-terminal capacitor shown in FIG. 3;
【図５】本発明に係る３端子コンデンサの第３実施形態
を示す分解斜視図。FIG. 5 is an exploded perspective view showing a third embodiment of the three-terminal capacitor according to the present invention.
【図６】図５に示した３端子コンデンサの外観を示す斜
視図。FIG. 6 is an exemplary perspective view showing an appearance of the three-terminal capacitor shown in FIG. 5;
【図７】他の実施形態を示す分解斜視図。FIG. 7 is an exploded perspective view showing another embodiment.
【図８】図７に示した３端子コンデンサの外観を示す斜
視図。FIG. 8 is an exemplary perspective view showing the appearance of the three-terminal capacitor shown in FIG. 7;
【図９】従来の３端子コンデンサを示す分解斜視図。FIG. 9 is an exploded perspective view showing a conventional three-terminal capacitor.
【図１０】図９に示した３端子コンデンサの外観を示す
斜視図。FIG. 10 is an exemplary perspective view showing the appearance of the three-terminal capacitor shown in FIG. 9;
１，２１，４１…積層型３端子コンデンサ ２，２２，４２…誘電体セラミックシート ３〜８，２３，２４，４３〜５０…補強用ダミー内部電
極 ３ａ〜８ａ、２３ａ，２４ａ…引出し部 ９，２５，５１…グランド内部電極 ９ａ，９ｂ，２５ａ，２５ｂ，５１ａ，５１ｂ…引出し
部 １０，２６，５２…信号内部電極 １０ａ，１０ｂ，２６ａ，２６ｂ，５２ａ，５２ｂ…引
出し部 １１，３１，６１…積層体 １２，３２，６２…入力外部電極 １３，３３，６３…出力外部電極 １４，１５，３４，３５，６４，６５…グランド外部電
極1,2,41 ... Laminated type three-terminal capacitor 2,22,42 ... Dielectric ceramic sheet 3-8,23,24,43-50 ... Reinforcement dummy internal electrode 3a-8a, 23a, 24a ... Pull out part 9, 25, 51 ... ground internal electrodes 9a, 9b, 25a, 25b, 51a, 51b ... lead parts 10, 26, 52 ... signal internal electrodes 10a, 10b, 26a, 26b, 52a, 52b ... lead parts 11, 31, 61 ... Laminated body 12, 32, 62 ... input external electrode 13, 33, 63 ... output external electrode 14, 15, 34, 35, 64, 65 ... ground external electrode
Claims (2)
ランド内部電極とを積み重ねて構成した積層体と、 前記積層体の側面部に設けられ、前記信号内部電極の一
方の露出部に接続した乾式めっき入力外部電極と、 前記積層体の側面部に設けられ、前記信号内部電極の他
方の露出部に接続した乾式めっき出力外部電極と、 前記積層体の側面部に設けられ、前記グランド内部電極
の露出部に接続した乾式めっきグランド外部電極と、 前記積層体内に埋設され、前記積層体の側面部に露出し
た端部が前記入力外部電極、出力外部電極及びグランド
外部電極の少なくとも一つの外部電極の縁部に接続した
補強用ダミー内部電極と、 を備えたことを特徴とする３端子コンデンサ。1. A laminate comprising an insulating ceramic film, a signal internal electrode, and a ground internal electrode stacked on each other, and a dry type provided on a side surface of the laminate and connected to one exposed portion of the signal internal electrode. A plating input external electrode, a dry plating output external electrode provided on a side surface of the laminate, and connected to the other exposed portion of the signal internal electrode, and a dry plating output external electrode provided on a side surface of the laminate, A dry plating ground external electrode connected to an exposed portion, and an end portion embedded in the laminate and exposed to a side surface portion of the laminate, the input external electrode, the output external electrode, and at least one external electrode of the ground external electrode. 3. A three-terminal capacitor, comprising: a reinforcing dummy internal electrode connected to an edge.
ダミー内部電極の端部が、この補強用ダミー内部電極に
接続している外部電極からはみ出していることを特徴と
する請求項１記載の３端子コンデンサ。2. An end portion of the reinforcing dummy internal electrode exposed on the side surface of the stacked body protrudes from an external electrode connected to the reinforcing dummy internal electrode. 3 terminal capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8312039A JPH10154632A (en) | 1996-11-22 | 1996-11-22 | Three-terminal capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8312039A JPH10154632A (en) | 1996-11-22 | 1996-11-22 | Three-terminal capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10154632A true JPH10154632A (en) | 1998-06-09 |
Family
ID=18024486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8312039A Pending JPH10154632A (en) | 1996-11-22 | 1996-11-22 | Three-terminal capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10154632A (en) |
Cited By (9)
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|---|---|---|---|---|
| US6806794B2 (en) | 2000-08-12 | 2004-10-19 | Murata Manufacturing Co., Ltd. | Noise filter |
| GB2383198B (en) * | 2001-06-21 | 2005-05-25 | Murata Manufacturing Co | Noise filter |
| KR100593889B1 (en) * | 2003-12-24 | 2006-06-28 | 삼성전기주식회사 | Multilayer Ceramic Capacitors with Reinforcement Patterns |
| KR101187469B1 (en) | 2010-02-19 | 2012-10-02 | 가부시키가이샤 무라타 세이사쿠쇼 | Capacitor and method for manufacturing the same |
| US8675341B2 (en) | 2011-01-26 | 2014-03-18 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
| US9666366B2 (en) | 2002-04-15 | 2017-05-30 | Avx Corporation | Method of making multi-layer electronic components with plated terminations |
| JP2018014430A (en) * | 2016-07-21 | 2018-01-25 | Tdk株式会社 | Laminated feedthrough capacitor and electronic component device |
| WO2018063632A1 (en) * | 2016-09-30 | 2018-04-05 | Intel Corporation | Three capacitor stack and associated methods |
| US10340081B2 (en) | 2016-05-31 | 2019-07-02 | Murata Manufacturing Co., Ltd. | Ceramic capacitor |
-
1996
- 1996-11-22 JP JP8312039A patent/JPH10154632A/en active Pending
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6806794B2 (en) | 2000-08-12 | 2004-10-19 | Murata Manufacturing Co., Ltd. | Noise filter |
| GB2383198B (en) * | 2001-06-21 | 2005-05-25 | Murata Manufacturing Co | Noise filter |
| US7091800B2 (en) | 2001-06-21 | 2006-08-15 | Murata Manufacturing Co., Ltd. | Noise filter |
| US9666366B2 (en) | 2002-04-15 | 2017-05-30 | Avx Corporation | Method of making multi-layer electronic components with plated terminations |
| US11195659B2 (en) | 2002-04-15 | 2021-12-07 | Avx Corporation | Plated terminations |
| US10366835B2 (en) | 2002-04-15 | 2019-07-30 | Avx Corporation | Plated terminations |
| US10020116B2 (en) | 2002-04-15 | 2018-07-10 | Avx Corporation | Plated terminations |
| KR100593889B1 (en) * | 2003-12-24 | 2006-06-28 | 삼성전기주식회사 | Multilayer Ceramic Capacitors with Reinforcement Patterns |
| KR101187469B1 (en) | 2010-02-19 | 2012-10-02 | 가부시키가이샤 무라타 세이사쿠쇼 | Capacitor and method for manufacturing the same |
| US8508912B2 (en) | 2010-02-19 | 2013-08-13 | Murata Manufacturing Co., Ltd. | Capacitor and method for manufacturing the same |
| US8902564B2 (en) | 2011-01-26 | 2014-12-02 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
| KR101540400B1 (en) * | 2011-01-26 | 2015-07-29 | 가부시키가이샤 무라타 세이사쿠쇼 | Multilayer ceramic electronic component |
| KR101457898B1 (en) * | 2011-01-26 | 2014-11-07 | 가부시키가이샤 무라타 세이사쿠쇼 | Multilayer ceramic electronic component |
| US8675341B2 (en) | 2011-01-26 | 2014-03-18 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
| US10340081B2 (en) | 2016-05-31 | 2019-07-02 | Murata Manufacturing Co., Ltd. | Ceramic capacitor |
| JP2018014430A (en) * | 2016-07-21 | 2018-01-25 | Tdk株式会社 | Laminated feedthrough capacitor and electronic component device |
| WO2018063632A1 (en) * | 2016-09-30 | 2018-04-05 | Intel Corporation | Three capacitor stack and associated methods |
| US9960224B2 (en) | 2016-09-30 | 2018-05-01 | Intel Corporation | Three capacitor stack and associated methods |
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