JPH0964514A - Production of printed wiring board - Google Patents

Production of printed wiring board

Info

Publication number
JPH0964514A
JPH0964514A JP22011895A JP22011895A JPH0964514A JP H0964514 A JPH0964514 A JP H0964514A JP 22011895 A JP22011895 A JP 22011895A JP 22011895 A JP22011895 A JP 22011895A JP H0964514 A JPH0964514 A JP H0964514A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
insulating substrate
transfer plate
organic film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP22011895A
Other languages
Japanese (ja)
Inventor
Kaoru Tone
薫 戸根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP22011895A priority Critical patent/JPH0964514A/en
Publication of JPH0964514A publication Critical patent/JPH0964514A/en
Withdrawn legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To obtain a method for producing a printed wiring board in which a transfer plate can be stripped easily without stripping a conductor circuit from the insulating board. SOLUTION: In the method for producing a printed wiring board where a conductor circuit 5 is embedded in an insulating board 6, a resist layer 4 is formed in the pattern reversely to a desired circuit pattern on a transfer plate 1 produced by applying a metal film 3 on the surface of an organic film 2 and a conductor metal layer, for fabricating the conductor circuit 5, is formed on the transfer plate 1 where the resist layer 4 is not formed. The transfer plate 1, from which the resist layer 4 is removed, is then bonded to a prepreg 6a becoming the insulating board 6 when the conductor circuit is embedded. Subsequently, the organic film 2 is stripped from the insulating board 6 followed by removal of the residual metal film 3 on the insulating board 6 by soft etching.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明はプリント配線板の製
造方法に関し、具体的には導体回路が絶縁基板内に埋没
形成したプリント配線板の製造方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board in which a conductor circuit is buried in an insulating substrate.

【0002】[0002]

【従来の技術】導体回路が絶縁基板内に埋没形成した、
いわゆるフラッシュサーキットと称される構造のプリン
ト配線板が知られている。この構造のプリント配線板の
製造方法は、ステンレスやチタン等の導電性材料からな
る転写板に所望の回路パターンの裏返しパターンのレジ
スト層を形成し、次に電気メッキによりレジスト層のな
い転写板上に導体回路を形成した後に、上記レジスト層
を除去した転写板と、導体回路を埋没させる状態で絶縁
基板となるプリプレグを重ね、接合成形した後に、上記
絶縁基板から上記転写板を剥離除去している。
2. Description of the Related Art Conductor circuits are buried in an insulating substrate,
A printed wiring board having a structure called a so-called flash circuit is known. The method for manufacturing a printed wiring board having this structure is such that a resist layer having a reverse pattern of a desired circuit pattern is formed on a transfer plate made of a conductive material such as stainless steel or titanium, and then electroplating is performed on the transfer plate without the resist layer. After forming a conductor circuit on the transfer plate, the transfer plate from which the resist layer has been removed and a prepreg to be an insulating substrate in a state where the conductor circuit is buried are overlaid and bonded, and then the transfer plate is peeled and removed from the insulating substrate. There is.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記製造方法
にあっては、転写板を剥離除去する際に、転写板と共に
導体回路が絶縁基板から剥離し易い問題がある。これ
は、電気メッキにより導体回路を形成する際に電極とし
て利用できる利点から金属からなる転写板を用いるが、
接合成形の際に転写板と導体回路に金属拡散が生じ、密
着強度が高まるためと推測される。
However, the above manufacturing method has a problem that the conductor circuit is easily separated from the insulating substrate together with the transfer plate when the transfer plate is separated and removed. This uses a transfer plate made of metal because it can be used as an electrode when forming a conductor circuit by electroplating.
It is presumed that metal is diffused in the transfer plate and the conductor circuit during the joint molding, and the adhesion strength is increased.

【0004】本発明は上述の事実に鑑みてなされたもの
で、その目的とするところは、導体回路が絶縁基板から
剥離することなく、転写板を容易に剥離除去できるプリ
ント配線板の製造方法を提供することにある。
The present invention has been made in view of the above facts, and an object of the present invention is to provide a method for manufacturing a printed wiring board which can easily peel and remove the transfer board without peeling the conductor circuit from the insulating substrate. To provide.

【0005】[0005]

【課題を解決するための手段】本発明の請求項1に係る
プリント配線板の製造方法は、導体回路が絶縁基板内に
埋没形成するプリント配線板の製造方法であって、有機
フィルムの表面に金属膜を形成した転写板上に、所望の
回路パターンの裏返しパターンのレジスト層を形成し、
上記レジスト層のない転写板上に、導体回路となる導体
金属層を形成し、上記レジスト層を除去した転写板を、
導体回路が埋没する状態で絶縁基板となるプリプレグに
接合成形した後に、上記絶縁基板から有機フィルムを剥
離除去し、さらに、上記絶縁基板の上に残存する上記金
属膜をソフトエッチングにより除去することを特徴とす
る。
A method for manufacturing a printed wiring board according to claim 1 of the present invention is a method for manufacturing a printed wiring board in which a conductor circuit is buried in an insulating substrate, and On the transfer plate on which the metal film is formed, form the resist layer of the inside out pattern of the desired circuit pattern,
On the transfer plate without the resist layer, a conductive metal layer to be a conductor circuit is formed, and the transfer plate from which the resist layer has been removed,
After bonding and molding to a prepreg to be an insulating substrate in a state where the conductor circuit is buried, the organic film is peeled off from the insulating substrate, and further, the metal film remaining on the insulating substrate is removed by soft etching. Characterize.

【0006】本発明の請求項2に係るプリント配線板の
製造方法は、請求項1記載のプリント配線板の製造方法
において、上記有機フィルムの表面粗度が、0.03μ
m〜5μmの範囲であることを特徴とする。
A method of manufacturing a printed wiring board according to a second aspect of the present invention is the method of manufacturing a printed wiring board according to the first aspect, wherein the surface roughness of the organic film is 0.03 μm.
It is characterized by being in the range of m to 5 μm.

【0007】本発明の請求項3に係るプリント配線板の
製造方法は、請求項1又は請求項2記載のプリント配線
板の製造方法において、上記有機フィルムが、ポリイミ
ド、ポリエチレン、ポリプロピレン、テフロン、ポリエ
チレンテレフタレートのフィルムのうちの少なくとも1
種であることを特徴とする。
A method for manufacturing a printed wiring board according to claim 3 of the present invention is the method for manufacturing a printed wiring board according to claim 1 or 2, wherein the organic film is polyimide, polyethylene, polypropylene, Teflon, polyethylene. At least one of the films of terephthalate
It is a seed.

【0008】本発明の請求項4に係るプリント配線板の
製造方法は、請求項1乃至請求項3いずれか記載のプリ
ント配線板の製造方法において、上記転写板が、金属ま
たは樹脂からなる補強板と有機フィルムを重ねた有機フ
ィルムの表面に金属膜を形成したものであることを特徴
とする。
A method for manufacturing a printed wiring board according to claim 4 of the present invention is the method for manufacturing a printed wiring board according to any one of claims 1 to 3, wherein the transfer plate is a reinforcing plate made of metal or resin. It is characterized in that a metal film is formed on the surface of an organic film in which an organic film and an organic film are stacked.

【0009】本発明の請求項5に係るプリント配線板の
製造方法は、請求項4記載のプリント配線板の製造方法
において、上記導体回路を埋没させた絶縁基板が凹凸形
状を有するプリント配線板の製造方法であって、請求項
4記載の補強板が立体形状であることを特徴とする。
A method for manufacturing a printed wiring board according to a fifth aspect of the present invention is the method for manufacturing a printed wiring board according to the fourth aspect, wherein the insulating substrate in which the conductor circuit is buried has an uneven shape. A manufacturing method, wherein the reinforcing plate according to claim 4 has a three-dimensional shape.

【0010】[0010]

【実施の形態】本発明を図面に基づいて説明する。図1
(a)〜(f)は本発明の第1の実施の形態をステップ
毎に示した要部の断面図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings. FIG.
(A)-(f) is sectional drawing of the principal part which showed the 1st Embodiment of this invention for every step.

【0011】本発明の対象となるプリント配線板は、図
1(f)に示す、導体回路5が絶縁基板6内に埋没形成
した、いわゆるフラッシュサーキットと称される構造の
プリント配線板である。
The printed wiring board to which the present invention is applied is a printed wiring board shown in FIG. 1 (f), which has a structure called a flash circuit in which a conductor circuit 5 is embedded in an insulating substrate 6.

【0012】本発明においては、図1(a)に示す、有
機フィルム2の表面に金属膜3を形成した転写板1が用
いられる。上記有機フィルム2としては、例えば、ポリ
イミド、ポリエチレン、ポリプロピレン、テフロン、ポ
リエチレンテレフタレートのフィルムが挙げられる。上
記有機フィルム2の表面粗度は、後述する後工程で形成
される導体回路5が有機フィルム2に密着及び剥離する
に必要な強度により適宜決定されるが、平均粗度(R
a)として0.03μm〜5μmの範囲が適当である。
この範囲であると、導体回路5となる導体金属層が接合
成形中に剥離しない程度に密着性を有し、成形後は絶縁
基板6から容易に剥離する程度の密着強度となる。な
お、上記平均粗度はJIS−B−0601の平均粗度R
aで規定されているものである。
In the present invention, the transfer plate 1 shown in FIG. 1A, in which the metal film 3 is formed on the surface of the organic film 2, is used. Examples of the organic film 2 include polyimide, polyethylene, polypropylene, Teflon, and polyethylene terephthalate films. The surface roughness of the organic film 2 is appropriately determined by the strength required for the conductor circuit 5 formed in a later step described below to adhere and peel to the organic film 2, but the average roughness (R
The range of 0.03 μm to 5 μm is suitable as a).
Within this range, the conductive metal layer to be the conductor circuit 5 has such adhesiveness that it does not peel off during the joining and molding, and the adhesive strength is such that it is easily peeled off from the insulating substrate 6 after the molding. The average roughness is the average roughness R of JIS-B-0601.
It is defined by a.

【0013】上記有機フィルム2の表面に金属膜3を形
成する方法は、例えば、化学金属メッキ、真空蒸着、ス
パッタリング蒸着等による方法が挙げられる。上記金属
膜3を構成する材料としては、銅、アルミ、錫等が例示
される。上記金属膜3の膜厚は、後述する電気メッキの
電極として機能し、且つ、ソフトエッチングが容易にで
きることから、0.1〜10μm程度が適している。
Examples of the method for forming the metal film 3 on the surface of the organic film 2 include chemical metal plating, vacuum deposition, and sputtering deposition. Examples of the material forming the metal film 3 include copper, aluminum and tin. The film thickness of the metal film 3 is preferably about 0.1 to 10 μm because it functions as an electrode for electroplating described later and facilitates soft etching.

【0014】本発明においては、図1(b)に示す如
く、上記有機フィルム2の表面に金属膜3を形成した転
写板1の上に、所望の回路パターンの裏返しパターンの
レジスト層4を形成する。上記レジスト層4の形成は、
例えば、ドライフィルムを用い、露光及び現像を行えば
よい。
In the present invention, as shown in FIG. 1B, a resist layer 4 having a reverse pattern of a desired circuit pattern is formed on a transfer plate 1 having a metal film 3 formed on the surface of the organic film 2. To do. The formation of the resist layer 4 is
For example, a dry film may be used for exposure and development.

【0015】次に、図1(c)に示す如く、上記レジス
ト層4のない転写板1の上に、導体回路5となる導体金
属層を形成する。上記導体金属層の形成は電気メッキに
より形成すればよい。その後、上記レジスト層4を除去
すると、導体回路5が形成された転写板1が得られる。
Next, as shown in FIG. 1C, a conductor metal layer to be the conductor circuit 5 is formed on the transfer plate 1 without the resist layer 4. The conductor metal layer may be formed by electroplating. Then, when the resist layer 4 is removed, the transfer plate 1 on which the conductor circuit 5 is formed is obtained.

【0016】図1(d)に示す如く、上記レジスト層4
を除去した転写板1の導体回路5が形成された面に、プ
リプレグ6aを複数枚重ね、加熱加圧する。上記加熱加
圧すると、プリプレグ6aの樹脂が完全硬化した絶縁基
板6中に、導体回路5が埋没される。上記プリプレグ6
aは、基材に樹脂を含浸し半乾燥したものである。上記
樹脂としてはエポキシ樹脂、ポリイミド樹脂、フッソ樹
脂、フェノール樹脂、不飽和ポリエステル樹脂、PPO
樹脂等の単独、変性物、混合物等が挙げられる。上記基
材としては、特に限定するものではないが、ガラス繊維
等の無機材料の方が耐熱性、耐湿性等に優れて好まし
い。また、耐熱性に優れる有機繊維布基材及びこれらの
混合物を用いることもできる。
As shown in FIG. 1D, the resist layer 4 is formed.
A plurality of prepregs 6a are superposed on the surface of the transfer plate 1 from which the conductor circuit 5 is formed, and are heated and pressed. When the heating and pressing are performed, the conductor circuit 5 is buried in the insulating substrate 6 in which the resin of the prepreg 6a is completely cured. Above prepreg 6
In a, a base material is impregnated with a resin and semi-dried. As the above resin, epoxy resin, polyimide resin, fluorine resin, phenol resin, unsaturated polyester resin, PPO
Examples of the resin include single substances, modified products, and mixtures. The base material is not particularly limited, but an inorganic material such as glass fiber is preferable because it is superior in heat resistance and moisture resistance. Further, an organic fiber cloth base material having excellent heat resistance and a mixture thereof can also be used.

【0017】次に、図1(e)に示す如く、上記絶縁基
板6から有機フィルム2を物理的に剥離除去する。さら
に、絶縁基板6上に残存する上記金属膜3をソフトエッ
チングにより除去すると、図1(f)に示す導体回路5
が絶縁基板6内に埋没形成されたプリント配線板が得ら
れる。
Next, as shown in FIG. 1E, the organic film 2 is physically peeled off from the insulating substrate 6. Further, when the metal film 3 remaining on the insulating substrate 6 is removed by soft etching, the conductor circuit 5 shown in FIG.
A printed wiring board in which is embedded in the insulating substrate 6 is obtained.

【0018】上述の如く、本発明は転写板1に表面に金
属膜3を形成した有機フィルム2を用いるので、金属膜
3は後工程の電気メッキで導体回路を形成する際に電極
として利用できる利点を有すると共に、接合成形の際に
転写板1と導体回路5間の密着強度を低く抑えることが
できる。その結果、導体回路5が絶縁基板6から剥離す
ることなく、転写板1を容易に剥離除去できる。
As described above, since the present invention uses the organic film 2 having the metal film 3 formed on the surface of the transfer plate 1, the metal film 3 can be used as an electrode when a conductor circuit is formed by electroplating in a later step. In addition to having an advantage, the adhesion strength between the transfer plate 1 and the conductor circuit 5 can be suppressed to be low at the time of joint molding. As a result, the transfer plate 1 can be easily peeled and removed without peeling the conductor circuit 5 from the insulating substrate 6.

【0019】本発明の第2の実施の形態を図2に基づい
て説明する。図2(a)〜(d)は本発明の第2の実施
の形態をステップ毎に示した要部の断面図である。
A second embodiment of the present invention will be described with reference to FIG. 2 (a) to 2 (d) are cross-sectional views of the main parts showing the second embodiment of the present invention step by step.

【0020】本発明においては、図2(a)に示す如
く、転写板1が、金属または樹脂からなる補強板7に有
機フィルム2を重ね、上記有機フィルム2の表面に金属
膜3を形成したものを用いる。さらに、上記補強板7は
有機フィルム2側に凸条に突き出た立体形状をしてお
り、従って転写板1全体も凸条に突き出た立体形状とな
っている。上記補強板7に有機フィルム2を重ねる方法
は、補強板7に有機フィルム2を真空密着させても、接
着剤を塗布した有機フィルム2を補強板7に貼着しても
よい。その後、上述と同様に金属膜3を形成すればよ
い。上記補強板7を有すると、有機フィルム2が接合成
形の際に変形する恐れがない。
In the present invention, as shown in FIG. 2 (a), the transfer plate 1 is such that the organic film 2 is superposed on the reinforcing plate 7 made of metal or resin, and the metal film 3 is formed on the surface of the organic film 2. Use one. Further, the reinforcing plate 7 has a three-dimensional shape protruding to the organic film 2 side, so that the entire transfer plate 1 also has a three-dimensional shape protruding to the protruding line. As a method of stacking the organic film 2 on the reinforcing plate 7, the organic film 2 may be vacuum-adhered to the reinforcing plate 7 or the organic film 2 coated with an adhesive may be attached to the reinforcing plate 7. After that, the metal film 3 may be formed as described above. When the reinforcing plate 7 is provided, the organic film 2 is not likely to be deformed during the joining molding.

【0021】その後、上述の第1の実施の形態と同様の
方法により、図2(b)に示す如く、上記転写板1の上
に、所望の回路パターンの裏返しパターンのレジスト層
4を形成し、上記レジスト層4のない転写板1の上に、
導体回路5となる導体金属層を形成する。次に図2
(c)に示す如く、上記レジスト層4を除去した転写板
1の導体回路5が形成された面に、プリプレグ6aを複
数枚重ね、加熱加圧した後に、絶縁基板6から有機フィ
ルム2を物理的に剥離除去する。さらに、絶縁基板6上
に残存する上記金属膜3をソフトエッチングにより除去
すると、図2(d)に示す導体回路5が絶縁基板6内に
埋没形成させた絶縁基板6に凹条の窪みを有するプリン
ト配線板が得られる。上記絶縁基板6が凹凸形状を有す
るプリント配線板は、半導体チップを搭載したPGA
(ピングリッドアレイ)等に用いることができる。
After that, by the same method as in the above-described first embodiment, a resist layer 4 having a reverse pattern of a desired circuit pattern is formed on the transfer plate 1 as shown in FIG. 2B. , On the transfer plate 1 without the resist layer 4,
A conductor metal layer to be the conductor circuit 5 is formed. Next, FIG.
As shown in (c), a plurality of prepregs 6a are superposed on the surface of the transfer plate 1 from which the resist layer 4 has been removed, on which the conductor circuits 5 are formed, and after heating and pressing, the organic film 2 is physically removed from the insulating substrate 6. Peeling off. Further, when the metal film 3 remaining on the insulating substrate 6 is removed by soft etching, the conductor circuit 5 shown in FIG. 2D has recessed dents in the insulating substrate 6 buried in the insulating substrate 6. A printed wiring board is obtained. The printed wiring board in which the insulating substrate 6 has an uneven shape is a PGA on which a semiconductor chip is mounted.
(Pin grid array) and the like.

【0022】上述の如く、本発明にあっては、導体回路
5が絶縁基板6から剥離することなく、転写板1を容易
に剥離除去できる。このようにして、導体回路5が絶縁
基板6内に埋没形成したプリント配線板が得られる。
As described above, in the present invention, the transfer plate 1 can be easily peeled and removed without the conductor circuit 5 peeling from the insulating substrate 6. In this way, a printed wiring board in which the conductor circuit 5 is embedded in the insulating substrate 6 is obtained.

【0023】[0023]

【実施例】【Example】

実施例1 有機フィルムとして、厚さ0.1mmのポリイミドフィ
ルムを用いた。上記有機フィルムをサンドペーパで研磨
し、表面粗度Raを0.3μmとした。上記有機フィル
ムをパラジウムの含有液に浸漬後、EDTA、ホルマリ
ン、及び、硫酸銅を主成分とする無電解銅めっき液に1
0分間浸漬し、膜厚3μmの銅の金属膜を形成し、これ
を転写板とした。
Example 1 As the organic film, a polyimide film having a thickness of 0.1 mm was used. The above organic film was polished with sandpaper to have a surface roughness Ra of 0.3 μm. After immersing the above organic film in a palladium-containing solution, an electroless copper plating solution containing EDTA, formalin, and copper sulfate as a main component was used.
It was immersed for 0 minutes to form a copper metal film having a film thickness of 3 μm, which was used as a transfer plate.

【0024】上記転写板の上にアルカリ現像型ドライフ
ィルムを用い、露光及び現像を行い、厚さ30μmのレ
ジスト層を形成した。上記レジスト層のない転写板の上
に、電流密度2A/dm2 の条件で60分間電気銅メッ
キを行い、厚さ30μmの導体回路となる導体金属層を
形成した。さらに、2重量%の水酸化ナトリウムの水溶
液に浸漬し、レジスト層を除去した。
On the transfer plate, an alkaline development type dry film was used to perform exposure and development to form a resist layer having a thickness of 30 μm. On the transfer plate without the resist layer, copper electroplating was performed for 60 minutes under the condition of current density of 2 A / dm 2 to form a conductor metal layer having a thickness of 30 μm to be a conductor circuit. Further, the resist layer was removed by immersing in a 2 wt% sodium hydroxide aqueous solution.

【0025】次に、プリプレグとして、樹脂量50重量
%のガラス布基材エポキシ樹脂プリプレグを用いた。上
記転写板の導体回路が形成された面に、上記プリプレグ
を重ね、温度180℃、圧力10kg/cm2 の条件で
120分間加熱加圧し、接合成形した。上記加熱加圧に
より、プリプレグの樹脂が完全硬化し、絶縁基板中に、
導体回路が埋没された状態となった。
Next, a glass cloth base epoxy resin prepreg having a resin amount of 50% by weight was used as the prepreg. The prepreg was placed on the surface of the transfer plate on which the conductor circuit was formed, and heated and pressed for 120 minutes under the conditions of a temperature of 180 ° C. and a pressure of 10 kg / cm 2 to form a joint. By the heat and pressure, the resin of the prepreg is completely cured, and in the insulating substrate,
The conductor circuit is now buried.

【0026】その後、上記絶縁基板から有機フィルムを
物理的に剥離除去した。この際の剥離強度を測定したと
ころ、20g/cmであり、容易に剥離ができた。
Then, the organic film was physically peeled off from the insulating substrate. When the peel strength at this time was measured, it was 20 g / cm, and peeling was easy.

【0027】次に、30g/リットルの過硫酸ナトリウ
ム水溶液を用い、絶縁基板上に残存する上記金属膜をソ
フトエッチングし、導体回路が絶縁基板内に埋没形成し
た厚さ1.0mmのプリント配線板を得た。上記導体回
路が絶縁基板から剥離することはなかった。
Then, the metal film remaining on the insulating substrate was soft-etched by using an aqueous solution of sodium persulfate of 30 g / liter, and a conductive circuit was buried in the insulating substrate to form a printed wiring board having a thickness of 1.0 mm. Got The conductor circuit was not separated from the insulating substrate.

【0028】実施例2 有機フィルムとして厚さ0.1mmの接着剤付きポリイ
ミドフィルムを、補強板として厚さ0.5mmのSUS
304を用いた。上記補強板に有機フィルムを貼着した
後に、パラジウムの含有液に浸漬後、EDTA、ホルマ
リン、及び、硫酸銅を主成分とする無電解銅めっき液に
10分間浸漬し、膜厚3μmの銅の金属膜を形成し、こ
れを転写板とした。
Example 2 A polyimide film with an adhesive having a thickness of 0.1 mm was used as an organic film, and a SUS having a thickness of 0.5 mm was used as a reinforcing plate.
304 was used. After sticking the organic film on the reinforcing plate, it is dipped in a solution containing palladium, and then dipped in an electroless copper plating solution containing EDTA, formalin and copper sulfate as main components for 10 minutes to obtain a copper film having a thickness of 3 μm. A metal film was formed and used as a transfer plate.

【0029】上記転写板を用いた以外は実施例1と同様
にして、絶縁基板中に導体回路を埋没させた。上記絶縁
基板から有機フィルムを物理的に剥離除去した。この際
の剥離強度を測定したところ、15g/cmであり、容
易に剥離ができた。
A conductor circuit was buried in an insulating substrate in the same manner as in Example 1 except that the above transfer plate was used. The organic film was physically peeled off from the insulating substrate. The peel strength at this time was measured and found to be 15 g / cm, indicating that peeling could be performed easily.

【0030】次に、30g/リットルの過硫酸ナトリウ
ム水溶液を用い、絶縁基板上に残存する上記金属膜をソ
フトエッチングし、導体回路が絶縁基板内に埋没形成し
た厚さ1.0mmのプリント配線板を得た。上記導体回
路が絶縁基板から剥離することはなかった。
Next, using a 30 g / liter sodium persulfate aqueous solution, the metal film remaining on the insulating substrate was soft-etched, and a conductor circuit was buried in the insulating substrate to form a printed wiring board having a thickness of 1.0 mm. Got The conductor circuit was not separated from the insulating substrate.

【0031】比較例1 厚さ0.1mmのSUS304を転写板として用いた。
上記転写板を用いた以外は実施例1と同様にして、絶縁
基板中に導体回路を埋没させた。その後、絶縁基板から
SUS304を物理的に剥離除去した。この際の剥離強
度を測定したところ、3kg/cmであり、導体回路の
一部が剥離してしまった。
Comparative Example 1 SUS304 having a thickness of 0.1 mm was used as a transfer plate.
A conductor circuit was embedded in an insulating substrate in the same manner as in Example 1 except that the above transfer plate was used. Then, SUS304 was physically peeled off from the insulating substrate. The peel strength at this time was measured and found to be 3 kg / cm, and part of the conductor circuit was peeled off.

【0032】[0032]

【発明の効果】本発明の請求項1に係るプリント配線板
の製造方法によれば、転写板に表面に金属膜を形成した
有機フィルムを用いるので、金属膜は後工程の電気メッ
キで導体回路を形成する際に電極として利用できる利点
を有すると共に、接合成形の際に転写板と導体回路間の
密着強度を低く抑えることができる。その結果、導体回
路が絶縁基板から剥離することなく、転写板を容易に剥
離除去できる。
According to the method of manufacturing a printed wiring board according to the first aspect of the present invention, since the organic film having the metal film formed on the surface of the transfer plate is used, the metal film is subjected to the electroplating in the subsequent step to form a conductor circuit. In addition to having an advantage that it can be used as an electrode when forming, the adhesion strength between the transfer plate and the conductor circuit can be suppressed to be low during joint molding. As a result, the transfer plate can be easily peeled and removed without peeling the conductor circuit from the insulating substrate.

【0033】本発明の請求項4に係るプリント配線板の
製造方法によれば、上記効果に加えて、転写板に、金属
または樹脂からなる補強板と有機フィルムを重ねた有機
フィルムの表面に金属膜を形成したものを用いるので、
有機フィルムが接合成形の際に変形する恐れがない。
According to the method of manufacturing a printed wiring board according to claim 4 of the present invention, in addition to the above effects, a metal is formed on the surface of an organic film in which a reinforcing plate made of metal or resin and an organic film are stacked on the transfer plate. Since a film-formed product is used,
There is no fear that the organic film will be deformed during the joint molding.

【0034】本発明の請求項5に係るプリント配線板の
製造方法によれば、上記効果に加えて、補強板が立体形
状であるので、導体回路を埋没させた絶縁基板が凹凸形
状を有するプリント配線板を得ることができる。
According to the method of manufacturing a printed wiring board according to the fifth aspect of the present invention, in addition to the above effects, since the reinforcing plate has a three-dimensional shape, the printed circuit board in which the conductor circuit is buried has an uneven shape. A wiring board can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(f)は本発明の第1の実施の形態を
ステップ毎に示した要部の断面図である。
FIG. 1A to FIG. 1F are cross-sectional views of a main part showing each step of a first embodiment of the present invention.

【図2】(a)〜(d)は本発明の第2の実施の形態を
ステップ毎に示した要部の断面図である。
FIG. 2A to FIG. 2D are cross-sectional views of a main part showing the second embodiment of the present invention step by step.

【符号の説明】[Explanation of symbols]

1 転写板 2 有機フィルム 3 金属膜 4 レジスト層 5 導体回路 6 絶縁基板 6a プリプレグ 7 補助板 1 Transfer plate 2 Organic film 3 Metal film 4 Resist layer 5 Conductor circuit 6 Insulating substrate 6a Prepreg 7 Auxiliary plate

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 導体回路が絶縁基板内に埋没形成するプ
リント配線板の製造方法であって、有機フィルムの表面
に金属膜を形成した転写板上に、所望の回路パターンの
裏返しパターンのレジスト層を形成し、上記レジスト層
のない転写板上に、導体回路となる導体金属層を形成
し、上記レジスト層を除去した転写板を、導体回路が埋
没する状態で絶縁基板となるプリプレグに接合成形した
後に、上記絶縁基板から有機フィルムを剥離除去し、さ
らに、上記絶縁基板の上に残存する上記金属膜をソフト
エッチングにより除去することを特徴とするプリント配
線板の製造方法。
1. A method of manufacturing a printed wiring board in which a conductive circuit is formed by being buried in an insulating substrate, wherein a resist layer having a reverse pattern of a desired circuit pattern is formed on a transfer board having a metal film formed on the surface of an organic film. Forming a conductive metal layer to be a conductor circuit on the transfer plate without the resist layer, and removing the resist layer to bond the transfer plate to a prepreg to be an insulating substrate with the conductor circuit buried. After that, the organic film is peeled off from the insulating substrate, and the metal film remaining on the insulating substrate is removed by soft etching.
【請求項2】 上記有機フィルムの表面粗度が、0.0
3μm〜5μmの範囲であることを特徴とする請求項1
記載のプリント配線板の製造方法。
2. The surface roughness of the organic film is 0.0
3. The range is 3 .mu.m to 5 .mu.m.
The method for producing a printed wiring board according to the above.
【請求項3】 上記有機フィルムが、ポリイミド、ポリ
エチレン、ポリプロピレン、テフロン、ポリエチレンテ
レフタレートのフィルムのうちの少なくとも1種である
ことを特徴とする請求項1又は請求項2記載のプリント
配線板の製造方法。
3. The method for producing a printed wiring board according to claim 1 or 2, wherein the organic film is at least one of polyimide, polyethylene, polypropylene, Teflon, and polyethylene terephthalate films. .
【請求項4】 上記転写板が、金属または樹脂からなる
補強板と有機フィルムを重ねた有機フィルムの表面に、
金属膜を形成したものであることを特徴とする請求項1
乃至請求項3いずれか記載のプリント配線板の製造方
法。
4. The surface of the organic film, wherein the transfer plate is a reinforcing plate made of metal or resin and an organic film,
A metal film is formed on the metal film.
A method for manufacturing a printed wiring board according to claim 3.
【請求項5】 上記導体回路を埋没させた絶縁基板が凹
凸形状を有するプリント配線板の製造方法であって、請
求項4記載の補強板が立体形状であることを特徴とする
請求項4記載のプリント配線板の製造方法。
5. The method for manufacturing a printed wiring board, wherein the insulating substrate having the conductor circuit embedded therein has an uneven shape, and the reinforcing plate according to claim 4 has a three-dimensional shape. For manufacturing printed wiring boards.
JP22011895A 1995-08-29 1995-08-29 Production of printed wiring board Withdrawn JPH0964514A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22011895A JPH0964514A (en) 1995-08-29 1995-08-29 Production of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22011895A JPH0964514A (en) 1995-08-29 1995-08-29 Production of printed wiring board

Publications (1)

Publication Number Publication Date
JPH0964514A true JPH0964514A (en) 1997-03-07

Family

ID=16746205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22011895A Withdrawn JPH0964514A (en) 1995-08-29 1995-08-29 Production of printed wiring board

Country Status (1)

Country Link
JP (1) JPH0964514A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002004077A (en) * 2000-06-20 2002-01-09 Kyushu Hitachi Maxell Ltd Electroforming product and method for manufacturing the same
WO2006067280A1 (en) * 2004-12-23 2006-06-29 Aspocomp Technology Oy Conductive pattern, circuit board and their production method
JP2006202913A (en) * 2005-01-19 2006-08-03 Ricoh Co Ltd Wiring structure and method of manufacturing the same
KR100771470B1 (en) * 2006-09-29 2007-10-30 삼성전기주식회사 Stamper and pcb manufacturing method using it
EP2240005A1 (en) * 2009-04-09 2010-10-13 ATOTECH Deutschland GmbH A method of manufacturing a circuit carrier layer and a use of said method for manufacturing a circuit carrier
WO2012032446A1 (en) * 2010-09-06 2012-03-15 Koninklijke Philips Electronics N.V. Substrate sheet
US8687369B2 (en) 2012-02-20 2014-04-01 Apple Inc. Apparatus for creating resistive pathways

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002004077A (en) * 2000-06-20 2002-01-09 Kyushu Hitachi Maxell Ltd Electroforming product and method for manufacturing the same
WO2006067280A1 (en) * 2004-12-23 2006-06-29 Aspocomp Technology Oy Conductive pattern, circuit board and their production method
JP2006202913A (en) * 2005-01-19 2006-08-03 Ricoh Co Ltd Wiring structure and method of manufacturing the same
KR100771470B1 (en) * 2006-09-29 2007-10-30 삼성전기주식회사 Stamper and pcb manufacturing method using it
EP2240005A1 (en) * 2009-04-09 2010-10-13 ATOTECH Deutschland GmbH A method of manufacturing a circuit carrier layer and a use of said method for manufacturing a circuit carrier
WO2010115774A1 (en) * 2009-04-09 2010-10-14 Atotech Deutschland Gmbh A method of manufacturing a circuit carrier layer and a use of said method for manufacturing a circuit carrier
WO2012032446A1 (en) * 2010-09-06 2012-03-15 Koninklijke Philips Electronics N.V. Substrate sheet
CN103098255A (en) * 2010-09-06 2013-05-08 皇家飞利浦电子股份有限公司 Substrate sheet
US8664096B2 (en) 2010-09-06 2014-03-04 Koninklijke Philips N.V. Substrate sheet
US8687369B2 (en) 2012-02-20 2014-04-01 Apple Inc. Apparatus for creating resistive pathways

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Effective date: 20021105