JP4099681B2 - Manufacturing method of multilayer printed wiring board - Google Patents
Manufacturing method of multilayer printed wiring board Download PDFInfo
- Publication number
- JP4099681B2 JP4099681B2 JP3862798A JP3862798A JP4099681B2 JP 4099681 B2 JP4099681 B2 JP 4099681B2 JP 3862798 A JP3862798 A JP 3862798A JP 3862798 A JP3862798 A JP 3862798A JP 4099681 B2 JP4099681 B2 JP 4099681B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- inner layer
- printed wiring
- prepreg
- layer circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【0001】
【発明の属する技術分野】
本発明は、電子機器等に使用される多層プリント配線板の製造方法に関する。
【0002】
【従来の技術】
近年の電子機器の小型化に伴い、それに使用されるプリント配線板も高集積化が要求され、また多層化が進んでいる。多層プリント配線板は、それぞれ複数の内層回路板、プリプレグ及び外層銅箔とを積層一体に成形して製造されている。
【0003】
【発明が解決しようとする課題】
このような多層プリント配線板において、プリプレグと内層回路板の接着性が問題となっている。内層回路板は、両面金属張積層板をエッチングにより回路加工して形成されるが、エッチングされた金属箔は、その表面が粗化形状を有しており内層回路板の表面にその粗化形状が転写される。プリプレグと内層回路板の接着性は、内層回路板に使用された金属箔の凹凸形状が基板表面に転写し、その凹凸がアンカーの役割をはたすことにより達せられている。また、プリプレグと金属箔からなる回路パターンは回路パターン表面を公知の酸化処理や酸化還元処理することにより、接着性を高めることが行われている。ここで高密度化の要求から内層回路板に使用する金属箔の厚さが薄くなり、それに伴い金属箔の凹凸の小さいものを使用する傾向にあり、基板に転写する凹凸も小さくなり、プリプレグと内層回路板の接着性が低下している。
本発明はプリプレグと内層基板の接着性を、低コストで高生産性で向上させることを課題とした。
【0004】
【課題を解決するための手段】
本発明は、回路パターン形成した内層回路板をプリプレグを介して積層接着する多層プリント配線板の製造方法において、金属箔の表面粗化形状が転写された、プリプレグと接する内層回路板の転写表面を薬品により粗化処理することを特徴とする多層プリント配線板の製造方法である。また、本発明は、内層回路板表面の十点平均粗さ(Rz)が5μm以上であると好ましい多層プリント配線板の製造方法である。
【0005】
【発明の実施の形態】
内層回路板を薬品処理により粗化処理する薬品としては、過マンガン酸カリ、濃硫酸又はクロム酸等が挙げられ、バフ研磨やその他の研磨剤による機械的粗化を併用しても良い。
【0006】
本発明では、内層回路板表面の十点平均粗さ(Rz)が5μm以上であることが好ましく、更に10μm以上であることが好ましい。表面粗さは、JIS B601により規定されており、十点平均粗さ(Rz)はそれによる。
本発明に使用される内層回路板やプリプレグに使用される樹脂として、フェノール樹脂、エポキシ樹脂、不飽和ポリエステル樹脂、ポリイミド樹脂、ポリブタジエン樹脂、ポリアミド樹脂、ポリスルホン樹脂、ポリフェニレンサルファイド樹脂、ポリフェニレンエーテル樹脂、ポリブチレンテレフタレート樹脂、フッソ樹脂等の単独、変性物、混合物等が挙げられる。
【0007】
内層回路板は前記樹脂のワニスを繊維基材に含浸乾燥してプリプレグとし、このプリプレグを所定枚数重ね、金属箔例えば銅箔を重ねて加熱加圧して金属箔張積層板を製造し、これを回路加工することによって得られる。一般に銅箔は光沢面と粗化面からなっており、粗化面の表面粗さは銅箔厚み及び用途によって異なるが一般的に十点平均粗さ(Rz)2〜15μmのものが使用される。
【0008】
繊維基材としてはガラス繊維の織布、不織布、マット、芳香族ポリアミド繊維の織布、不織布、マットなどが使用される。
上記金属箔張積層板に回路加工を施し、その後基板表面を粗化処理する。粗化処理としては、バフ又はその他の研磨剤により機械的に表面を粗化した後に薬品で処理しても良く、直接薬品により粗化処理しても良い。薬品としては前述の過マンガン酸カリ、濃硫酸又はクロム酸等を用いて化学的に粗化する。
プリプレグに接する金属箔からなる回路パターン表面は、公知の酸化処理や酸化還元処理する。
接着用のプリプレグとしては、前記内層回路板の製造に用いたプリプレグと同じものを用いるのが望ましい。多層プリント配線板としたときの全体の材質が同じとなるので熱膨張収縮などの特性が均一化でき、また製造上からも多種類の材質を用いることによるコストアップを無くすことができるためである。
【0009】
積層成形については、通常の多層板の積層成形と同様に、従来から採用されている条件で行うことができる、この条件は、おおむね、温度100〜200℃、圧力0.5〜20MPa、加熱時間10〜120分間とされるが、接着用プリプレグの樹脂組成によって適宣の条件が選定される。
【0010】
【実施例】
(実施例1)
ビスフェノールAノボラック型エポキシ樹脂(大日本インキ化学工業株式会社製、エピクロンN−868(商品名)を使用した)50重量部、ビスフェノールAノボラック樹脂(油化シェルエポキシ株式会社製、YLH−129(商品名)を使用した)40重量部、ブロム化ビスフェノールA型エポキシ樹脂(住友化学工業株式会社製、ESB−400(商品名)を使用した)50重量部及び1−シアノエチル−2−フェニルイミダゾール1重量部をメチルエチルケトン90重量部に溶解してワニスとした。このワニスを100μmのガラス織布(MIL品番2116タイプ)に含浸し、150℃の乾燥器中で4分間乾燥し、B−ステージ状態のプリプレグを得た。
得られたプリプレグ4枚を重ねて、その両側に厚み35μm(粗化面表面粗さRz=9.4μm)の銅箔を配し、圧力2MPa、温度170℃で100分間加熱加圧して両面銅張積層板を得た。この両面銅張積層板を所定のパターンエッチングを施し内層回路板を得た。この内層回路板表面の凹凸はRz=9.4μmであった。なお銅箔粗化面及び内層回路板表面の凹凸は株式会社東京精密製商品名、サーフコム(Surfcom)で測定した。
次にこのパターンエッチングされた内層回路板表面を過マンガン酸カリ(シップレイ(Shiply)社、CIRCUPOSIT ROMOTER3308)を用いて85℃5分間処理を行った。この内層回路板表面粗さはRz=10.9μmであり、その後、導体である銅箔パターンに所定の酸化還元処理を行った。
このようにして得られた内層回路板の上下にそれぞれ前記のプリプレグを1枚、更に18μm銅箔を置き、温度175℃で90分加熱加圧し多層板Aを得た。
【0011】
(実施例2)
実施例1と同様にして、厚み35μmで粗化面の表面粗さがRz=3.9μmの銅箔を用いた両面銅張積層板を作製し、この両面銅張積層板を所定のパターンエッチングを施し内層回路板を得た。この内層回路板の表面粗さは、Rz=3.9μmであり、粗化処理後の内層回路板表面粗さは、Rz=6.2μmであった。そしてこの内層回路板を用いて実施例1と同様にして多層板Bを得た。
【0012】
(比較例1)
実施例1における粗化処理を行わなかった他は実施例1同様にして多層板Cを得た。
【0013】
(比較例2)
実施例2における粗化処理を行わなかった他は実施例2と同様にして多層板Dを得た。
【0014】
実施例1,2及び比較例1,2で得られた多層板を用いて吸湿半田耐熱性、プリプレグと基板間の引き剥がし強さの評価を行い、その結果を表1に示した。
【0015】
吸湿半田耐熱性は121℃、2atmのプレッシャークッカー試験機で所定時間吸湿させた後、260℃の半田に20秒浸漬させ、外観を目視により評価し、ふくれの無いものをOK、ふくれのあるものをNGとした。
プリプレグと内層回路基板間の接着性は、多層板から100×25mmの試験片を切り出し、片側の最外層の銅箔とプリプレグ1枚からなる絶縁層を10mm幅の帯状部を残して引き剥がし、帯状部の端を引き剥がし、その先端を試験機のつかみ具でつかみ、試験片面と垂直方向に50mm/分で引張り速度で引き剥がした時、引き剥がすために必要な荷重を測定して引き剥がし強さとした。
【0016】
【表1】
【0017】
表1より、本発明の基板表面を薬品処理した実施例1、2は、それに対応する薬品処理しない比較例1、2に比べ、引き剥がし強さが高く、これにより吸湿半田耐熱性が著しく向上する。本発明は、特に銅箔の粗化面の表面粗さが小さい薄い銅箔を用いた場合にプリプレグと内層回路基板表面との接着性が高くなる。
【0018】
【発明の効果】
本発明の多層プリント配線板の製造方法によれば、基板表面を粗化処理することによりプリプレグと基板表面の接着性を、従来設備で且つ安価に向上させることができる。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for producing a multilayer printed wiring board used for electronic equipment and the like.
[0002]
[Prior art]
With recent miniaturization of electronic devices, printed wiring boards used for the electronic devices are required to be highly integrated, and the number of layers is increasing. Each multilayer printed wiring board is manufactured by integrally forming a plurality of inner layer circuit boards, prepregs, and outer layer copper foils.
[0003]
[Problems to be solved by the invention]
In such a multilayer printed wiring board, the adhesion between the prepreg and the inner circuit board is a problem. The inner layer circuit board is formed by etching a double-sided metal-clad laminate, but the etched metal foil has a roughened shape on the surface of the inner layer circuit board. Is transcribed. The adhesion between the prepreg and the inner layer circuit board is achieved by transferring the irregular shape of the metal foil used for the inner layer circuit board to the substrate surface, and the irregularities function as anchors. Moreover, the circuit pattern which consists of a prepreg and metal foil raises adhesiveness by performing the well-known oxidation process or oxidation-reduction process on the circuit pattern surface. Here, due to the demand for higher density, the thickness of the metal foil used for the inner layer circuit board is reduced, and accordingly there is a tendency to use a metal foil with small unevenness, and the unevenness transferred to the substrate is also reduced. The adhesiveness of the inner circuit board is reduced.
An object of the present invention is to improve the adhesiveness between a prepreg and an inner layer substrate at low cost and high productivity.
[0004]
[Means for Solving the Problems]
The present invention relates to a method for manufacturing a multilayer printed wiring board in which a circuit pattern-formed inner layer circuit board is laminated and bonded via a prepreg, and a transfer surface of the inner layer circuit board in contact with the prepreg, to which the roughened surface shape of the metal foil is transferred. It is a manufacturing method of a multilayer printed wiring board characterized by roughening processing with a chemical. Moreover, this invention is a manufacturing method of a multilayer printed wiring board with preferable 10-point average roughness (Rz) of the inner-layer circuit board surface being 5 micrometers or more.
[0005]
DETAILED DESCRIPTION OF THE INVENTION
Examples of the chemical for roughening the inner layer circuit board by chemical treatment include potassium permanganate, concentrated sulfuric acid, or chromic acid, and mechanical roughening by buffing or other abrasives may be used in combination.
[0006]
In the present invention, the ten-point average roughness (Rz) of the inner layer circuit board surface is preferably 5 μm or more, and more preferably 10 μm or more. The surface roughness is defined by JIS B601, and the ten-point average roughness (Rz) is based on it.
The resin used for the inner circuit board and prepreg used in the present invention is phenol resin, epoxy resin, unsaturated polyester resin, polyimide resin, polybutadiene resin, polyamide resin, polysulfone resin, polyphenylene sulfide resin, polyphenylene ether resin, polyphenylene ether resin, Examples thereof include a butylene terephthalate resin and a fluorine resin alone, a modified product, a mixture, and the like.
[0007]
The inner layer circuit board is obtained by impregnating and drying the resin varnish into a fiber base material to obtain a prepreg. A predetermined number of the prepregs are stacked, and a metal foil, for example, a copper foil, is heated and pressed to produce a metal foil-clad laminate. It is obtained by circuit processing. In general, copper foil is composed of a glossy surface and a roughened surface, and the surface roughness of the roughened surface varies depending on the thickness of the copper foil and the application, but generally has a 10-point average roughness (Rz) of 2 to 15 μm. The
[0008]
As the fiber substrate, glass fiber woven fabric, non-woven fabric, mat, aromatic polyamide fiber woven fabric, non-woven fabric, mat or the like is used.
The metal foil-clad laminate is subjected to circuit processing, and then the substrate surface is roughened. As the roughening treatment, the surface may be roughened mechanically with a buff or other abrasives and then treated with chemicals, or may be directly roughened with chemicals. Chemically roughening is performed using the above-described potassium permanganate, concentrated sulfuric acid, chromic acid, or the like.
The circuit pattern surface made of a metal foil in contact with the prepreg is subjected to a known oxidation treatment or oxidation reduction treatment.
As the prepreg for adhesion, it is desirable to use the same prepreg used for the production of the inner layer circuit board. This is because the overall material is the same when a multilayer printed wiring board is used, so that characteristics such as thermal expansion and contraction can be made uniform, and cost increases due to the use of many types of materials from the viewpoint of manufacturing can also be eliminated. .
[0009]
Laminate molding can be performed under conventional conditions as in the case of normal multilayer board laminate molding. These conditions are generally temperature 100 to 200 ° C., pressure 0.5 to 20 MPa, and heating time. Although it is 10 to 120 minutes, suitable conditions are selected depending on the resin composition of the prepreg for bonding.
[0010]
【Example】
Example 1
50 parts by weight of bisphenol A novolac type epoxy resin (Dainippon Ink Chemical Co., Ltd., using Epicron N-868 (trade name)), bisphenol A novolak resin (Yukah Shell Epoxy Co., Ltd., YLH-129 (product) 40 parts by weight), 50 parts by weight of brominated bisphenol A type epoxy resin (manufactured by Sumitomo Chemical Co., Ltd., ESB-400 (trade name)) and 1 part of 1-cyanoethyl-2-phenylimidazole A part was dissolved in 90 parts by weight of methyl ethyl ketone to prepare a varnish. This varnish was impregnated into a 100 μm glass woven fabric (MIL product number 2116 type) and dried in a dryer at 150 ° C. for 4 minutes to obtain a B-stage prepreg.
The obtained four prepregs are stacked, copper foil having a thickness of 35 μm (roughened surface surface roughness Rz = 9.4 μm) is arranged on both sides thereof, and heated and pressed at a pressure of 2 MPa and a temperature of 170 ° C. for 100 minutes for double-sided copper. A tension laminate was obtained. This double-sided copper-clad laminate was subjected to a predetermined pattern etching to obtain an inner layer circuit board. The unevenness of the inner layer circuit board surface was Rz = 9.4 μm. In addition, the unevenness | corrugation of the copper foil roughening surface and the inner-layer circuit board surface was measured by the Tokyo Seimitsu Co., Ltd. brand name and Surfcom.
Next, the surface of the pattern-etched inner circuit board was treated with potassium permanganate (Shiply, CIRCUPOSIT ROMOTER 3308) at 85 ° C. for 5 minutes. The inner layer circuit board surface roughness was Rz = 10.9 μm, and then a predetermined redox treatment was performed on the copper foil pattern as a conductor.
One sheet of the above prepreg and 18 μm copper foil were placed on the upper and lower sides of the inner layer circuit board thus obtained, and heated and pressurized at a temperature of 175 ° C. for 90 minutes to obtain a multilayer board A.
[0011]
(Example 2)
In the same manner as in Example 1, a double-sided copper-clad laminate using a copper foil having a thickness of 35 μm and a roughened surface having a surface roughness Rz = 3.9 μm was prepared, and this double-sided copper-clad laminate was subjected to predetermined pattern etching. To obtain an inner layer circuit board. The surface roughness of the inner circuit board was Rz = 3.9 μm, and the surface roughness of the inner circuit board after the roughening treatment was Rz = 6.2 μm. Using this inner layer circuit board, a multilayer board B was obtained in the same manner as in Example 1.
[0012]
(Comparative Example 1)
A multilayer board C was obtained in the same manner as in Example 1 except that the roughening treatment in Example 1 was not performed.
[0013]
(Comparative Example 2)
A multilayer board D was obtained in the same manner as in Example 2 except that the roughening treatment in Example 2 was not performed.
[0014]
The multilayer boards obtained in Examples 1 and 2 and Comparative Examples 1 and 2 were evaluated for moisture-absorbing solder heat resistance and peel strength between the prepreg and the substrate. The results are shown in Table 1.
[0015]
Moisture-absorbing solder heat resistance is 121 ° C, 2atm pressure cooker tester, and then dipped in 260 ° C solder for 20 seconds, visually evaluated for appearance, OK without blisters, with blisters Was NG.
The adhesiveness between the prepreg and the inner layer circuit board is to cut out a 100 × 25 mm test piece from the multilayer board, and peel off the insulating layer composed of one outermost copper foil and one prepreg, leaving a 10 mm wide strip. When stripping off the end of the strip, grabbing the tip with the grip of the testing machine and peeling it off at a pulling speed of 50 mm / min in the direction perpendicular to the surface of the test piece, measure the load required to peel it off. It was strength.
[0016]
[Table 1]
[0017]
From Table 1, Examples 1 and 2 in which the substrate surface of the present invention was chemically treated had higher peel strength than Comparative Examples 1 and 2 that were not treated with the corresponding chemical, thereby significantly improving the heat resistance of the hygroscopic solder. To do. In the present invention, the adhesion between the prepreg and the inner layer circuit board surface is enhanced particularly when a thin copper foil having a small rough surface on the roughened surface of the copper foil is used.
[0018]
【The invention's effect】
According to the method for producing a multilayer printed wiring board of the present invention, the adhesion between the prepreg and the substrate surface can be improved at low cost with conventional equipment by roughening the substrate surface.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3862798A JP4099681B2 (en) | 1998-02-20 | 1998-02-20 | Manufacturing method of multilayer printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3862798A JP4099681B2 (en) | 1998-02-20 | 1998-02-20 | Manufacturing method of multilayer printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11238965A JPH11238965A (en) | 1999-08-31 |
JP4099681B2 true JP4099681B2 (en) | 2008-06-11 |
Family
ID=12530487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3862798A Expired - Fee Related JP4099681B2 (en) | 1998-02-20 | 1998-02-20 | Manufacturing method of multilayer printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4099681B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4685978B2 (en) * | 2001-01-18 | 2011-05-18 | 日本特殊陶業株式会社 | Wiring board |
JPWO2011061969A1 (en) * | 2009-11-18 | 2013-04-04 | 株式会社フジクラ | Partial multilayer wiring board and manufacturing method thereof |
-
1998
- 1998-02-20 JP JP3862798A patent/JP4099681B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH11238965A (en) | 1999-08-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR20010051189A (en) | Method for the preparation of multilayered printed wiring board using adhesive film | |
WO2001045478A1 (en) | Multilayered printed wiring board and production method therefor | |
US5633069A (en) | Multilayer printed-circuit substrate, wiring substrate and process of producing the same | |
JP3735485B2 (en) | Copper foil with resin film, and copper foil with resin using the same | |
JP2004349654A (en) | Copper foil with insulator layer, its manufacturing method, and multilayer printed circuit board using it | |
JP4099681B2 (en) | Manufacturing method of multilayer printed wiring board | |
JPH1126938A (en) | Manufacture of laminated board with inner layer circuit | |
JP2000068620A (en) | Circuit substrate and manufacture thereof | |
JP2501331B2 (en) | Laminate | |
JPH07202417A (en) | Flexible printed wiring board | |
JPH11204942A (en) | Manufacture of multilayer wiring board | |
JP2009038094A (en) | Manufacturing method of multilayer wiring board | |
JP3071722B2 (en) | Method for manufacturing multilayer printed wiring board | |
JPH0316196A (en) | Multilayer printed board and manufacture thereof | |
WO2003032701A1 (en) | Method for manufacturing multilayer wiring board, and multilayer wiring board manufactured by the same | |
JP2000049440A (en) | Manufacture of printed wiring multilayer board | |
JP2001007532A (en) | Method of manufacturing multilayer wiring board | |
JP2004237447A (en) | Adhesive film, and method for manufacturing multilayered printed wiring board using the film | |
JP2004284192A (en) | Insulating sheet with metal foil and its manufacturing method | |
JP4285215B2 (en) | Double-sided copper-clad laminate, method for producing the same, and multilayer laminate | |
JP2000077847A (en) | Manufacture of multilayered printed wiring board | |
JPH1126933A (en) | Film-shaped adhesive for electroless plating and manufacture of printed wiring board using the same | |
JP2003243810A (en) | Method of manufacturing printed wiring board equipped with very fine wire pattern | |
JPH01313998A (en) | Manufacture of metal composite laminated board | |
JP2002353582A (en) | Resin-attached metal foil, multilayer printed wiring board, and manufacturing method therefor |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050214 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070427 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070516 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20071122 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080111 |
|
A911 | Transfer of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20080125 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080221 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080305 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110328 Year of fee payment: 3 |
|
LAPS | Cancellation because of no payment of annual fees |