JPH0955392A - Soldering method for semiconductor device - Google Patents
Soldering method for semiconductor deviceInfo
- Publication number
- JPH0955392A JPH0955392A JP20478695A JP20478695A JPH0955392A JP H0955392 A JPH0955392 A JP H0955392A JP 20478695 A JP20478695 A JP 20478695A JP 20478695 A JP20478695 A JP 20478695A JP H0955392 A JPH0955392 A JP H0955392A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- solder
- soldering
- radiator
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
Landscapes
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半田付け方法、特に
半導体部品、基板及び放熱体を有する半導体装置の半田
付け方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a soldering method, and more particularly to a soldering method for a semiconductor device having a semiconductor component, a board and a heat radiator.
【０００２】[0002]
【従来の技術】例えば、図４に示すように一方の主面１
a上に銀白金（ＡｇＰｔ）箔の配線パターン１cが形成さ
れかつ他方の主面１b一面に銀白金箔１dが被着された回
路基板１と、回路基板１の一方の主面１aの配線パター
ン１c上に半田５により固着されたＭＯＳＦＥＴ、トラ
ンジスタ等の半導体チップ２と、回路基板１の他方の主
面１bの銀白金箔１dに半田４により固着された金属製の
放熱体３とから成る半導体装置は従来から公知である。
図４に示す半導体装置では、まず、回路基板１の一方の
主面１aの配線パターン１c上にペースト状の半田５（融
点：２９０℃）を塗布する。また、放熱体３の一方の主
面３aの半田付け領域３c上にペースト状の半田４（融
点：２３０℃〜２５０℃）を塗布する。次に、回路基板
１の一方の主面１aの配線パターン１c上に半導体チップ
２を載置し、回路基板１及び半導体チップ２の組立体を
加熱炉にて２９０℃近傍まで加熱して半田５を溶融し半
田付けする。最後に、放熱体３の半田付け領域３c上に
回路基板１及び半導体チップ２の組立体を載置し、回路
基板１及び半導体チップ２及び放熱体３の組立体を加熱
炉にて２３０℃〜２５０℃近傍まで加熱して半田４を溶
融し半田付けする。以上の工程を経ることにより、図４
に示す半導体装置が半田付けされる。2. Description of the Related Art For example, as shown in FIG.
A circuit board 1 on which a wiring pattern 1c of silver-platinum (AgPt) foil is formed on a and a silver-platinum foil 1d is adhered on the other main surface 1b, and a wiring pattern 1c on one main surface 1a of the circuit board 1 A semiconductor device including a semiconductor chip 2 such as a MOSFET, a transistor, or the like fixed to the top with solder 5 and a metal radiator 3 fixed to the silver-platinum foil 1d on the other main surface 1b of the circuit board 1 with solder 4 It has been publicly known.
In the semiconductor device shown in FIG. 4, first, the paste-like solder 5 (melting point: 290 ° C.) is applied onto the wiring pattern 1c on the one main surface 1a of the circuit board 1. Further, paste-like solder 4 (melting point: 230 ° C. to 250 ° C.) is applied on the soldering region 3c on one main surface 3a of the radiator 3. Next, the semiconductor chip 2 is placed on the wiring pattern 1c on the one main surface 1a of the circuit board 1, and the assembly of the circuit board 1 and the semiconductor chip 2 is heated to near 290 ° C. in a heating furnace to solder 5 Melt and solder. Finally, the assembly of the circuit board 1 and the semiconductor chip 2 is placed on the soldering area 3c of the radiator 3, and the assembly of the circuit board 1, the semiconductor chip 2 and the radiator 3 is heated at 230 ° C. The solder 4 is melted by heating up to around 250 ° C. and soldered. Through the above steps, FIG.
The semiconductor device shown in is soldered.
【０００３】[0003]
【発明が解決しようとする課題】ところで、上記の半導
体装置の半田付け方法では、回路基板１及び半導体チッ
プ２及び放熱体３の組立体を半田４、５により固着する
ときに２度加熱を行なうため、半田付け工程が煩雑にな
る欠点があった。また、回路基板１及び半導体チップ２
の組立体を放熱体３上に半田付けする際に回路基板１の
配線パターン１c上の半田５が融点近くまで加熱される
ため、半田５が再溶融して半導体チップ２の固着が緩
み、半導体装置の半田付けの信頼性が著しく低下する欠
点があった。In the soldering method for a semiconductor device described above, heating is performed twice when the assembly of the circuit board 1, the semiconductor chip 2 and the radiator 3 is fixed by the solders 4 and 5. Therefore, there is a drawback that the soldering process becomes complicated. In addition, the circuit board 1 and the semiconductor chip 2
Since the solder 5 on the wiring pattern 1c of the circuit board 1 is heated to near the melting point when the assembly of 1 is soldered onto the heat sink 3, the solder 5 is remelted and the semiconductor chip 2 is loosely fixed, and the semiconductor There is a drawback that the reliability of soldering of the device is significantly reduced.
【０００４】そこで、本発明は半田付け工程を簡略化し
かつ半田付けの信頼性を向上できる半導体装置の半田付
け方法を提供することを目的とする。Therefore, an object of the present invention is to provide a soldering method for a semiconductor device, which can simplify the soldering process and improve the reliability of soldering.
【０００５】[0005]
【課題を解決するための手段】本発明による半導体装置
の半田付け方法は、一方の主面上の第１の半田付け領域
に第１の半田が印刷された基板と一方の主面上の第２の
半田付け領域に前記第１の半田より高い融点を有する第
２の半田が印刷された放熱体とを用意する工程と、前記
基板の他方の主面を前記放熱体の前記第２の半田付け領
域に重ねかつ前記基板の前記第１の半田付け領域に半導
体部品を載置する工程と、前記放熱体及び前記基板及び
前記半導体部品から成る組立体を前記放熱体から加熱し
て前記第１の半田及び前記第２の半田を同時に溶融する
工程とを含む。A method of soldering a semiconductor device according to the present invention comprises a substrate having a first solder printed on a first soldering area on one main surface and a first soldering area on the one main surface. Preparing a heat radiator in which second solder having a higher melting point than that of the first solder is printed in the second soldering region, and the other main surface of the substrate is the second solder of the heat radiator. A step of stacking a semiconductor component on the attachment area and placing the semiconductor component on the first soldering area of the substrate; and heating the assembly including the radiator and the substrate and the semiconductor component from the radiator to form the first component. And melting the second solder at the same time.
【０００６】放熱体及び基板及び半導体部品から成る組
立体を放熱体から加熱することにより、放熱体、基板、
半導体部品の順で熱が伝導されるので、基板の一方の主
面上の温度は放熱体の一方の主面上の温度より若干低く
なる。このため、放熱体及び基板間の高い融点の第２の
半田と基板及び半導体部品間の低い融点の第１の半田と
が略同時に溶け始める。したがって、１度の加熱で放熱
体及び基板及び半導体部品から成る組立体を第１及び第
２の半田により固着できるので、半導体装置の半田付け
工程を簡略化できる。また、基板及び半導体部品間の第
１の半田が再溶融することがなく、基板に固着された半
導体部品の緩みを防止して半導体装置の半田付けの信頼
性を向上できる。By heating the assembly consisting of the radiator, the substrate and the semiconductor component from the radiator, the radiator, the substrate,
Since heat is conducted in the order of the semiconductor components, the temperature on one main surface of the substrate becomes slightly lower than the temperature on one main surface of the radiator. Therefore, the second solder having a high melting point between the radiator and the substrate and the first solder having a low melting point between the substrate and the semiconductor component start to melt at substantially the same time. Therefore, since the assembly including the radiator and the substrate and the semiconductor component can be fixed by the first and second solders by heating once, the soldering process of the semiconductor device can be simplified. Further, the first solder between the substrate and the semiconductor component is not remelted, the looseness of the semiconductor component fixed to the substrate can be prevented, and the reliability of soldering of the semiconductor device can be improved.
【０００７】[0007]
【発明の実施の形態】以下、本発明による半導体装置の
半田付け方法の実施の形態を図１〜図３に基づいて説明
する。但し、図１では図４と同一の箇所には同一の符号
を付し、その説明を省略する。図１に示すように、ま
ず、セラミック製の回路基板１の一方の主面１aの第１
の半田付け領域としての配線パターン１c上に第１の半
田としてのペースト状の半田４（融点：２３０℃〜２５
０℃）を予め印刷する。また、図２に示すように金属製
の放熱体３の一方の主面３aの第２の半田付け領域とし
ての半田付け領域３c上に第２の半田としてのペースト
状の半田５（融点：２８０℃〜３００℃）を予め印刷す
る。次に、回路基板１の他方の主面１bに被着された銀
白金箔１dを固着面として放熱体３の半田付け領域３cに
重ね、回路基板１の配線パターン１c上に半導体部品と
しての半導体チップ２を載置する。その後、図３に示す
ように放熱体３及び回路基板１及び半導体チップ２から
成る組立体をコンベア６上に載置し、コンベア６の下部
に設置されたヒータ７により前記の組立体を放熱体３の
他方の主面３bから半田５の融点近傍に加熱する。この
とき、放熱体３、回路基板１、半導体チップ２の順で熱
が伝導されるので、回路基板１の一方の主面１a上の温
度は放熱体３の一方の主面３a上の温度より若干低くな
り、半田４の融点に略等しくなる。このため、放熱体３
及び回路基板１間の半田５と回路基板１及び半導体チッ
プ２間の半田４とが略同時に溶け始める。半田４、５の
溶融後、コンベア６を矢印方向に移動させてヒータ７よ
り組立体を離間させ、半田４、５を硬化させて放熱体３
及び回路基板１及び半導体チップ２から成る組立体を半
田４、５により固着する。以上により、図１に示す半導
体装置の半田付けが完了する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a method for soldering a semiconductor device according to the present invention will be described below with reference to FIGS. However, in FIG. 1, the same parts as those in FIG. 4 are designated by the same reference numerals, and the description thereof will be omitted. As shown in FIG. 1, first, the first main surface 1a of the circuit board 1 made of ceramic is
On the wiring pattern 1c as the soldering area of the paste-like solder 4 as the first solder (melting point: 230 ° C. to 25 ° C.).
0 ° C) in advance. Further, as shown in FIG. 2, the paste-like solder 5 (melting point: 280) as the second solder is provided on the soldering area 3c as the second soldering area on the one main surface 3a of the metal radiator 3. (° C to 300 ° C) is printed in advance. Next, the silver-platinum foil 1d adhered to the other main surface 1b of the circuit board 1 is used as a fixing surface and overlapped with the soldering area 3c of the radiator 3, and the semiconductor chip as a semiconductor component is placed on the wiring pattern 1c of the circuit board 1 as a semiconductor component. Place 2. After that, as shown in FIG. 3, an assembly consisting of the radiator 3, the circuit board 1 and the semiconductor chip 2 is placed on the conveyor 6, and the heater 7 installed at the bottom of the conveyor 6 removes the assembly from the radiator. The other principal surface 3b of the solder 3 is heated to near the melting point of the solder 5. At this time, since heat is conducted in the order of the radiator 3, the circuit board 1, and the semiconductor chip 2, the temperature on the one main surface 1a of the circuit board 1 is higher than the temperature on the one main surface 3a of the radiator 3. It becomes a little lower and becomes substantially equal to the melting point of the solder 4. Therefore, the radiator 3
The solder 5 between the circuit board 1 and the solder 4 between the circuit board 1 and the semiconductor chip 2 start to melt at substantially the same time. After the solders 4 and 5 are melted, the conveyor 6 is moved in the direction of the arrow to separate the assembly from the heater 7, and the solders 4 and 5 are hardened to dissipate the heat sink 3.
The assembly consisting of the circuit board 1 and the semiconductor chip 2 is fixed by the solders 4 and 5. By the above, the soldering of the semiconductor device shown in FIG. 1 is completed.
【０００８】本発明では、融点の異なる半田４、５が略
同時に溶融するので、１度の加熱で放熱体３及び回路基
板１及び半導体チップ２から成る組立体を半田４、５に
より短時間で固着でき、半導体装置の半田付け工程を簡
略化できる。また、１度の加熱で半田付けできるため、
回路基板１及び半導体チップ間の半田４が再溶融するこ
とがなく、回路基板１に固着された半導体チップ２の緩
みを防止して半導体装置の半田付けの信頼性を向上でき
る。In the present invention, since the solders 4 and 5 having different melting points are melted substantially at the same time, the assembly consisting of the radiator 3 and the circuit board 1 and the semiconductor chip 2 can be heated by the solder 4 and 5 in a short time by heating once. It can be fixed and the semiconductor device soldering process can be simplified. Also, since it can be soldered by heating once,
The solder 4 between the circuit board 1 and the semiconductor chip does not remelt, the looseness of the semiconductor chip 2 fixed to the circuit board 1 is prevented, and the reliability of soldering of the semiconductor device can be improved.
【０００９】本発明の実施態様は上記の実施の形態に限
定されず、種々の変更が可能である。例えば、上記の実
施の形態では１個の半導体装置の半田付けについて説明
したが複数個の半導体装置の半田付けにも適用できる。
即ち、複数個の半導体装置の組立体を図３に示すコンベ
ア６の長手方向に並べて載置し、逐次コンベア６を移動
させて前記の各組立体を放熱体３からヒータ７により逐
次加熱してもよい。また、複数の半田付け領域３cに各
々高融点の半田５が印刷された放熱体３を用意し、表面
に低融点の半田４が印刷された複数個の回路基板１の裏
面を放熱体３の各々の半田付け領域３cにそれぞれ重ね
かつ各回路基板１の半田４の印刷面にそれぞれ半導体チ
ップ２を載置し、放熱体３と複数個の回路基板１及び半
導体チップ２との組立体を放熱体３の裏面からヒータ７
により加熱して半田付けを行なった後、必要に応じて放
熱体３を複数個に分割して複数個の半導体装置を得ても
よい。The embodiment of the present invention is not limited to the above embodiment, and various modifications can be made. For example, in the above embodiment, the soldering of one semiconductor device has been described, but the present invention can also be applied to the soldering of a plurality of semiconductor devices.
That is, an assembly of a plurality of semiconductor devices is placed side by side in the longitudinal direction of the conveyor 6 shown in FIG. 3, and the conveyor 6 is sequentially moved to sequentially heat each assembly from the radiator 3 by the heater 7. Good. Further, the heat radiator 3 having the high melting point solder 5 printed on each of the plurality of soldering regions 3c is prepared, and the back surface of the plurality of circuit boards 1 having the low melting point solder 4 printed on the front surface thereof is used as the heat sink 3. The semiconductor chip 2 is placed on each soldering area 3c and on the printed surface of the solder 4 of each circuit board 1, and the assembly of the heat radiator 3 and the plurality of circuit boards 1 and semiconductor chips 2 is radiated. Heater 7 from the back of body 3
After heating and soldering by the method, the heat radiator 3 may be divided into a plurality of pieces to obtain a plurality of semiconductor devices, if necessary.
【００１０】[0010]
【実施例】更に、図１に示す実施の形態において、半田
４、５が以下に示す組成であるときに良好な半田付け性
能が得られた。 半田４；Ｓｎ(錫）８％、Ｓｂ(アンチモン）１０％、残
りＰｂ(鉛）（融点２５０℃、液相温度２６１℃、固相
温度２４７℃） 半田５；Ａｇ(銀）２.５％、Ｓｎ(錫）５％、残りＰｂ
(鉛）（融点２９０℃、液相温度３０５℃、固相温度２
９２℃）EXAMPLES Further, in the embodiment shown in FIG. 1, good soldering performance was obtained when the solders 4 and 5 had the compositions shown below. Solder 4; Sn (tin) 8%, Sb (antimony) 10%, balance Pb (lead) (melting point 250 ° C, liquidus temperature 261 ° C, solidus temperature 247 ° C) Solder 5; Ag (silver) 2.5% , Sn (tin) 5%, rest Pb
(Lead) (melting point 290 ° C, liquidus temperature 305 ° C, solidus temperature 2
92 ° C)
【００１１】[0011]
【発明の効果】本発明によれば、短時間に１度の加熱で
半導体装置の半田付けが完了するため、半導体装置の半
田付け工程を簡略化できかつ半田付けの信頼性を向上で
きる。また、半田付けの際の加熱時間が短時間であるた
め、半導体チップ等の半導体部品が受ける熱的ストレス
が少なく、半導体部品の電気的特性の劣化を防止できる
利点がある。According to the present invention, the soldering of the semiconductor device is completed by heating once in a short time. Therefore, the soldering process of the semiconductor device can be simplified and the reliability of the soldering can be improved. Further, since the heating time at the time of soldering is short, there is little thermal stress applied to a semiconductor component such as a semiconductor chip, and there is an advantage that deterioration of the electrical characteristics of the semiconductor component can be prevented.
【図１】 本発明により半田付けされた半導体装置の構
造断面図FIG. 1 is a structural sectional view of a semiconductor device soldered according to the present invention.
【図２】 半田付け領域に半田が印刷された放熱体の一
部を示す平面図FIG. 2 is a plan view showing a part of a radiator in which solder is printed in a soldering area.
【図３】 本発明の加熱工程を示す断面図FIG. 3 is a sectional view showing a heating step of the present invention.
【図４】 従来の方法により半田付けされた半導体装置
の構造断面図FIG. 4 is a structural cross-sectional view of a semiconductor device soldered by a conventional method.
１．．．回路基板（基板）、１a．．．一方の主面、１
b．．．他方の主面、１c．．．配線パターン（第１の半
田付け領域）、１d．．．銀白金箔、２．．．半導体チ
ップ（半導体部品）、３．．．放熱体、３a．．．一方
の主面、３b．．．他方の主面、３c．．．半田付け領域
（第２の半田付け領域）、４．．．半田（第１の半
田）、５．．．半田（第２の半田）、６．．．コンベ
ア、７．．．ヒータ1. . . Circuit board (board), 1a. . . One main surface, 1
b. . . The other main surface, 1c. . . Wiring pattern (first soldering area), 1d. . . Silver platinum foil, 2. . . Semiconductor chips (semiconductor components), 3. . . Radiator, 3a. . . One main surface, 3b. . . The other major surface, 3c. . . 3. Soldering area (second soldering area), . . Solder (first solder), 5. . . Solder (second solder), 6. . . Conveyor, 7. . . heater
Claims (1)
１の半田が印刷された基板と、一方の主面上の第２の半
田付け領域に前記第１の半田より高い融点を有する第２
の半田が印刷された放熱体とを用意する工程と、 前記基板の他方の主面を前記放熱体の前記第２の半田付
け領域に重ねかつ前記基板の前記第１の半田付け領域に
半導体部品を載置する工程と、 前記放熱体及び前記基板及び前記半導体部品から成る組
立体を前記放熱体から加熱して前記第１の半田及び前記
第２の半田を同時に溶融する工程とを含むことを特徴と
する半導体装置の半田付け方法。1. A substrate on which a first solder is printed in a first soldering area on one main surface, and a melting point higher than that of the first solder in a second soldering area on one main surface. Second with
A step of preparing a heat-dissipating body on which the solder is printed, the other main surface of the substrate being overlaid on the second soldering area of the heat-dissipating body, and the semiconductor component being on the first soldering area of the substrate. And a step of heating an assembly composed of the radiator, the substrate, and the semiconductor component from the radiator to simultaneously melt the first solder and the second solder. A characteristic method for soldering a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20478695A JP3360778B2 (en) | 1995-08-10 | 1995-08-10 | Semiconductor device soldering method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20478695A JP3360778B2 (en) | 1995-08-10 | 1995-08-10 | Semiconductor device soldering method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0955392A true JPH0955392A (en) | 1997-02-25 |
| JP3360778B2 JP3360778B2 (en) | 2002-12-24 |
Family
ID=16496332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20478695A Expired - Fee Related JP3360778B2 (en) | 1995-08-10 | 1995-08-10 | Semiconductor device soldering method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3360778B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7038313B2 (en) * | 2003-05-06 | 2006-05-02 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of manufacturing the same |
| CN102263092A (en) * | 2010-05-31 | 2011-11-30 | 三菱电机株式会社 | Semiconductor module and method of manufacturing the same |
| JP2020503688A (en) * | 2016-12-28 | 2020-01-30 | シーメンス アクチエンゲゼルシヤフトＳｉｅｍｅｎｓ Ａｋｔｉｅｎｇｅｓｅｌｌｓｃｈａｆｔ | Semiconductor module having first and second connection elements for connecting semiconductor chips and manufacturing method |
| CN113784499A (en) * | 2021-08-05 | 2021-12-10 | 珠海市晶讯物联技术有限公司 | Finished circuit board and method for module heat dissipation |
-
1995
- 1995-08-10 JP JP20478695A patent/JP3360778B2/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7038313B2 (en) * | 2003-05-06 | 2006-05-02 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of manufacturing the same |
| KR100705868B1 (en) * | 2003-05-06 | 2007-04-10 | 후지 덴키 디바이스 테크놀로지 가부시키가이샤 | Semiconductor device and the method of manufacturing the same |
| CN100390977C (en) * | 2003-05-06 | 2008-05-28 | 富士电机电子设备技术株式会社 | Semiconductor device and its manufacturing method |
| CN102263092A (en) * | 2010-05-31 | 2011-11-30 | 三菱电机株式会社 | Semiconductor module and method of manufacturing the same |
| JP2020503688A (en) * | 2016-12-28 | 2020-01-30 | シーメンス アクチエンゲゼルシヤフトＳｉｅｍｅｎｓ Ａｋｔｉｅｎｇｅｓｅｌｌｓｃｈａｆｔ | Semiconductor module having first and second connection elements for connecting semiconductor chips and manufacturing method |
| US11837571B2 (en) | 2016-12-28 | 2023-12-05 | Siemens Aktiengesellschaft | Semiconductor module comprising a first and second connecting element for connecting a semiconductor chip, and also production method |
| CN113784499A (en) * | 2021-08-05 | 2021-12-10 | 珠海市晶讯物联技术有限公司 | Finished circuit board and method for module heat dissipation |
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| Publication number | Publication date |
|---|---|
| JP3360778B2 (en) | 2002-12-24 |
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