JPH0945964A - Chip mount led element and production thereof - Google Patents

Chip mount led element and production thereof

Info

Publication number
JPH0945964A
JPH0945964A JP20935495A JP20935495A JPH0945964A JP H0945964 A JPH0945964 A JP H0945964A JP 20935495 A JP20935495 A JP 20935495A JP 20935495 A JP20935495 A JP 20935495A JP H0945964 A JPH0945964 A JP H0945964A
Authority
JP
Japan
Prior art keywords
electrode plate
led
chip
electrode
led chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20935495A
Other languages
Japanese (ja)
Inventor
Takeo Itou
多計夫 伊藤
Maki Kuriyama
真樹 栗山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Stanley Electric Co Ltd
Original Assignee
Stanley Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stanley Electric Co Ltd filed Critical Stanley Electric Co Ltd
Priority to JP20935495A priority Critical patent/JPH0945964A/en
Publication of JPH0945964A publication Critical patent/JPH0945964A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To miniaturize an LED element by bonding electrode plates, having an area larger than the end part, concentrically to the opposite ends of P and N poles of an LED chip while forming an extended part over the entire circumference on the side face of the chip and covering the space between the extended parts with transparent resin. SOLUTION: A conductive bonding material 3 is printed in dots, at a predetermined pitch P, in the longitudinal and lateral directions on one side of an electrode plate 1. A plurality of LED chips 4 are mounted on a bonding agent 3 which abutting on one N pole side, for example, and arranged on the electrode plate 1 at the predetermined pitch P. The other electrode 2 is also applied, on one side thereof, with the bonding material 3 at the same pitch P as the electrode plate 1. An electrode plate 2 is then mounted to abut on the LED chip 4 on the other electrode P side thereof thus clamping the LED chip 4 by means of the electrode plates 1, 2. It is passed through a heating furnace and bonded through the bonding material 3 before transparent epoxy resin is injected between the electrode plates 1, 2 and cured. Finally, the electrode plate 1, 2 are cut off longitudinally and laterally thus miniaturizing the LED element.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、例えばプリント回
路基板上に取付けるときに、チップマウントと称されて
前記基板に取付孔などを設けることなく取付けられる構
成としたLED素子に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LED element which is called a chip mount and can be mounted on a printed circuit board without providing mounting holes in the board.

【0002】[0002]

【従来の技術】従来のこの種のチップマウント用LED
素子90の構成の例を示すのが図9及び図10であり、
例えばプリント回路基板で形成される基板91には上面
にパット部91aと配線部91bとが設けられると共
に、両端部には側面から底面に到る端子部91cが設け
られ、一方の端子部91cはパット部91aに接続さ
れ、他方の端子部91cは配線部91bに接続されてい
る。
2. Description of the Related Art A conventional LED for chip mounting of this type
9 and 10 show examples of the configuration of the element 90,
For example, a board 91 formed of a printed circuit board is provided with a pad portion 91a and a wiring portion 91b on the upper surface, terminal portions 91c extending from the side surfaces to the bottom surface are provided on both end portions, and one terminal portion 91c is The pad portion 91a is connected, and the other terminal portion 91c is connected to the wiring portion 91b.

【0003】そして、前記基板91の前記パット部91
aにはLEDチップ92が導電性接着材などでダイボン
ドされ、更に金ワイヤー93で配線部91bとの配線が
行われた後に、エポキシ樹脂などによる透明樹脂で前記
LEDチップ92と金ワイヤー93とを封止するカバー
94を設けることでチップマウント用LED素子90は
完成される。
The pad portion 91 of the substrate 91
The LED chip 92 is die-bonded to a by a conductive adhesive or the like, and after the gold wire 93 is connected to the wiring portion 91b, the LED chip 92 and the gold wire 93 are connected to each other by a transparent resin such as an epoxy resin. The chip mount LED element 90 is completed by providing the sealing cover 94.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、前記し
た従来のチップマウント用LED素子90においては、
第一には基板91上で金ワイヤー93による配線を行う
必要があり、この金ワイヤー93には断線防止のために
適宜の弛みをもって引き回すことが必要とされ、そのた
めの引き回し寸法などを考慮すると前記カバー94の小
型化に限界を生じ、結果としてチップマウント用LED
素子90の小型化が困難となる問題点を生じている。
However, in the above-mentioned conventional LED element 90 for chip mounting,
First, it is necessary to perform wiring with the gold wire 93 on the substrate 91, and it is necessary to draw the gold wire 93 with appropriate slack to prevent disconnection. There is a limit to miniaturization of the cover 94, and as a result, the LED for chip mounting
This causes a problem that it is difficult to reduce the size of the element 90.

【0005】また、第二には、前記基板91には、両端
部の側面にも端子部91cが必要とされ通常にこのよう
な絶縁性の部分に導電性の皮膜を形成するのには無電解
メッキ(化学メッキ)などで別途に加工を行わなくては
成らず、また、金ワイヤー93による配線が行われるこ
とで、少なくとも配線部91bには金メッキを施す必要
を生じ、この基板91が高価となって、チップマウント
用LED素子90全体がコストアップする問題点も生
じ、これらの点の解決が課題とされるものとなってい
る。
Secondly, the substrate 91 requires terminal portions 91c also on the side surfaces of both end portions, and it is usually not possible to form a conductive film on such an insulating portion. Since it is necessary to separately perform processing such as electrolytic plating (chemical plating), and wiring is performed with the gold wire 93, at least the wiring portion 91b needs to be plated with gold, and the substrate 91 is expensive. As a result, there arises a problem that the cost of the LED element 90 for chip mounting as a whole increases, and it is a problem to solve these problems.

【0006】[0006]

【課題を解決するための手段】本発明は、前記した従来
のチップマウント用LED素子に生じる課題を解決する
ための具体的な手段として、LEDチップのP極側とN
極側の両端部にはこの端部の面積よりも広い面積の電極
板が同芯に接合されて前記LEDチップの側面の全周方
向に張出部が形成され、前記LEDチップの側面は前記
張出部間に充填される透明樹脂で覆われていることを特
徴とするチップマウント用LED素子及びその製造方法
を提供することで課題を解決するものである。
The present invention is a concrete means for solving the above-mentioned problems that occur in the conventional LED element for chip mounting.
Electrode plates having an area larger than the area of this end are concentrically joined to both ends on the pole side to form an overhanging portion in the entire circumferential direction of the side surface of the LED chip, and the side surface of the LED chip is It is an object of the present invention to provide a chip mount LED element characterized by being covered with a transparent resin filled between the overhanging portions and a method for manufacturing the same.

【0007】[0007]

【発明の実施の形態】つぎに、本発明を図に示す実施形
態に基づいて詳細に説明する。図1〜図4は本発明に係
るチップマウント用LED素子の製造方法を工程の順に
示すものであり、図1中に符号1及び符号2で示すもの
は電極板であり、この電極板1、2は例えば金属など導
電性の部材で形成されるものであり、この実施形態にお
いては平板状とされている。
Next, the present invention will be described in detail based on an embodiment shown in the drawings. 1 to 4 show a method of manufacturing an LED element for chip mounting according to the present invention in the order of steps. Reference numerals 1 and 2 in FIG. 1 denote electrode plates. 2 is formed of a conductive member such as metal, and has a flat plate shape in this embodiment.

【0008】このときに、一方の電極板1の一方の面に
は、例えばペースト状ハンダとした導電性の接合材3
が、間隔を所定のピッチPとする縦横列にドット状に印
刷手段などにより塗付されていて、LEDチップ4が一
方の極、例えばN極側で接するように前記接合材3上に
載置され、従って、前記LEDチップ4は、予めに塗付
されている前記接合材3の縦横列に従って、電極板1の
一方の面に所定のピッチPで縦横列に整列するものとな
る。
At this time, on one surface of the one electrode plate 1, for example, a conductive bonding material 3 made of paste solder is used.
Are coated in dots in a vertical and horizontal row with a predetermined pitch P by a printing means or the like, and placed on the bonding material 3 so that the LED chips 4 are in contact with one pole, for example, the N pole side. Therefore, the LED chips 4 are arranged in rows and columns at a predetermined pitch P on one surface of the electrode plate 1 according to the rows and columns of the bonding material 3 previously applied.

【0009】また、他方の電極板2の一方の面にも接合
材3が同一のピッチPとする縦横列に塗付されていて、
一方の電極板1の接合材3上へのLEDチップ4の載置
が終了した時点で、他方の電極板2が接合材3の位置を
LEDチップ4の他方の極、例えばP極側に重ねるよう
に載置され、これによりLEDチップ4は電極板1と電
極板2とで挟持される。
Further, the bonding material 3 is also applied to one surface of the other electrode plate 2 in vertical and horizontal rows with the same pitch P,
When the mounting of the LED chip 4 on the bonding material 3 of the one electrode plate 1 is completed, the other electrode plate 2 overlaps the position of the bonding material 3 with the other pole of the LED chip 4, for example, the P pole side. Thus, the LED chip 4 is sandwiched between the electrode plate 1 and the electrode plate 2.

【0010】上記の状態を保ち、リフロー炉と称されて
いる加熱炉を通過させ、適宜な温度に加熱を行うなどす
れば、前記接合材3は溶融してLEDチップ4の夫々の
極側に接着するものとなり、図2に示すように電極板
1、2とLEDチップ4とは一体化するものとなる。
When the above state is maintained and the material is passed through a heating furnace called a reflow furnace to heat it to an appropriate temperature, the bonding material 3 is melted and adheres to the respective pole sides of the LED chip 4. As a result, the electrode plates 1 and 2 and the LED chip 4 are integrated as shown in FIG.

【0011】続いて、本発明では図3に示すように前記
電極板1と電極板2との間にエポキシ樹脂などの透明樹
脂5を注入し硬化させる。このときに、上記にも説明し
たようにLEDチップ4は所定のピッチPで縦横列に整
列されているので、前記LEDチップ4の露出している
4面の全ては前記透明樹脂5により覆われるものとな
り、前記電極板1、2の2面と加えて全面が外気から遮
断される。
Subsequently, in the present invention, as shown in FIG. 3, a transparent resin 5 such as an epoxy resin is injected between the electrode plate 1 and the electrode plate 2 and cured. At this time, as described above, since the LED chips 4 are aligned in the vertical and horizontal rows at the predetermined pitch P, all the exposed four surfaces of the LED chips 4 are covered with the transparent resin 5. In addition to the two surfaces of the electrode plates 1 and 2, the entire surface is shielded from the outside air.

【0012】更に続いて、本発明では図4に示す切断工
程を行うものであり、例えば薄刃のダイヤモンドホイル
カッターなどで、前記LEDチップ4間の間隔である所
定のピッチPを二等分するように切断する。このとき
に、前記LEDチップ4は縦横列に整列されているもの
であるので、上記の切断も直角の二方向に対して行われ
れ、図中に符号10で示すようにチップマウント用LE
D素子が得られるものとなる。
Further, in the present invention, the cutting step shown in FIG. 4 is carried out. For example, a predetermined pitch P, which is the interval between the LED chips 4, is divided into two equal parts with a thin blade diamond wheel cutter or the like. Disconnect. At this time, since the LED chips 4 are arranged in rows and columns, the above cutting is also performed in two directions at right angles, and as shown by reference numeral 10 in the drawing, LE for chip mounting is used.
The D element can be obtained.

【0013】ここで、前記LEDチップ4間の間隔であ
る所定のピッチPについて説明を行うと、このピッチP
は前記LEDチップ4の寸法と、このLEDチップ4を
覆うのに必要とされる透明樹脂5の厚みと、前記したダ
イヤモンドホイルカッターの切断代とで定まるものであ
る。
The predetermined pitch P, which is the interval between the LED chips 4, will be described below.
Is determined by the size of the LED chip 4, the thickness of the transparent resin 5 required to cover the LED chip 4, and the cutting allowance of the diamond foil cutter.

【0014】具体的には、例えば前記LEDチップ4が
0.4mm角であり、前記透明樹脂5の厚みとして0.3
mmが必要であり、前記したダイヤモンドホイルカッター
の切断代として0.2mmが必要であれば、前記ピッチP
としては(LEDチップ4の寸法)+(透明樹脂5の厚
み×2倍)+(切断代)=1.2mmを設定すれば良いも
のとなる。
Specifically, for example, the LED chip 4 is 0.4 mm square and the thickness of the transparent resin 5 is 0.3 mm.
mm is required, and if the cutting allowance of the diamond foil cutter is 0.2 mm, the pitch P
For this, it is sufficient to set (dimension of LED chip 4) + (thickness of transparent resin 5 × 2) + (cutting margin) = 1.2 mm.

【0015】図5及び図6に示すものは、上記に説明し
た本発明に係る製造方法とすることで得られるチップマ
ウント用LED素子10であり、LEDチップ4のP極
側とN極側の端部には、この端部の面積よりも広い面積
の電極板1、2が全周方向に張出部を有するように接合
され、その電極板1、2の張出部間には透明樹脂5が充
填され、これにより、前記LEDチップ4の側面が透明
樹脂5で覆われるものとなっている。
FIG. 5 and FIG. 6 show the LED element 10 for chip mounting obtained by the manufacturing method according to the present invention described above. The LED element 10 has a P-pole side and an N-pole side of the LED chip 4. Electrode plates 1 and 2 having an area larger than the area of the ends are joined to the ends so as to have bulges in the entire circumferential direction, and transparent resin is provided between the bulges of the electrodes 1 and 2. 5, the side surface of the LED chip 4 is covered with the transparent resin 5.

【0016】従って、図7に示すように前記チップマウ
ント用LED素子10を例えばプリント回路基板20に
取付ける際には、このプリント回路基板20上に所定間
隔で一対のパット21を設けペースト状のハンダ22を
塗付しておき、該パット21上に前記電極板1、2が位
置するように載置しリフロー炉で加熱を行えば、ハンダ
22は溶融し電極板1、2に融合し、目的とするチップ
マウントが行えるものとなる。
Therefore, as shown in FIG. 7, when the chip mounting LED element 10 is mounted on, for example, the printed circuit board 20, a pair of pads 21 are provided on the printed circuit board 20 at a predetermined interval so that paste-like solder is provided. 22 is applied, placed on the pad 21 so that the electrode plates 1 and 2 are positioned and heated in a reflow furnace, the solder 22 is melted and fused to the electrode plates 1 and 2, It becomes possible to mount the chip.

【0017】尚、図6に示すように電極板1、2の何れ
か一方、例えば電極板1の、N極に接するのとは反対側
となる面にニッケルなどによるメッキ層6を施すものと
し、他方の電極板2には施さないものとしておけば、こ
のメッキ層6の有無がチップマウント用LED素子10
の極性表示を行うものとなり、上記したプリント回路基
板20への取付る際の極性の判別を容易にする。
As shown in FIG. 6, it is assumed that either one of the electrode plates 1 and 2, for example, the surface of the electrode plate 1 opposite to the side in contact with the N pole is provided with a plating layer 6 of nickel or the like. If the other electrode plate 2 is not applied, the presence or absence of the plating layer 6 determines the LED element 10 for chip mounting.
Is displayed, which facilitates the determination of the polarity when mounting on the printed circuit board 20 described above.

【0018】次いで、本発明の作用及び効果について説
明を行えば、先ず、上記の製造方法としたことで、LE
Dチップ4はN極及びP極に接合される電極板1、2
が、プリント回路基板20への取付時の接続部となるも
のとなる。従って、上記の電極板1、2の取付でLED
チップ4に対する配線工程は完了し、従来例のように手
間と技術を要する金ワイヤによる配線工程が不要となり
工程が簡素化する。
Next, the operation and effect of the present invention will be described. First, by using the above manufacturing method, LE
The D chip 4 is an electrode plate 1, 2 which is joined to the N pole and the P pole.
Serves as a connecting portion when mounted on the printed circuit board 20. Therefore, by mounting the above electrode plates 1 and 2, the LED
The wiring process for the chip 4 is completed, and the wiring process using a gold wire, which requires labor and technology unlike the conventional example, is not necessary, and the process is simplified.

【0019】同時に、上記の電極板1、2の取付工程及
び透明樹脂5の注入工程は、本発明の製造方法とするこ
とで、複数のLEDチップ4に対し同時に行えるものと
なり、一個あたりの作業時間を短縮し、上記の簡素化と
併せて生産性の向上とコストダウンとを可能とする。
At the same time, the step of attaching the electrode plates 1 and 2 and the step of injecting the transparent resin 5 can be simultaneously performed on a plurality of LED chips 4 by using the manufacturing method of the present invention. The time is shortened, and the productivity is improved and the cost is reduced in addition to the simplification.

【0020】また、上記の製造方法により生産されるチ
ップマウント用LED素子10においては、前記したよ
うに金ワイヤによる配線が不要となったことで、透明樹
脂5は金ワイヤの弛みなどを覆うものとする必要がな
く、防湿など専らにLEDチップ4の保護が行えれば良
いものとなるので、厚みなどを最低必要限のものとする
ことができ、チップマウント用LED素子10の小型化
も可能とする。
In the LED element 10 for chip mounting produced by the above manufacturing method, the transparent resin 5 covers the slack of the gold wire because the wiring by the gold wire is not required as described above. Since it suffices that the LED chip 4 is protected exclusively from moisture, it is possible to minimize the thickness and the like, and it is also possible to downsize the LED element 10 for chip mounting. And

【0021】また、金ワイヤによる配線が不要となった
ことで、接続される部分を金メッキ処理を行う必要もな
く、加えて、LEDチップ4のN極、P極の両極面に接
合された電極板1、2で直接にプリント回路基板20へ
の取付けが行えるものとして従来例の基板を不要とし、
上記した工程面に加え材料面からもコストダウンを可能
にする。
Further, since the wiring by the gold wire is not required, it is not necessary to perform the gold plating treatment on the connected portion, and in addition, the electrodes joined to the N and P poles of the LED chip 4 are joined together. Since the boards 1 and 2 can be directly attached to the printed circuit board 20, the board of the conventional example is unnecessary,
In addition to the process aspect described above, cost reduction is possible from the material aspect.

【0022】図8は本発明の別の実施形態を示すもので
あり、前の実施形態では電極板1、2は平板状のものと
して説明を行ったが、本発明はこれを限定するものでな
く、例えばプレス加工などにより、夫々が対峙する側の
面に溝状の凹部1a、2aを設けて、電極板1、2と透
明樹脂5との接合力を強化し、LEDチップ4に加わる
応力の低減を図るなどの変更は自在である。
FIG. 8 shows another embodiment of the present invention. In the previous embodiment, the electrode plates 1 and 2 are described as flat plates, but the present invention is not limited thereto. Instead, for example, by pressing or the like, groove-shaped recesses 1a and 2a are provided on the surfaces facing each other to strengthen the bonding force between the electrode plates 1 and 2 and the transparent resin 5 and to apply stress to the LED chip 4. It is possible to make changes such as reduction of

【0023】[0023]

【発明の効果】以上に説明したように本発明により、2
枚の電極板間に複数のLEDチップを夫々が所定間隔を
保つ縦横列に整列させて配列し、且つ、一方の電極板に
はP極側、他方の電極板にはN極側で接するようにして
挟持させ、この状態で前記LEDチップと電極板とを導
電性の接合材を用いて接合し、その後に前記電極板間に
透明樹脂を注入して硬化させ、然る後に前記電極板を前
記LEDチップの縦横列の配列の中間の位置で切断し個
々に分離して形成するチップマウント用LED素子の製
造方法としたことで、第一には、製造工程中から最も煩
雑な工程である金ワイヤによる配線工程を不要とし、生
産性を向上させてコストダウンに極めて優れた効果を奏
するものである。
As described above, according to the present invention, 2
A plurality of LED chips are arranged between the electrode plates so as to be arranged in vertical and horizontal rows, each of which has a predetermined interval, and one electrode plate is in contact with the P pole side and the other electrode plate is in the N pole side. The LED chip and the electrode plate are bonded together by using a conductive bonding material in this state, and then a transparent resin is injected between the electrode plates to cure the resin, and then the electrode plate is fixed. First, the method is the most complicated step from the manufacturing steps because the method for manufacturing the LED element for chip mounting is formed by cutting the LED chip at an intermediate position in the vertical and horizontal rows and individually separating the LED chips. This eliminates the need for a wiring process using gold wires, improves productivity, and has an extremely excellent effect on cost reduction.

【0024】また第二には、上記の製造方法としたこと
で、得られるチップマウント用LED素子は、前記金ワ
イヤの引き回し代を考慮して透明樹脂などの寸法を設定
する必要がなく、必要最低限度のものとして設定するこ
とができるものとなるので、チップマウント用LED素
子の小型化にも優れた効果を奏するものとなる。
Secondly, since the above manufacturing method is adopted, the obtained LED element for chip mounting does not need to set the dimensions of the transparent resin or the like in consideration of the leading margin of the gold wire. Since it can be set as the lowest limit, it also has an excellent effect in reducing the size of the LED element for chip mounting.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明に係るチップマウント用LED素子の
製造方法の一実施形態における第一の工程を示す説明図
である。
FIG. 1 is an explanatory diagram showing a first step in an embodiment of a method for manufacturing a chip-mount LED element according to the present invention.

【図2】 同じく第二の工程を示す説明図である。FIG. 2 is likewise an explanatory view showing a second step.

【図3】 同じく第三の工程を示す説明図である。FIG. 3 is likewise an explanatory view showing a third step.

【図4】 同じく第四の工程を示す説明図である。FIG. 4 is likewise an explanatory view showing a fourth step.

【図5】 本発明に係るチップマウント用LED素子の
一実施形態を示す斜視図である。
FIG. 5 is a perspective view showing an embodiment of an LED element for chip mounting according to the present invention.

【図6】 図5のA―A線に沿う断面図である。6 is a sectional view taken along the line AA of FIG.

【図7】 本発明に係るチップマウント用LED素子の
プリント回路基板への取付状態を示す説明図である。
FIG. 7 is an explanatory view showing a mounting state of a chip mounting LED element according to the present invention on a printed circuit board.

【図8】 同じく本発明に係るチップマウント用LED
素子の別の実施形態を示す断面図である。
FIG. 8 is likewise an LED for chip mounting according to the present invention.
It is sectional drawing which shows another embodiment of an element.

【図9】 従来例を示す斜視図である。FIG. 9 is a perspective view showing a conventional example.

【図10】 図9のB―B線に沿う断面図である。10 is a cross-sectional view taken along the line BB of FIG.

【符号の説明】[Explanation of symbols]

1、2……電極板 1a、2a……凹部 3……接合材 4……LEDチップ 5……透明樹脂 6……メッキ層 10……チップマウント用LED素子 20……プリント回路基板 1, 2 ... Electrode plate 1a, 2a ... Recess 3 ... Bonding material 4 ... LED chip 5 ... Transparent resin 6 ... Plating layer 10 ... Chip mounting LED element 20 ... Printed circuit board

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 2枚の電極板間に複数のLEDチップを
夫々が所定間隔を保つ縦横列に整列させて配列し、且
つ、一方の電極板にはP極側、他方の電極板にはN極側
で接するようにして挟持させ、この状態で前記LEDチ
ップと電極板とを導電性の接合材を用いて接合し、その
後に前記電極板間に透明樹脂を注入して硬化させ、然る
後に前記電極板を前記LEDチップの縦横列の配列の中
間の位置で切断し個々に分離して形成することを特徴と
するチップマウント用LED素子の製造方法。
1. A plurality of LED chips are arranged between two electrode plates so as to be arranged in vertical and horizontal rows, each of which has a predetermined interval, and one electrode plate has a P-pole side and the other electrode plate has a P-pole side. It is sandwiched so as to be in contact with the N pole side, and in this state, the LED chip and the electrode plate are bonded using a conductive bonding material, and then a transparent resin is injected between the electrode plates and cured, After that, the electrode plate is cut at an intermediate position of the arrangement of the LED chips in the vertical and horizontal rows, and individually formed to form the LED element for chip mounting.
【請求項2】 LEDチップのP極側とN極側の両端部
にはこの端部の面積よりも広い面積の電極板が同芯に接
合されて前記LEDチップの側面の全周方向に張出部が
形成され、前記LEDチップの側面は前記張出部間に充
填される透明樹脂で覆われていることを特徴とするチッ
プマウント用LED素子。
2. An electrode plate having an area larger than the area of this end is concentrically bonded to both ends of the LED chip on the P-pole side and the N-pole side, and the electrode plate is stretched in the entire circumferential direction of the side surface of the LED chip. An LED element for chip mounting, characterized in that a protruding portion is formed and a side surface of the LED chip is covered with a transparent resin filled between the protruding portions.
JP20935495A 1995-07-26 1995-07-26 Chip mount led element and production thereof Pending JPH0945964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20935495A JPH0945964A (en) 1995-07-26 1995-07-26 Chip mount led element and production thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20935495A JPH0945964A (en) 1995-07-26 1995-07-26 Chip mount led element and production thereof

Publications (1)

Publication Number Publication Date
JPH0945964A true JPH0945964A (en) 1997-02-14

Family

ID=16571563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20935495A Pending JPH0945964A (en) 1995-07-26 1995-07-26 Chip mount led element and production thereof

Country Status (1)

Country Link
JP (1) JPH0945964A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11307816A (en) * 1998-04-24 1999-11-05 Citizen Electronics Co Ltd Package structure for chip semiconductor and its manufacture
JP2002261335A (en) * 2000-07-18 2002-09-13 Sony Corp Image display device and manufacturing method therefor
KR100567549B1 (en) * 2002-05-11 2006-04-05 서울반도체 주식회사 Method of Manufacturing Light-emitting diode
CN100350640C (en) * 2004-01-16 2007-11-21 汉欣企业有限公司 Light-emitting diode with photon crystal and its device
CN108598102A (en) * 2012-08-15 2018-09-28 晶元光电股份有限公司 Light-emitting device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11307816A (en) * 1998-04-24 1999-11-05 Citizen Electronics Co Ltd Package structure for chip semiconductor and its manufacture
JP2002261335A (en) * 2000-07-18 2002-09-13 Sony Corp Image display device and manufacturing method therefor
KR100567549B1 (en) * 2002-05-11 2006-04-05 서울반도체 주식회사 Method of Manufacturing Light-emitting diode
CN100350640C (en) * 2004-01-16 2007-11-21 汉欣企业有限公司 Light-emitting diode with photon crystal and its device
CN108598102A (en) * 2012-08-15 2018-09-28 晶元光电股份有限公司 Light-emitting device
CN108598102B (en) * 2012-08-15 2021-11-05 晶元光电股份有限公司 Light emitting device

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