JPH09319328A - Writing method for plasma display panel - Google Patents
Writing method for plasma display panelInfo
- Publication number
- JPH09319328A JPH09319328A JP8135171A JP13517196A JPH09319328A JP H09319328 A JPH09319328 A JP H09319328A JP 8135171 A JP8135171 A JP 8135171A JP 13517196 A JP13517196 A JP 13517196A JP H09319328 A JPH09319328 A JP H09319328A
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- independent
- scan pulse
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はパーソナルコンピュ
ータやワークステーションなどのディスプレイ装置、平
面型の壁掛けテレビジョン、広告、情報等の表示装置等
に用いられるＡＣ型プラズマディスプレイパネルの駆動
方式に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving system of an AC type plasma display panel used for a display device such as a personal computer or a workstation, a flat wall-mounted television, a display device for advertisements, information and the like.
【０００２】[0002]
【従来の技術】従来のＡＣ型プラズマディスプレイでは
例えば特開平６−１８６９２７号公報に開示されている
ように前面板に配置されたＹ電極に印加される書込みパ
ルスは一方向から順番に印加されていた。2. Description of the Related Art In a conventional AC plasma display, for example, as disclosed in Japanese Patent Application Laid-Open No. 6-186927, write pulses applied to a Y electrode arranged on a front plate are sequentially applied from one direction. It was
【０００３】[0003]
【発明が解決しようとする課題】これに対して、プラズ
マディスプレイの高精細化が進み、隣接する電極の間隔
が狭くなると、隣接するＹ電極に印加される書込みパル
スでの放電が発生しやすくなる。また、書込み放電によ
り形成された荷電粒子が隣接電極側へ移動しやすくな
り、誤放電を起こす可能性が高くなり、画面の乱れとな
る恐れがあった。On the other hand, when the definition of the plasma display becomes higher and the interval between the adjacent electrodes becomes narrower, discharge by the write pulse applied to the adjacent Y electrode is likely to occur. . In addition, the charged particles formed by the address discharge are likely to move to the adjacent electrode side, the possibility of erroneous discharge is increased, and the screen may be disturbed.
【０００４】[0004]
【課題を解決するための手段】上記課題に対して本発明
では、例えば、まずＹ電極の奇数行のみ順次連続して書
込みパルスを印加した後、偶数行に順次連続して書込み
パルスを印加するというように隣接する電極では書込み
パルスが連続しないようにして誤放電を防止する。In order to solve the above problems, the present invention, for example, first applies the write pulse sequentially only to the odd rows of the Y electrodes, and then sequentially applies the write pulse to the even rows. In this way, the write pulse is not continuous between the adjacent electrodes to prevent erroneous discharge.
【０００５】[0005]
【発明の実施の形態】以下、図１から図１１により本発
明の実施の形態を説明する。ここにおいて、２１は前面
ガラス基板、２２は共通行Ｘ電極、２３は独立行Ｙ電
極、２８は背面ガラス基板、２９はアドレスＡ電極、３
１は隔壁、３２は蛍光体、３３は放電空間、３４は正の
電荷、３５は負の電荷、４１〜４８はサブフィールド、
４９は予備放電期間、５０は書込み期間、５１は発光表
示期間、６０は書込み期間にアドレスＡ電極に印加する
電圧波形、６１〜６６は書込み期間に独立行Ｙ電極に印
加する電圧波形、７０は書込み期間に共通行Ｘ電極に印
加する電圧波形、をそれぞれ表わす。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS. Here, 21 is a front glass substrate, 22 is a common row X electrode, 23 is an independent row Y electrode, 28 is a rear glass substrate, 29 is an address A electrode, 3
1 is a partition wall, 32 is a phosphor, 33 is a discharge space, 34 is a positive charge, 35 is a negative charge, 41 to 48 are subfields,
49 is a preliminary discharge period, 50 is a writing period, 51 is a light emitting display period, 60 is a voltage waveform applied to the address A electrode in the writing period, 61 to 66 are voltage waveforms applied to the independent row Y electrodes in the writing period, and 70 is The waveforms of the voltages applied to the common-row X electrodes in the writing period are shown respectively.
【０００６】図２は本発明のプラズマディスプレイパネ
ルの構造の一部を示す分解斜視図である。前面ガラス基
板２１の下面には透明な共通行Ｘ電極２２と透明な独立
行Ｙ電極２３が設けられている。また、それぞれの電極
にはＸバス電極２４とＹバス電極２５が積層されてい
る。さらに、その下面には誘電体２６とＭｇＯ等の保護
層２７が設けられている。FIG. 2 is an exploded perspective view showing a part of the structure of the plasma display panel of the present invention. A transparent common row X electrode 22 and a transparent independent row Y electrode 23 are provided on the lower surface of the front glass substrate 21. An X bus electrode 24 and a Y bus electrode 25 are laminated on each electrode. Further, a dielectric 26 and a protective layer 27 such as MgO are provided on the lower surface thereof.
【０００７】一方、背面ガラス基板２８の上面には前面
ガラス基板２１の共通行Ｘ電極２２と独立行Ｙ電極２３
とに直角方向にアドレスＡ電極２９が設けられている。
このアドレスＡ電極２９を誘電体３０が覆っており、そ
の上に隔壁３１がアドレスＡ電極２９と平行に設けられ
ている。さらに、隔壁３１とアドレスＡ電極２９上には
蛍光体３２が塗布されている。On the other hand, on the upper surface of the rear glass substrate 28, a common row X electrode 22 and an independent row Y electrode 23 of the front glass substrate 21 are provided.
An address A electrode 29 is provided at a right angle to and.
A dielectric 30 covers the address A electrode 29, and a partition 31 is provided on the dielectric 30 in parallel with the address A electrode 29. Further, a phosphor 32 is applied on the partition wall 31 and the address A electrode 29.
【０００８】図３は図２中矢印Ａ方向から見たプラズマ
ディスプレイパネルの１つのセル（画素の最小単位）の
断面図である。アドレスＡ電極２９は隔壁３１の中間に
位置する。また、前面ガラス基板２１と背面ガラス基板
２８の間の放電空間３３にはＮｅ、Ｘｅ等の放電ガスが
充填されている。FIG. 3 is a cross-sectional view of one cell (minimum unit of pixel) of the plasma display panel viewed from the direction of arrow A in FIG. The address A electrode 29 is located in the middle of the partition 31. The discharge space 33 between the front glass substrate 21 and the rear glass substrate 28 is filled with a discharge gas such as Ne or Xe.
【０００９】図４は図２中矢印Ｂ方向から見たプラズマ
ディスプレイパネルの３つのセルの断面図である。１セ
ルの境界は概略点線で示す位置である。隣接するセルで
は共通行Ｘ電極２２同士、或いは独立行Ｙ電極２３同士
が隣合うように配置されている。一方、セル間には隔壁
等は無く、放電により発生した荷電粒子の移動は自由で
あり、特に、書込みの際の独立行Ｙ電極２３とアドレス
Ａ電極２９との放電では荷電粒子が隣接するセルの独立
行Ｙ電極２３側へ移りやすい。また、隣接する共通行Ｘ
電極２２同士、或いは独立行Ｙ電極２３同士の誤放電の
可能性もある。FIG. 4 is a sectional view of three cells of the plasma display panel viewed from the direction of arrow B in FIG. The boundary of one cell is a position indicated by an outline dotted line. In the adjacent cells, the common row X electrodes 22 or the independent row Y electrodes 23 are arranged adjacent to each other. On the other hand, there is no partition wall between cells, and the charged particles generated by the discharge are free to move. Particularly, in the discharge between the independent row Y electrode 23 and the address A electrode 29 at the time of writing, the charged particles are adjacent to each other. It is easy to move to the independent row Y electrode 23 side. Also, the adjacent common row X
There is a possibility of erroneous discharge between the electrodes 22 or between the independent row Y electrodes 23.
【００１０】図５は１枚の画を構成する１フィールド期
間の動作を示す図である。１フィールド期間（ａ）は複
数のサブフィールド４１〜４８に分割され、各サブフィ
ールドは（ｂ）、（ｃ）に示すように予備放電期間４
９、発光セルを規定する書込み期間５０、発光表示期間
５１からなる。波形５２は従来技術により書込み期間５
０における１本のアドレスＡ電極２９に印加する電圧波
形、波形５３は共通行Ｘ電極２２に印加する電圧波形、
５４，５５は独立行Ｙ電極２３のｉ行目と（ｉ＋１）行
目に印加する電圧波形であり、それぞれの電圧をＶ０，
Ｖ１，Ｖ２（Ｖ）とする。FIG. 5 is a diagram showing an operation in one field period which constitutes one image. One field period (a) is divided into a plurality of subfields 41 to 48, and each subfield has a pre-discharge period 4 as shown in (b) and (c).
9, a writing period 50 for defining a light emitting cell, and a light emitting display period 51. The waveform 52 has a writing period of 5 according to the conventional technique.
The voltage waveform applied to one address A electrode 29 at 0, the waveform 53 is the voltage waveform applied to the common row X electrode 22,
54 and 55 are voltage waveforms applied to the i-th row and the (i + 1) -th row of the independent row Y electrode 23.
Let V1 and V2 (V).
【００１１】独立行Ｙ電極２３のｉ行目にスキャンパル
ス５６が印加された時、アドレスＡ電極２９に印加する
電圧が正電位Ｖ０であれば、独立行Ｙ電極２３のｉ行目
とそのアドレスＡ電極２９との交点に位置するセルで書
込み放電が起こる。独立行Ｙ電極２３のｉ行目にスキャ
ンパルス５６が印加された時、アドレスＡ電極２９がグ
ランド電位であれば書込み放電は起こらず、そのセルは
非発光セルとなる。このように、書込み期間５０におい
て独立行Ｙ電極２３にはスキャンパルスが１回印加さ
れ、アドレスＡ電極２９にはスキャンパルスに対応して
発光セルではＶ０、非発光セルではグランド電位であ
る。When the scan pulse 56 is applied to the i-th row of the independent row Y electrode 23, if the voltage applied to the address A electrode 29 is a positive potential V0, the i-th row of the independent row Y electrode 23 and its address. Address discharge occurs in the cell located at the intersection with the A electrode 29. When the scan pulse 56 is applied to the i-th row of the independent row Y electrode 23, if the address A electrode 29 is at the ground potential, the address discharge does not occur and the cell becomes a non-light emitting cell. Thus, in the writing period 50, the scan pulse is applied once to the independent row Y electrode 23, and the address A electrode 29 is at V0 in the light emitting cell and at the ground potential in the non-light emitting cell in response to the scan pulse.
【００１２】図１は本発明における書込み期間５０での
アドレスＡ電極２９に印加する電圧波形６０、共通行Ｘ
電極２２に印加する電圧波形７０及び、独立行Ｙ電極２
３に印加する電圧波形６１〜６６であり、独立行Ｙ電極
２３の１行目の電圧波形６１、２行目の電圧波形６２、
３行目の電圧波形６３、４行目の電圧波形６４、（２ｋ
−１）（ｋは自然数）行目の電圧波形６５、２ｋ行目の
電圧波形６６である。独立行Ｙ電極２３にはそれぞれ１
行目スキャンパルス７１、２行目スキャンパルス７２、
３行目スキャンパルス７３、４行目スキャンパルス７
４、（２ｋ−１）行目スキャンパルス７５、２ｋ行目ス
キャンパルス７６が印加される。FIG. 1 shows the voltage waveform 60 applied to the address A electrode 29 in the write period 50 according to the present invention, the common row X.
Voltage waveform 70 applied to electrode 22 and independent row Y electrode 2
Voltage waveforms 61 to 66 applied to the third row, the voltage waveform 61 of the first row of the independent row Y electrode 23, the voltage waveform 62 of the second row,
Voltage waveform 63 on the third row, voltage waveform 64 on the fourth row, (2k
-1) The voltage waveform 65 of the (k is a natural number) line and the voltage waveform 66 of the 2k-th line. 1 for each independent row Y electrode 23
Line scan pulse 71, line 2 scan pulse 72,
3rd row scan pulse 73, 4th row scan pulse 7
4, the (2k-1) th row scan pulse 75 and the 2kth row scan pulse 76 are applied.
【００１３】それぞれのスキャンパルスは独立行Ｙ電極
２３の１，３，５，…，（２ｋ−１）行目の順に１本置
きに印加され、その後、２，４，６，…，２ｋ行目の順
に印加される。尚、独立行Ｙ電極２３が奇数本の場合に
は最後は（２ｋ−２）行目になる。.., (2k-1) th row of the independent row Y electrodes 23 are alternately applied in the order of the rows 2, 3, 6 ,. It is applied in the order of eyes. When the number of independent row Y electrodes 23 is an odd number, the last row is the (2k-2) th row.
【００１４】独立行Ｙ電極２３の１行目においてスキャ
ンパルス７１が印加される時にアドレスＡ電極２９が正
電位であれば、スキャンパルス７１の最初のエッジ７１
ａで放電が起こり、約１μｓｅｃ継続する。その後、ス
キャンパルス７１のグランド電位の期間７１ｂで独立行
Ｙ電極２３の１行目近傍の誘電体上に正の電荷が集ま
る。この時、共通行Ｘ電極２２及び独立行Ｙ電極２３の
他の行は正の電位であるため、正の電荷はこれらの電極
上へは移動しない。If the address A electrode 29 has a positive potential when the scan pulse 71 is applied in the first row of the independent row Y electrodes 23, the first edge 71 of the scan pulse 71 is generated.
Discharge occurs at a and continues for about 1 μsec. After that, in the period 71b of the ground potential of the scan pulse 71, positive charges are collected on the dielectric near the first row of the independent row Y electrode 23. At this time, since the other rows of the common row X electrode 22 and the independent row Y electrode 23 have a positive potential, positive charges do not move onto these electrodes.
【００１５】次に、独立行Ｙ電極２３の３行目において
スキャンパルス７３が印加される時には、同様にスキャ
ンパルス７３の最初のエッジ７３ａで放電が起こり、そ
の後、スキャンパルス７３のグランド電位の期間７３ｂ
で独立行Ｙ電極２３の３行目近傍の誘電体上に正の電荷
が集まる。独立行Ｙ電極２３の３行目においてスキャン
パルス７３が印加される時にアドレスＡ電極２９がグラ
ンド電位であれば放電は起こらず、独立行Ｙ電極２３の
１行目とは距離が離れている上に、間に複数の正電位の
電極があるためにスキャンパルス７３のグランド電位の
期間７３ｂにおいても、独立行Ｙ電極２３の３行目近傍
の誘電体上に正の電荷は集まらず、このセルには書込み
は行なわれない。順次、これが（２ｋ−１）行目まで繰
り返され、同様に確実な書込み操作が行なわれる。Next, when the scan pulse 73 is applied to the third row of the independent row Y electrodes 23, the discharge similarly occurs at the first edge 73a of the scan pulse 73, and thereafter, the period of the ground potential of the scan pulse 73. 73b
Then, positive charges are collected on the dielectric near the third row of the independent row Y electrode 23. If the address A electrode 29 is at the ground potential when the scan pulse 73 is applied to the third row of the independent row Y electrode 23, no discharge occurs, and the distance from the first row of the independent row Y electrode 23 is large. In addition, since there are a plurality of positive potential electrodes between them, even in the period 73b of the ground potential of the scan pulse 73, positive charges are not collected on the dielectric near the third row of the independent row Y electrode 23, and this cell Is not written to. This is sequentially repeated up to the (2k-1) th row, and a reliable write operation is performed in the same manner.
【００１６】独立行Ｙ電極２３の（２ｋ−１）行目まで
スキャン操作が終わったら次に、独立行Ｙ電極２３の２
行目においてスキャンパルス７２が印加される。この時
には、隣接する独立行Ｙ電極２３の１行目のスキャンパ
ルス７１及び３行目のスキャンパルス７３からは数百μ
ｓｅｃ遅れており、時間的に十分離れているため、スキ
ャンパルス同士で放電を起こすことはなく、誤放電を防
止している。順次、これが２ｋ行目まで繰り返され、同
様に確実な書込み操作が行なわれる。以上のようにして
１行目から２ｋ行目までの書込み操作を行なう。After the scanning operation is completed up to the (2k-1) th row of the independent row Y electrode 23, the 2nd row of the independent row Y electrode 23 is then scanned.
The scan pulse 72 is applied in the row. At this time, several hundreds μm from the scan pulse 71 of the first row and the scan pulse 73 of the third row of the adjacent independent Y electrodes 23.
Since they are delayed by sec and are sufficiently separated in time, discharge does not occur between scan pulses, and erroneous discharge is prevented. This is sequentially repeated up to the 2kth row, and a reliable writing operation is performed in the same manner. As described above, the write operation from the first row to the 2kth row is performed.
【００１７】図６は独立行Ｙ電極２３の１行目とアドレ
スＡ電極２９とで行なわれる書込み放電の際の電荷の様
子を示す概念図である。放電が進行している最中には放
電空間３３に正の電荷３４と負の電荷３５が混在してい
る。FIG. 6 is a conceptual diagram showing the state of electric charges during address discharge performed by the first row of the independent row Y electrodes 23 and the address A electrodes 29. The positive charge 34 and the negative charge 35 are mixed in the discharge space 33 during the progress of discharge.
【００１８】図７は独立行Ｙ電極２３の１行目のスキャ
ンパルス７１で書込み放電が起こった場合のグランド電
位の期間７１ｂにおける電荷の移動を示す概念図であ
る。独立行Ｙ電極２３の１行目以外は全て正の電位であ
るため、正の電荷３４は独立行Ｙ電極２３の１行目近傍
の誘電体上に集まる。負の電荷３５は他の電極近傍の誘
電体上に集まり、一部は放電空間３３に残るか、隔壁３
１または蛍光体３２上に付着する。FIG. 7 is a conceptual diagram showing the movement of charges during the period 71b of the ground potential when the address discharge is generated by the scan pulse 71 of the first row of the independent row Y electrode 23. Since all of the independent row Y electrodes 23 except the first row have a positive potential, the positive charges 34 gather on the dielectric near the first row of the independent row Y electrodes 23. The negative charges 35 gather on the dielectric near the other electrodes, and some of them remain in the discharge space 33 or the barrier ribs 3
1 or on the phosphor 32.
【００１９】図８は独立行Ｙ電極２３の３行目のスキャ
ンパルス７３で対応するアドレスＡ電極２９がグランド
電位で書込み放電が起こらなかった場合のグランド電位
の期間７３ｂにおける電荷の移動を示す概念図である。
独立行Ｙ電極２３の３行目近傍の空間には電荷は無く、
独立行Ｙ電極２３の１行目とは距離が離れている上に、
間に複数の正電位の電極があるため、独立行Ｙ電極２３
の３行目近傍には正の電荷３４は集まらない。FIG. 8 is a concept showing the movement of charges in the period 73b of the ground potential when the address A electrode 29 corresponding to the third row scan pulse 73 of the independent row Y electrode 23 is at the ground potential and the address discharge is not generated. It is a figure.
There is no charge in the space near the third row of the independent row Y electrode 23,
In addition to the distance from the first row of the independent row Y electrode 23,
Since there are a plurality of positive potential electrodes between the independent row Y electrodes 23
The positive charges 34 do not collect in the vicinity of the third row of.
【００２０】以上のようにして、確実な書込み操作が可
能となる。尚、本実施例では独立行Ｙ電極２３の１本置
きにスキャンパルスを印加する例を示したが、隣接する
セルにおいてスキャンパルスが連続しなければよいの
で、図９に示すように２本置きでも、また、３本置きで
も、さらには、順次ではなく図１０に示すようにランダ
ムなスキャンでもよい。As described above, a reliable write operation becomes possible. In the present embodiment, the example in which the scan pulse is applied to every other independent row Y electrode 23 is shown. However, since the scan pulse does not have to be continuous in the adjacent cells, every two scan electrodes are provided as shown in FIG. However, it is also possible to use every three scans, or to scan randomly instead of sequentially as shown in FIG.
【００２１】図９は２本置きにスキャンする例であり、
アドレスＡ電極２９に印加する電圧波形８０、共通行Ｘ
電極２２に印加する電圧波形９０及び独立行Ｙ電極２３
に印加する電圧波形８１〜８９を示す。独立行Ｙ電極２
３の１行目の電圧波形８１、２行目の電圧波形８２、３
行目の電圧波形８３、４行目の電圧波形８４、５行目の
電圧波形８５、６行目の電圧波形８６、（３ｊ−２）
（ｊは自然数）行目の電圧波形８７、（３ｊ−１）行目
の電圧波形８８、３ｊ行目の電圧波形８９である。FIG. 9 shows an example of scanning every two lines.
Voltage waveform 80 applied to address A electrode 29, common row X
Voltage waveform 90 applied to electrode 22 and independent row Y electrode 23
The voltage waveforms 81 to 89 applied to are shown. Independent row Y electrode 2
3, the voltage waveform 81 of the first row, the voltage waveform 82 of the second row, 3
Voltage waveform 83 in the fourth row, voltage waveform 84 in the fourth row, voltage waveform 85 in the fifth row, voltage waveform 86 in the sixth row, (3j-2)
A voltage waveform 87 on the (j is a natural number) row, a voltage waveform 88 on the (3j−1) th row, and a voltage waveform 89 on the 3jth row.
【００２２】独立行Ｙ電極２３にはそれぞれ１行目スキ
ャンパルス９１、２行目スキャンパルス９２、３行目ス
キャンパルス９３、４行目スキャンパルス９４、５行目
スキャンパルス９５、６行目スキャンパルス９６、（３
ｊ−２）行目スキャンパルス９７、（３ｊ−１）行目ス
キャンパルス９８、３ｊ行目スキャンパルス９９が印加
される。The independent row Y electrodes 23 have a first-row scan pulse 91, a second-row scan pulse 92, a third-row scan pulse 93, a fourth-row scan pulse 94, a fifth-row scan pulse 95, and a sixth-row scan, respectively. Pulse 96, (3
The j-2) th row scan pulse 97, the (3j-1) th row scan pulse 98, and the 3jth row scan pulse 99 are applied.
【００２３】それぞれのスキャンパルスは独立行Ｙ電極
２３の１，４，７，…，（３ｊ−２）行目の順に２本置
きに印加され、その後、２，５，８，…，（３ｊ−１）
行目、３，６，９，…，３ｊ行目の順に印加される。
尚、独立行Ｙ電極２３の本数によっては最後は（３ｊ−
２）または（３ｊ−１）行目になる。.., (3j-2) rows of the independent row Y electrodes 23 are applied in the order of the rows 1, 4, 7, ..., (3j-2), and then 2, 5, 8 ,. -1)
, 3j rows are applied in this order.
Incidentally, depending on the number of the independent row Y electrodes 23, at the end (3j-
It becomes the 2) or (3j-1) line.
【００２４】独立行Ｙ電極２３の１行目においてスキャ
ンパルス９１が印加される時にアドレスＡ電極２９が正
電位であれば、スキャンパルス９１の最初のエッジ９１
ａで放電が起こり、約１μｓｅｃ継続する。その後、ス
キャンパルス９１のグランド電位の期間９１ｂで独立行
Ｙ電極２３の１行目近傍の誘電体上に正の電荷が集ま
る。この時、共通行Ｘ電極２２及び独立行Ｙ電極２３の
他の行は正の電位であるため、正の電荷はこれらの電極
上へは移動しない。If the address A electrode 29 has a positive potential when the scan pulse 91 is applied to the first row of the independent row Y electrodes 23, the first edge 91 of the scan pulse 91 is obtained.
Discharge occurs at a and continues for about 1 μsec. After that, in the period 91b of the ground potential of the scan pulse 91, positive charges are collected on the dielectric near the first row of the independent row Y electrode 23. At this time, since the other rows of the common row X electrode 22 and the independent row Y electrode 23 have a positive potential, positive charges do not move onto these electrodes.
【００２５】次に、独立行Ｙ電極２３の４行目において
スキャンパルス９４が印加される時には、同様にスキャ
ンパルス９４の最初のエッジ９４ａで放電が起こり、そ
の後、スキャンパルス９４のグランド電位の期間９４ｂ
で独立行Ｙ電極２３の４行目近傍の誘電体上に正の電荷
が集まる。独立行Ｙ電極２３の４行目においてスキャン
パルス９４が印加される時にアドレスＡ電極２９がグラ
ンド電位であれば放電は起こらず、独立行Ｙ電極２３の
１行目とは距離が離れている上に、間に複数の正電位の
電極があるためにスキャンパルス９４のグランド電位の
期間９４ｂにおいても、独立行Ｙ電極２３の４行目近傍
の誘電体上に正の電荷は集まらず、このセルには書込み
は行なわれない。順次、これが（３ｊ−２）行目まで繰
り返され、同様に確実な書込み操作が行なわれる。Next, when the scan pulse 94 is applied to the fourth row of the independent row Y electrodes 23, the discharge similarly occurs at the first edge 94a of the scan pulse 94, and thereafter, the period of the ground potential of the scan pulse 94. 94b
Then, positive charges are collected on the dielectric near the fourth row of the independent row Y electrode 23. If the address A electrode 29 is at the ground potential when the scan pulse 94 is applied to the fourth row of the independent row Y electrode 23, no discharge occurs, and the distance from the first row of the independent row Y electrode 23 is large. In addition, since there are a plurality of positive potential electrodes in between, even in the period 94b of the ground potential of the scan pulse 94, positive charges do not collect on the dielectric near the fourth row of the independent row Y electrode 23, and this cell Is not written to. This is sequentially repeated up to the (3j−2) th row, and a reliable write operation is performed in the same manner.
【００２６】独立行Ｙ電極２３の（３ｊ−２）行目まで
スキャン操作が終わったら次に、独立行Ｙ電極２３の２
行目においてスキャンパルス９２が印加される。この時
には、隣接する独立行Ｙ電極２３の１行目のスキャンパ
ルス９１及び３行目のスキャンパルス９３からは数百μ
ｓｅｃ離れており、時間的に十分離れているため、スキ
ャンパルス同士で放電を起こすことはなく、誤放電を防
止している。When the scanning operation is completed up to the (3j−2) th row of the independent row Y electrode 23, the independent row Y electrode 23 is then moved to the 2nd row.
The scan pulse 92 is applied in the row. At this time, several hundreds μm from the scan pulse 91 of the first row and the scan pulse 93 of the third row of the adjacent independent Y electrodes 23.
Since they are separated by sec, and are separated sufficiently in time, the discharge does not occur between the scan pulses, and erroneous discharge is prevented.
【００２７】順次、これが（３ｊ−１）行目まで繰り返
され、同様に確実な書込み操作が行なわれる。同様に独
立行Ｙ電極２３の３行目から３ｊ行目まで書込み操作が
行なわれる。以上のようにして１行目から３ｊ行目まで
の書込み操作を行なう。This is sequentially repeated until the (3j-1) th row, and a reliable write operation is performed in the same manner. Similarly, the write operation is performed from the third row to the 3jth row of the independent row Y electrode 23. As described above, the write operation from the first row to the 3jth row is performed.
【００２８】図１０はランダムにスキャンする例であ
り、アドレスＡ電極２９に印加する電圧波形１００、共
通行Ｘ電極２２に印加する電圧波形１１０及び、独立行
Ｙ電極２３に印加する電圧波形１０１〜１０９を示す。
独立行Ｙ電極２３にはスキャンパルス１１１〜１１９が
印加されるが隣接するセルの独立行Ｙ電極２３ではスキ
ャンパルスは連続しないため、スキャンパルスの最初の
エッジ１１１ａ〜１１９ａで誤放電を起こすこともな
く、グランド電位の期間１１１ｂ〜１１９ｂで無関係の
電荷を集めることもないので確実な書込み操作が行なわ
れる。FIG. 10 shows an example of random scanning, in which the voltage waveform 100 applied to the address A electrode 29, the voltage waveform 110 applied to the common row X electrode 22, and the voltage waveforms 101 to 101 applied to the independent row Y electrode 23. 109 is shown.
The scan pulses 111 to 119 are applied to the independent row Y electrodes 23, but the scan pulses are not continuous at the independent row Y electrodes 23 of the adjacent cells, so that erroneous discharge may occur at the first edges 111a to 119a of the scan pulse. Since no extraneous charges are collected during the period 111b to 119b of the ground potential, a reliable write operation is performed.
【００２９】本実施例では隣接するセルでは共通行Ｘ電
極２２同士、或いは独立行Ｙ電極２３同士が隣合うよう
に配置されている構造を示したが、図１１に示すような
共通行Ｘ電極２２と独立行Ｙ電極２３が交互に配置され
ている構造においてもセルが小さくなり、電極間隔が狭
くなった場合には、前述のような隣接誤放電の可能性が
高くなる。これに対しても、本発明を適用することによ
り、同様に確実な書込み操作が可能となる。In this embodiment, in the adjacent cells, the common row X electrodes 22 are arranged so that the common row X electrodes 22 or the independent row Y electrodes 23 are arranged adjacent to each other. However, the common row X electrodes as shown in FIG. Even in the structure in which the electrodes 22 and the independent row Y electrodes 23 are alternately arranged, when the cell becomes small and the electrode interval becomes narrow, the possibility of adjacent erroneous discharge as described above increases. Also to this, by applying the present invention, similarly reliable writing operation becomes possible.
【００３０】[0030]
【発明の効果】本発明によれば、確実な書込み操作が可
能となるため、誤放電による画面の乱れを防止すること
ができる。According to the present invention, since a reliable writing operation can be performed, it is possible to prevent the disturbance of the screen due to erroneous discharge.
【図１】本発明における書込み期間の各電極への印加電
圧波形を示す図である。FIG. 1 is a diagram showing a voltage waveform applied to each electrode during a writing period in the present invention.
【図２】プラズマディスプレイパネルの構造の一部を示
す分解斜視図である。FIG. 2 is an exploded perspective view showing a part of the structure of the plasma display panel.
【図３】図２で矢印Ａ方向から見た断面図である。3 is a cross-sectional view as seen from the direction of arrow A in FIG.
【図４】図２で矢印Ｂ方向から見た断面図である。4 is a cross-sectional view as seen from the direction of arrow B in FIG.
【図５】１枚の画を構成する１フィールド期間の動作を
示す図である。FIG. 5 is a diagram showing an operation during one field period which constitutes one image.
【図６】書込み放電期間中の電荷状態を示す概念図であ
る。FIG. 6 is a conceptual diagram showing a charge state during an address discharge period.
【図７】書込み放電後の電荷の移動を示す概念図であ
る。FIG. 7 is a conceptual diagram showing movement of charges after address discharge.
【図８】スキャン時に書込み放電を行なわないセルの電
荷の移動を示す概念図である。FIG. 8 is a conceptual diagram showing the movement of charges in cells that do not perform address discharge during scanning.
【図９】他の実施形態の書込み期間の各電極への印加電
圧波形を示す図である。FIG. 9 is a diagram showing a voltage waveform applied to each electrode during a writing period according to another embodiment.
【図１０】他の実施形態の書込み期間の各電極への印加
電圧波形を示す図である。FIG. 10 is a diagram showing a waveform of a voltage applied to each electrode during a writing period according to another embodiment.
【図１１】他の実施形態におけるプラズマディスプレイ
パネルの構造の一部を示す断面図である。FIG. 11 is a cross-sectional view showing a part of the structure of a plasma display panel in another embodiment.
２１ 前面ガラス基板 ２２ 共通行Ｘ電極 ２３ 独立行Ｙ電極 ２８ 背面ガラス基板 ２９ アドレスＡ電極 ３１ 隔壁 ３２ 蛍光体 ３３ 放電空間 ３４ 正の電荷 ３５ 負の電荷 ４１〜４８ サブフィールド ４９ 予備放電期間 ５０ 書込み期間 ５１ 発光表示期間 ６０ 書込み期間にアドレスＡ電極に印加する電圧波形 ６１〜６６ 書込み期間に独立行Ｙ電極に印加する電圧
波形 ７０ 書込み期間に共通行Ｘ電極に印加する電圧波形 ７１〜７６ スキャンパルス ７１ａ〜７６ａ スキャンパルスの最初のエッジ ７１ｂ〜７６ｂ グランド電位の期間 ８０ 書込み期間にアドレスＡ電極に印加する電圧波形 ８１〜８９ 書込み期間に独立行Ｙ電極に印加する電圧
波形 ９０ 書込み期間に共通行Ｘ電極に印加する電圧波形 ９１〜９９ スキャンパルス ９１ａ〜９９ａ スキャンパルスの最初のエッジ ９１ｂ〜９９ｂ グランド電位の期間 １００ 書込み期間にアドレスＡ電極に印加する電圧波
形 １０１〜１０９ 書込み期間に独立行Ｙ電極に印加する
電圧波形 １１０ 書込み期間に共通行Ｘ電極に印加する電圧波形 １１１〜１１９ スキャンパルス21 Front Glass Substrate 22 Common Row X Electrode 23 Independent Row Y Electrode 28 Rear Glass Substrate 29 Address A Electrode 31 Partition 32 Phosphor 33 Discharge Space 34 Positive Charge 35 Negative Charge 41-48 Subfield 49 Pre-Discharge Period 50 Writing Period 51 Light-Emitting Display Period 60 Voltage Waveform Applied to Address A Electrode in Writing Period 61-66 Voltage Waveform Applied to Independent Row Y Electrode in Writing Period 70 Voltage Waveform Applied to Common Row X Electrode in Writing Period 71-76 Scan Pulse 71a -76a First edge of scan pulse 71b-76b Period of ground potential 80 Voltage waveform applied to address A electrode in writing period 81-89 Voltage waveform applied to independent row Y electrode in writing period 90 Common row X electrode in writing period Waveforms 91-99 Scan Pulses 91a-9 a first edge of scan pulse 91b to 99b period of ground potential 100 voltage waveform applied to address A electrode in writing period 101 to 109 voltage waveform applied to independent row Y electrode in writing period 110 common line to X electrode in writing period Applied voltage waveform 111-119 scan pulse
───────────────────────────────────────────────────── フロントページの続き (72)発明者 増田 健夫 神奈川県横浜市戸塚区吉田町292番地 株 式会社日立製作所マルチメディアシステム 開発本部内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takeo Masuda 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Multimedia system development headquarters
Claims (2)
マディスプレイにおいて、 前面板に配置されて独立に駆動可能であって書込み放電
を行なう複数の第１の電極と、背面板に配置されて前記
第１の電極と直角に立体交差して書込み放電を行なう複
数の第２の電極と、を有し、 前記第１の電極への書込みパルスが、隣接する第１の電
極同士で連続しないように印加する印加手段を備えてい
ることを特徴とするプラズマディスプレイパネルの書込
み方式。1. In an AC-type plasma display of the address / display separation system, a plurality of first electrodes arranged on a front plate and capable of being independently driven to perform address discharge, and a first plate arranged on a rear plate are provided. A plurality of second electrodes that intersect with the first electrode at right angles to perform address discharge, and the write pulse to the first electrode is applied so as not to be continuous between the adjacent first electrodes. A writing method for a plasma display panel, characterized in that it is provided with a voltage applying means.
パネルの書込み方式において、 前記第１の電極への書込みパルスが、一本置きの電極、
複数本置きの電極、または連続しないランダムな電極へ
の印加であることを特徴とするプラズマディスプレイパ
ネルの書込み方式。2. The writing method of the plasma display panel according to claim 1, wherein the writing pulse to the first electrode is every other electrode,
A writing method for a plasma display panel, which is characterized in that a plurality of electrodes are placed or a random electrode that is not continuous is applied.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8135171A JPH09319328A (en) | 1996-05-29 | 1996-05-29 | Writing method for plasma display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8135171A JPH09319328A (en) | 1996-05-29 | 1996-05-29 | Writing method for plasma display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09319328A true JPH09319328A (en) | 1997-12-12 |
Family
ID=15145503
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8135171A Pending JPH09319328A (en) | 1996-05-29 | 1996-05-29 | Writing method for plasma display panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09319328A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005069263A1 (en) * | 2004-01-14 | 2005-07-28 | Matsushita Electric Industrial Co., Ltd. | Plasma display panel drive method |
| WO2005086129A1 (en) * | 2004-03-08 | 2005-09-15 | Matsushita Electric Industrial Co., Ltd. | Plasma display panel drive method |
| JP2005529366A (en) * | 2002-06-11 | 2005-09-29 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Line scan on display |
-
1996
- 1996-05-29 JP JP8135171A patent/JPH09319328A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005529366A (en) * | 2002-06-11 | 2005-09-29 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Line scan on display |
| WO2005069263A1 (en) * | 2004-01-14 | 2005-07-28 | Matsushita Electric Industrial Co., Ltd. | Plasma display panel drive method |
| US7345655B2 (en) | 2004-01-14 | 2008-03-18 | Matsushita Electric Industrial Co., Ltd. | Plasma display panel drive method |
| CN100440283C (en) * | 2004-01-14 | 2008-12-03 | 松下电器产业株式会社 | Plasma display panel drive method |
| WO2005086129A1 (en) * | 2004-03-08 | 2005-09-15 | Matsushita Electric Industrial Co., Ltd. | Plasma display panel drive method |
| KR100700407B1 (en) * | 2004-03-08 | 2007-03-28 | 마쯔시다덴기산교 가부시키가이샤 | Method of driving plasma display panel |
| US7348937B2 (en) | 2004-03-08 | 2008-03-25 | Matsushita Electric Industrial Co., Ltd. | Plasma display panel drive method |
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