JPH09266330A - Thermoelectric transducer element and its manufacture - Google Patents

Thermoelectric transducer element and its manufacture

Info

Publication number
JPH09266330A
JPH09266330A JP8099050A JP9905096A JPH09266330A JP H09266330 A JPH09266330 A JP H09266330A JP 8099050 A JP8099050 A JP 8099050A JP 9905096 A JP9905096 A JP 9905096A JP H09266330 A JPH09266330 A JP H09266330A
Authority
JP
Japan
Prior art keywords
plate
plate shape
thermoelectric conversion
pieces
type semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8099050A
Other languages
Japanese (ja)
Inventor
Ryozo Echigo
亮三 越後
Hideo Yoshida
英生 吉田
Motoi Furuta
基 古田
Hiroshi Kikuchi
啓 菊地
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Gas Co Ltd
ECHIGO RYOZO
Original Assignee
Tokyo Gas Co Ltd
ECHIGO RYOZO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Gas Co Ltd, ECHIGO RYOZO filed Critical Tokyo Gas Co Ltd
Priority to JP8099050A priority Critical patent/JPH09266330A/en
Publication of JPH09266330A publication Critical patent/JPH09266330A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To obtain high voltage by turning pieces of plates that are cut to square and at equal intervals by 180 degrees every other piece, sintering again the pieces plates by changing combination of insertion and cutting slots between the adjacent square plate. SOLUTION: A pair of columnar p type semiconductors and a pair of columnar n type semiconductors are formed alternately as a unit with each plate shape body by cutting a block body made by lamination and sintering in the direction square to the surface of the plate shape body and at equal intervals. Then, these plate shape pieces A, B, C and D are reassembled The plate shape pieces A and the plate shape piece B remain at same position, the plate shape piece C and the plate shape piece D are rotated by 180 degrees, the plate shape piece B is placed between the A and the C, and the plate shape D is arranged to the back surface of the plate shape piece C to contact it. After sintering them with the laminated state, the slits 11 are formed between each columnar p type and n type semiconductors that are arranged alternately and contacting each other, and each columnar material is electrically connected serially. Multiple lamination by direct joining method without the peel off of electrode is possible and with the same quantity of material, the high voltage of, for examples, four times, eight times and sixteen times is obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、熱電変換素子及び
その製造方法に関し、より詳しくは相異なる二種の金属
やn型半導体とp型半導体とからなる多数の板状焼結熱
電変換材料を交互に直接接合によって電気的に直列に接
合し、高い電圧を発生し得るようにしてなる熱電変換素
子及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermoelectric conversion element and a method for manufacturing the same, and more particularly to a large number of plate-shaped sintered thermoelectric conversion materials composed of two different metals or n-type semiconductors and p-type semiconductors. The present invention relates to a thermoelectric conversion element that is electrically connected in series by direct bonding alternately and is capable of generating a high voltage, and a manufacturing method thereof.

【0002】[0002]

【従来の技術】熱電変換素子は、相異なる二種の金属や
p型半導体とn型半導体等の相異なる熱電変換材料を熱
的に並列に置き、電気的に直列に接続して接合部間に温
度差を与えることにより両端に熱起電力が発生する熱電
効果(ゼーベック効果)を利用して熱エネルギーを直接
電力に変換する素子であり、外部に負荷を接続して閉回
路を構成すると回路に電流が流れ、電力を取り出すこと
ができる。
2. Description of the Related Art A thermoelectric conversion element has two different metals or different thermoelectric conversion materials such as a p-type semiconductor and an n-type semiconductor which are thermally arranged in parallel and electrically connected in series to form a junction portion. It is an element that directly converts thermal energy into electric power by utilizing the thermoelectric effect (Seebeck effect) in which a thermoelectromotive force is generated at both ends when a temperature difference is applied to the circuit. An electric current flows through it and power can be taken out.

【0003】図1はその熱電変換素子の一態様を原理的
に説明する模式図であり、一例としてn型半導体とp型
半導体とを組合せたものである。図1中1はp型半導
体、2はn型半導体、3は高温側接合部、4は低温側接
合部であり、Qは高温熱源、Thは高温側温度、Tcは
低温側温度を示し、Sは絶縁空間である。図示のとおり
高温側接合部には高温側電極5を共通に設け、低温側接
合部には低温側電極6、7が別個に設けられている。こ
の態様の熱電変換素子において高温側接合部3と低温側
接合部4との間に温度差ΔT=Th−Tcを与えると、
両電極間(5と6及び7との間)に電圧が発生する。そ
れ故低温側の両電極6と7との間に負荷(R)を接続す
ると電流(I)が流れ電力(W)として取り出すことが
できる。
FIG. 1 is a schematic diagram for explaining one aspect of the thermoelectric conversion element in principle. As an example, an n-type semiconductor and a p-type semiconductor are combined. 1, 1 is a p-type semiconductor, 2 is an n-type semiconductor, 3 is a high temperature side junction, 4 is a low temperature side junction, Q is a high temperature heat source, Th is a high temperature side temperature, Tc is a low temperature side temperature, S is an insulating space. As shown in the drawing, the high temperature side electrode 5 is commonly provided in the high temperature side joint portion, and the low temperature side electrodes 6 and 7 are separately provided in the low temperature side joint portion. In the thermoelectric conversion element of this aspect, when a temperature difference ΔT = Th−Tc is given between the high temperature side joint portion 3 and the low temperature side joint portion 4,
A voltage is generated between both electrodes (between 5 and 6 and 7). Therefore, if a load (R) is connected between both electrodes 6 and 7 on the low temperature side, a current (I) flows and can be taken out as electric power (W).

【0004】熱電変換素子としては、これまでバルク、
薄膜、厚膜など様々な形態のものが考案されているが、
大まかなところ、この素子から得られる電圧は同一材料
であればその積層数に比例し、電力は素子の大きさに比
例する。しかし電圧については、何れにしても相異なる
二種の熱電変換材料の一対だけでは高々数十mVにしか
ならない。この意味で熱電変換素子は小電圧、大電流型
の電源であり、通常所望される電圧を得ることができな
いから、多くの場合その複数対を積層することが必要で
ある。このための手法としては、これまで幾つかの態様
が考えらているが、図2(a)〜(b)はその構成態様
例を模式的に示した図である。図中の符号p及びnは各
々p型半導体及びn型半導体を示している。
As the thermoelectric conversion element, bulk,
Various forms such as thin film and thick film have been devised,
In general, the voltage obtained from this element is proportional to the number of layers of the same material, and the power is proportional to the size of the element. However, in any case, the voltage is only several tens mV at most with only a pair of two different thermoelectric conversion materials. In this sense, the thermoelectric conversion element is a small-voltage, large-current type power supply and cannot normally obtain a desired voltage. Therefore, in many cases, it is necessary to stack a plurality of pairs. As a method for this purpose, some modes have been considered so far, but FIGS. 2A and 2B are diagrams schematically showing an example of the configuration mode. Reference symbols p and n in the figure indicate a p-type semiconductor and an n-type semiconductor, respectively.

【0005】このうち図2(a)は金属電極方式の態
様、図2(b)は直接接合方式の態様である。図2
(a)は、図1に示すような1対のpーn単位の複数個
(図では2対)を直列に連結した形式のもので、複数対
のp型及びn型半導体が間隔Sを置いて交互に併置さ
れ、相隣る各p型及びn型半導体単位が電極8によって
直列に連結されている。また図2(b)の態様では、p
型半導体の板体及びn型半導体の板体を交互に積層した
後、切り込み9を入れたもので、図2(a)のように別
途電極8を介在させることなく、p型及びn型半導体の
複数個(図では2対)を直かに連結した形式のものであ
る。
Of these, FIG. 2A shows a metal electrode system, and FIG. 2B shows a direct bonding system. FIG.
(A) is a type in which a plurality of pairs of pn units (two pairs in the figure) are connected in series as shown in FIG. 1, and a plurality of pairs of p-type and n-type semiconductors have a space S. The p-type and n-type semiconductor units, which are adjacent to each other and are juxtaposed alternately, are connected in series by the electrode 8. In the mode of FIG. 2B, p
Type semiconductor plate bodies and n-type semiconductor plate bodies are alternately laminated, and then cuts 9 are made, and p-type and n-type semiconductors are formed without interposing an electrode 8 as shown in FIG. 2A. Is directly connected to each other (two pairs in the figure).

【0006】しかし、図2(a)の態様においては、そ
のようにp型及びn型半導体の部片を相隣る部片毎に別
途電極8を用いて連結させる必要があり、また図2
(b)の態様では、交互に配置したp型及びn型半導体
を直かに連結できるため、介在電極を必要とする図2
(a)の態様に比べれは部品数やスペースを省略できる
利点があるが、何れの態様の場合にも所定電圧を得るに
はこれに必要な対の分だけ積層する必要があるなど種々
の問題がある。
However, in the embodiment of FIG. 2A, it is necessary to separately connect the p-type and n-type semiconductor pieces by using the electrode 8 for each adjacent piece.
In the mode of (b), since the p-type and n-type semiconductors arranged alternately can be directly connected to each other, an intervening electrode is required.
Compared with the mode of (a), there is an advantage that the number of parts and space can be omitted, but in any case, various problems such as the number of pairs required for obtaining a predetermined voltage need to be stacked. There is.

【0007】[0007]

【発明が解決しようとする課題】以上のように、熱電変
換素子においては同一サイズの素子をいかに細かく積層
して(電力一定の条件で)電圧を高めるかが課題となっ
ており、これを解決するために採られている上述のよう
な従来法では各種問題があり未だ十分とは云えない。そ
こで本発明においては、同一サイズでより細かく積層し
た素子とし、高電圧を得ることができるようにしてなる
熱電変換素子及びその製造方法を提供することを目的と
する。
As described above, in the thermoelectric conversion element, how to finely stack the elements of the same size to raise the voltage (under the condition that the electric power is constant) has been a problem. The above-mentioned conventional method adopted to achieve the above has various problems and cannot be said to be sufficient. In view of this, it is an object of the present invention to provide a thermoelectric conversion element and a method for manufacturing the same, which are elements of the same size and are more finely laminated so that a high voltage can be obtained.

【0008】[0008]

【課題を解決するための手段】本発明は、相異なる二種
の熱電変換材料の板状体を交互に複数個積層して焼結
し、該焼結積層体をその構成板状体の面に対して直角方
向で且つ等間隔に切断した後、その板状切断部片のうち
1つ置きに位置する板状部片を180°回転させて、他
の1つ置きに位置する各板状部片間に嵌挿組み直して再
焼結し、次いで相隣る各角柱状材料間に交互に切込みを
入れることにより各角柱状材料を電気的に直列に連結し
てなることを特徴とする熱電変換素子を提供する。
DISCLOSURE OF THE INVENTION According to the present invention, a plurality of plate-shaped bodies made of two different thermoelectric conversion materials are alternately laminated and sintered, and the sintered laminated body is formed on the surface of the constituent plate-shaped body. After cutting at right angles to the plate and at equal intervals, rotate every other plate-like cutting piece of the plate-like cutting piece by 180 ° and place each other plate-like cutting piece. A thermoelectric device characterized in that the prismatic materials are electrically connected in series by re-sintering by re-sintering between the pieces and then making notches alternately between adjacent prismatic materials. Provide a conversion element.

【0009】また、本発明は、相異なる二種の熱電変換
材料の板状体を交互に複数個積層して焼結し、該焼結積
層体をその構成板状体の面に対して直角方向で且つ等間
隔に切断した後、その板状切断部片のうち1つ置きに位
置する板状部片を180°回転させて、他の1つ置きに
位置する各板状部片間に嵌挿組み直して再焼結し、次い
で相隣る各角柱状材料間に交互に切込みを入れることに
より各角柱状材料を電気的に直列に連結することを特徴
とする熱電変換素子の製造方法を提供する。
Further, according to the present invention, a plurality of plate-shaped bodies made of two different thermoelectric conversion materials are alternately laminated and sintered, and the sintered laminated body is perpendicular to the plane of the constituent plate-shaped bodies. After cutting in the same direction and at equal intervals, rotate the plate-like cutting pieces located every other one of the plate-like cutting pieces by 180 °, and cut between the plate-like cutting pieces located at the other ones. A method for manufacturing a thermoelectric conversion element, characterized in that the prismatic materials are electrically connected in series by reinserting and re-sintering and then making notches between adjacent prismatic materials alternately. provide.

【0010】[0010]

【発明の実施の形態】本発明における上記相異なる二種
の熱電変換材料としては、異種金属(合金を含む)の組
み合わせやp型半導体とn型半導体との組み合わせな
ど、熱電変換材料としての特性を有し、直接接合法によ
り工作できるものであれば特に限定はなく、例えばアル
メルークロメル、Bi2Te3、PbTe、Si1-XGeX
(0<x<1)、FeSi2 などいかなる種類の熱電変
換材料にも適用できる。
BEST MODE FOR CARRYING OUT THE INVENTION The above-mentioned two different thermoelectric conversion materials according to the present invention include the characteristics as a thermoelectric conversion material such as a combination of different metals (including alloys) and a combination of a p-type semiconductor and an n-type semiconductor. There is no particular limitation as long as it has the above properties and can be machined by the direct bonding method. For example, alumel-chromel, Bi 2 Te 3 , PbTe, Si 1-x Ge x
It can be applied to any kind of thermoelectric conversion material such as (0 <x <1) and FeSi 2 .

【0011】図3〜図4は本発明に係る熱電変換素子の
作製過程を示す概略図である。前述のとおり、従来法に
おいては、まずp型半導体の板状体及びn型半導体の板
状体を図3(a)のように積層して焼結した後、図2
(b)のように板体の面に対して直角に且つ等間隔に複
数の切り欠き9を入れる。なお、ここではp型半導体と
n型半導体とを用いる場合について説明するが、異種の
金属を組み合わせて用いる場合等についても同様であ
る。こうしてp型半導体とn型半導体の対を複数対積層
した素子が形成されるが、これにより所定の高電圧を得
るためにはそのpーn対を所要対だけ積層する必要があ
る。本発明においては、上記従来法による場合と同じ素
子材料量を用いて直接接合により数多くの積層を行い、
所定の高電圧を得ることができるようにしたものであ
る。
3 to 4 are schematic views showing a process of manufacturing the thermoelectric conversion element according to the present invention. As described above, in the conventional method, first, a p-type semiconductor plate-shaped body and an n-type semiconductor plate-shaped body are laminated as shown in FIG.
As shown in (b), a plurality of notches 9 are formed at right angles to the surface of the plate body and at equal intervals. It should be noted that here, the case of using the p-type semiconductor and the n-type semiconductor will be described, but the same applies to the case of using different kinds of metals in combination. In this way, an element in which a plurality of pairs of p-type semiconductor and n-type semiconductor are laminated is formed, and thus, in order to obtain a predetermined high voltage, it is necessary to laminate the required number of pn pairs. In the present invention, a large number of laminations are made by direct bonding using the same amount of element material as in the case of the above conventional method,
It is designed so that a predetermined high voltage can be obtained.

【0012】図3(a)は、板状p型半導体と板状n型
半導体との4個を積層して焼結したもので、図2(b)
との関係では切込み9を入れる前のものに相当するが、
本発明においては、これをまず図3(b)に示すように
該積層焼結してなるブロック体をその板状体の面に対し
て直角方向に且つ等間隔に切断する。図3(b)中の3
つの太い線10はその切断部であり、符号A、B、C及
びDはその切断により切り離された4個の板状部片であ
る。なお上記ブロック体は立方体とは限らず、直方体で
あっても差し支えない。図示のとおり、各板状部片には
2個の角柱状p型半導体と2個の角柱状n型半導体とが
交互に一体に形成される。
FIG. 3A shows a structure in which four plate-shaped p-type semiconductors and plate-shaped n-type semiconductors are stacked and sintered, and FIG.
It is equivalent to the one before making the cut 9 in relation to
In the present invention, as shown in FIG. 3 (b), the laminated and sintered block body is first cut at a right angle to the plane of the plate-like body at equal intervals. 3 in FIG. 3 (b)
One thick line 10 is the cut portion, and the reference signs A, B, C and D are the four plate-like pieces cut off by the cut. The block body is not limited to a cube and may be a rectangular parallelepiped. As shown in the drawing, two prism-shaped p-type semiconductors and two prism-shaped n-type semiconductors are alternately and integrally formed on each plate-shaped piece.

【0013】次いでこれら板状部片A、B、C及びDを
図3(c)に示すように組み直す。この組み直しの仕方
について、各板状部片A、B、C及びDが図3(b)に
示す位置関係にあることを前提に説明すると、図3
(c)のとおり、部片Aと部片Cとを同じ位置とし、部
片Bと部片Dとを180°回転させ、部片Bについては
AとCの間に、部片Dについては部片Cの裏面〔図3
(c)で云えば部片Bと接する手前の面に対して裏側の
面〕に配置して当接させる。この場合、部片AとC及び
部片BとDとは、角柱状p型半導体と角柱状n型半導体
との交互配置関係が同じであるので、例えば部片DをA
とCの間に、部片BをCの裏面に配置してもよいことは
勿論であり、この点部片B及びDに対するAとCの関係
についても同様である。
Next, these plate-like pieces A, B, C and D are reassembled as shown in FIG. 3 (c). The method of reassembling will be described on the assumption that the plate-shaped pieces A, B, C, and D have the positional relationship shown in FIG. 3B.
As shown in (c), the piece A and the piece C are at the same position, the piece B and the piece D are rotated by 180 °, and the piece B is between A and C and the piece D is the same. Back of piece C [Fig. 3
In the case of (c), it is arranged on the surface on the back side with respect to the front surface in contact with the piece B] and brought into contact therewith. In this case, since the pieces A and C and the pieces B and D have the same alternating arrangement relationship of the prismatic p-type semiconductor and the prismatic n-type semiconductor, for example,
It is needless to say that the piece B may be disposed on the back surface of C between C and C, and the same applies to the relationship between A and C for the point pieces B and D.

【0014】次いで図3(c)の積層状態で再焼結した
後、図3(d)に示すように切り欠きを入れる。図3
(d)中の太い線11がその切り欠き部分であり、この
切り欠き11は交互に相接して位置した各角柱状のp型
及びn型半導体の間に入れる〔なお、図3(d)及び図
4〜図5中の矢印(→)は、素子としての使用時におけ
る電流の流れ方向を示している〕。図4はその切り欠き
を入れる態様を説明するための図であり、図4中では、
各ブロックW、X、Y及びZに分けて図示しているが、
図3(d)に示すように一体として構成された素子をた
だ説明の便宜上切り離して示しただけのものである。
Next, after re-sintering in the laminated state of FIG. 3 (c), a notch is made as shown in FIG. 3 (d). FIG.
The thick line 11 in (d) is the cutout portion, and the cutout 11 is inserted between the prismatic p-type and n-type semiconductors that are alternately contacted with each other [see FIG. ) And the arrows (→) in FIGS. 4 to 5 indicate the direction of current flow when used as an element]. FIG. 4 is a view for explaining a mode in which the cutout is made. In FIG.
Although shown separately for each block W, X, Y, and Z,
The element integrally configured as shown in FIG. 3D is shown by being separated for convenience of explanation.

【0015】図4において、まず最左端のWブロックに
ついては、図示のとおり交互に切り込み12、13、1
4を入れる。そしてこのとき各切込みには切込みを入れ
ない部分を残す。符号15、16、17がその残す部分
を示しているが、これら部分15、16、17が相隣る
角柱状p型半導体部片と角柱状n型半導体部片との連結
部分となり且つ素子としての使用時に導通部分となる部
分である。そしてこれらの点は順次相隣るブロックであ
るXブロック、Yブロック及びZブロックについても同
様である。
In FIG. 4, first, the leftmost W block is alternately cut as shown in the drawing.
Insert 4. Then, at this time, each notch is left with an uncut part. Reference numerals 15, 16 and 17 indicate the remaining portions, but these portions 15, 16 and 17 serve as connecting portions between the adjacent prism-shaped p-type semiconductor portion pieces and the prism-shaped n-type semiconductor portion pieces, and as elements. Is a portion that becomes a conductive portion when used. These points also apply to the X block, the Y block, and the Z block, which are blocks that are sequentially adjacent to each other.

【0016】次に、Wブロックの最終端の角柱状p型半
導体(Wブロックの最奥部のp型半導体)と相隣るXブ
ロックの角柱状n型半導体(Xブロックの最奥部のn型
半導体)との間には、同じく切り込みを入れる。このと
き切り込みを入れない部分を残すが、これが図4中符号
18として示す面部分であり、これは図示のとおりWブ
ロックにおける最奥部のp型半導体の下方部に位置して
いる。Wブロックの最終端の角柱状p型半導体と相隣る
Xブロックの角柱状n型半導体とは、該面部分18で連
結され且つ素子としての使用時にこの部分で導通する。
Next, the prismatic n-type semiconductor of the X block adjacent to the prismatic p-type semiconductor at the final end of the W block (p-type semiconductor at the deepest part of the W block) (n at the deepest part of the X block). Type semiconductor), and also make a notch. At this time, a portion not to be cut is left, but this is a surface portion shown by reference numeral 18 in FIG. 4, and this is a portion below the p-type semiconductor at the innermost portion in the W block as shown. The prismatic p-type semiconductor at the final end of the W block and the prismatic n-type semiconductor of the X block adjacent to each other are connected by the surface portion 18 and conduct at this portion when used as an element.

【0017】また、Xブロックの最終端の角柱状p型半
導体(図4におけるXブロック中、最前部の角柱状p型
半導体)と相隣るYブロックのn型半導体(図4におけ
るブロックY中、最前部の角柱状n型半導体)との間に
は、同じく切込みを入れる。このとき切込みを入れない
部分を残すが、この部分はXブロック中最前部のp型半
導体の下方部に符号19として示している。Xブロック
の最終端の角柱状p型半導体と相隣るYブロックの角柱
状n型半導体とは、該面部分19で連結され且つ素子と
しての使用時にこの部分で導通する。そして以上の点
は、YブロックとZブロックとの間についても同様であ
り、図4中符号20として示す部分がその両者間の連
結、導通部分である。
Further, the n-type semiconductor of the Y block (in the block Y in FIG. 4) adjacent to the prism-shaped p-type semiconductor at the final end of the X block (the frontmost prism-shaped p-type semiconductor in the X block in FIG. 4). , And a prismatic n-type semiconductor at the forefront portion). At this time, a portion not to be cut is left, but this portion is shown as reference numeral 19 in the lower portion of the p-type semiconductor at the frontmost portion in the X block. The prismatic p-type semiconductor at the final end of the X block and the prismatic n-type semiconductor of the Y block adjacent to each other are connected by the surface portion 19 and conduct at this portion when used as an element. The above points are the same between the Y block and the Z block, and the portion indicated by reference numeral 20 in FIG. 4 is the connecting and conducting portion between the two.

【0018】以上で形成された各切り欠き部分、すなわ
ち各隙間はそのままにしておくこともできるが、その隙
間の存在により強度上その分弱くなるので、該隙間を補
強用の断熱材で埋めるようにする(=該隙間に補強用の
断熱材を充填する)のが望ましく、この断熱材としては
各種樹脂類や無機系断熱材を使用することができる。例
えばBi2Te3など比較的低温で使用する材料の場合に
は好ましくは熱硬化性樹脂が使用でき、またFeSi2
等のように高温型の素子については、例えばアルミナ粉
末に焼結助剤を混合して隙間に充填し焼結させることに
より補強することができる。
The notches formed as described above, that is, the gaps may be left as they are, but the presence of the gaps weakens the strength accordingly, so that the gaps should be filled with a heat insulating material for reinforcement. (= Filling the gap with a reinforcing heat insulating material), and various resins and inorganic heat insulating materials can be used as this heat insulating material. In the case of a material used at a relatively low temperature such as Bi 2 Te 3, a thermosetting resin can be preferably used, and FeSi 2
A high-temperature element such as the above can be reinforced by, for example, mixing alumina powder with a sintering aid, filling the gap, and sintering.

【0019】概略以上のような工程により、板状p型半
導体及び板状n型半導体を交互に2対すなわち交互に合
計4枚を積層したブロックから、図3(d)に示すよう
に16個の角柱状p型半導体と角柱状n型半導体が相接
して形成され、合計8対の素子を一体に連結した素子が
構成される。これは一例としてのものであるが、本発明
によればこのようにして相異なる二種の熱電変換材料の
板状体を交互に、例えば3対すなわち合計6枚を積層し
たブロックからは合計18対の素子が得られ、4対すな
わち合計8枚を積層したブロックからは合計32対の素
子を一体に連結した素子を得ることができる。
By the steps as described above, from a block in which two pairs of plate-like p-type semiconductors and plate-like n-type semiconductors are alternately laminated, that is, four sheets in total are alternately laminated, as shown in FIG. The prismatic p-type semiconductor and the prismatic n-type semiconductor are formed in contact with each other to form an element in which a total of 8 pairs of elements are integrally connected. This is just an example, but according to the present invention, a total of 18 plates can be obtained by alternately laminating two different plate-shaped bodies of thermoelectric conversion materials, for example, 3 pairs, that is, 6 sheets in total. A pair of elements can be obtained, and a total of 32 pairs of elements can be integrally connected from a block in which 4 pairs, that is, a total of 8 layers are stacked.

【0020】[0020]

【実施例】以下、実施例を基に本発明をさらに具体的に
説明するが、本発明がこの実施例に限定されないことは
勿論である。本実施例では上記のような手順により相異
なる二種の熱電変換材料の板状体を交互に2層ずつ積層
して焼結し、図3(d)に示すようなブロック状素子を
得、これを図5に示すような態様で負荷(R)を接続し
て使用した。
The present invention will be described in more detail based on the following examples, but it goes without saying that the present invention is not limited to these examples. In this example, two layers of plate-like bodies of different thermoelectric conversion materials are alternately laminated and sintered by the above-mentioned procedure to obtain a block-shaped element as shown in FIG. 3 (d). This was used by connecting a load (R) in the manner as shown in FIG.

【0021】《実施例1》アルメル、クロメルを各2層
ずつ積層して焼結し、図3(a)のような12×15×
10mmのブロックを作製した。その製造条件は、まず
圧力15MPa、室温で圧粉を成形した(なお、アルメ
ルークロメル系の場合その成形圧は10〜20MPa程
度の範囲で行うことができる)。その後電気炉を用いて
不活性ガス中で1350℃で焼結した。これをフライス
盤で図3(b)のように切断し、図3(c)のように組
み直して再焼結した。なおその切断にはフライス盤とは
限らず、ダイシングソーやワイヤソーを用いることもで
きる。
Example 1 Two layers each of alumel and chromel were laminated and sintered to obtain 12 × 15 × as shown in FIG. 3 (a).
A 10 mm block was made. The production conditions were as follows. First, a powder was compacted at a pressure of 15 MPa and room temperature (in the case of an alumel-chromel system, the compaction pressure can be in the range of about 10 to 20 MPa). Then, it was sintered at 1350 ° C. in an inert gas using an electric furnace. This was cut with a milling machine as shown in FIG. 3 (b), reassembled as shown in FIG. 3 (c), and re-sintered. The cutting is not limited to the milling machine, and a dicing saw or a wire saw can be used.

【0022】再焼結の条件は上記最初の焼結条件と同じ
であるが、再焼結が好適になされるためには接合面を十
分に研磨することが重要な点であり、本実施例でも接合
面を十分に研磨した。再焼結後、フライス盤により図3
(d)のように切り欠きを入れ、8対の直列接合とし
た。電流通路の両端にあたる部分に銀ロウを抵抗溶接し
て電極とし、図5のようにセットし、素子を完成した。
この素子に温度差400℃をかけて起電力を測定したと
ころ、開放起電力は設計どおり128mVであった。こ
の点、図2(b)に示すような2対品では温度差400
℃で32mVであったのと対比すると、その値128m
Vは1対品で得られる開放起電力の8倍の開放起電力に
相当している。
The re-sintering conditions are the same as the first sintering conditions described above, but it is important to sufficiently polish the joint surface in order to make the re-sintering suitable. However, the joint surface was polished sufficiently. After re-sintering, use a milling machine as shown in Figure 3.
As shown in (d), notches were formed to make 8 pairs of series junctions. A silver solder was resistance-welded to the portions corresponding to both ends of the current path to form electrodes, which were set as shown in FIG. 5 to complete the device.
When the electromotive force was measured by applying a temperature difference of 400 ° C. to this device, the open electromotive force was 128 mV as designed. In this respect, the temperature difference of 400 in the two-pair product as shown in FIG.
Compared with 32 mV at ℃, the value is 128 mV
V corresponds to an open electromotive force that is eight times the open electromotive force that can be obtained with one product.

【0023】《実施例2》FeSi2 系について試作を
行った。焼結はホットプレスを用いて、圧力14MP
a、温度1130℃で行った。なおFeSi2 系の場
合、その焼結は1100〜1160℃の温度範囲で実施
することができる。その後β相と呼ばれる高ゼーベック
係数相を得るために温度850℃で熱処理をした。それ
以外は上記実施例1の場合と同じである。この素子に温
度差400℃をかけて起電力を測定したところ、開放起
電力は1.6Vであった。この点、図2(b)に示すよ
うな2対品では同じ温度差400℃で400mVであっ
たのと対比すると、その値1.6Vは1対品で得られる
開放起電力の8倍の開放起電力に相当している。
Example 2 A trial production was carried out for a FeSi 2 system. Sintering using hot press, pressure 14MP
a, the temperature was 1130 ° C. In the case of FeSi 2 system, the sintering can be carried out in the temperature range of 1100-1160 ° C. After that, heat treatment was performed at a temperature of 850 ° C. to obtain a high Seebeck coefficient phase called β phase. Other than that, it is the same as in the case of the first embodiment. When the electromotive force was measured by applying a temperature difference of 400 ° C. to this element, the open electromotive force was 1.6V. On the other hand, in contrast to the case where the temperature difference of 400 ° C. was 400 mV in the case of 2 parts as shown in FIG. 2B, the value 1.6 V was 8 times the open electromotive force obtained in 1 part. It corresponds to the open electromotive force.

【0024】[0024]

【発明の効果】以上のとおり、本発明によれば熱電変換
素子において電極の剥離のない直接接合法による多段積
層が可能となり、同一の材料量で従来法に比べて例えば
4倍、8倍、16倍というような高い電圧を得ることが
できる。
As described above, according to the present invention, it is possible to perform multi-stage lamination by a direct bonding method without peeling of electrodes in a thermoelectric conversion element, and for example, with the same material amount, for example, 4 times, 8 times, It is possible to obtain a voltage as high as 16 times.

【図面の簡単な説明】[Brief description of drawings]

【図1】熱電変換素子の一態様を原理的に説明する模式
図。
FIG. 1 is a schematic diagram for explaining in principle one aspect of a thermoelectric conversion element.

【図2】従来の熱電変換素子の構成態様例を模式的に示
した図。
FIG. 2 is a diagram schematically showing a configuration example of a conventional thermoelectric conversion element.

【図3】本発明における熱電変換素子の作製過程を示す
図。
FIG. 3 is a diagram showing a process of manufacturing a thermoelectric conversion element according to the present invention.

【図4】図3における作製工程中切り欠きを入れる態様
を説明するための図。
4A and 4B are views for explaining a mode in which a notch is formed during the manufacturing process in FIG.

【図5】本発明で得られた熱電変換素子の使用態様を示
す図。
FIG. 5 is a diagram showing a usage mode of the thermoelectric conversion element obtained by the present invention.

【符号の説明】[Explanation of symbols]

1、p p型半導体 2、n n型半導体 3 高温側接合部 4 低温側接合部 Q 高温熱源 Th 高温側温度 Tc 低温側温度 S 絶縁空間 5 高温側電極 6、7 低温側電極 8 電極 9 複数の切り欠き 10 切断部 A〜D 切断部により切り離された4個の板状部片 11 切り欠き部分 12〜14 交互の切り込み 15〜17 切込みを入れない部分 18〜20 相隣るブロックW〜Z間の連結、導通部分 1, pp type semiconductor 2, n n type semiconductor 3 high temperature side junction 4 low temperature side junction Q high temperature heat source Th high temperature side temperature Tc low temperature side temperature S insulating space 5 high temperature side electrode 6, 7 low temperature side electrode 8 electrode 9 multiple Notch 10 Cut part A-D 4 plate-like pieces separated by the cut part 11 Notch part 12-14 Alternate notch 15-17 Part not notch 18-20 Block W-Z adjacent to each other Connection between parts, conduction part

フロントページの続き (72)発明者 古田 基 神奈川県横浜市神奈川区新子安1ー29ー3 ー38 (72)発明者 菊地 啓 東京都稲城市押立1188ー103Front page continuation (72) Inventor Moto Furuta 1-2-9-3 Shinkoyasu, Kanagawa-ku, Yokohama, Kanagawa Prefecture (72) Inventor Kei Kikuchi 1188-103 Oshidate, Inagi-shi, Tokyo

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】相異なる二種の熱電変換材料の板状体を交
互に複数個積層して焼結し、該焼結積層体をその構成板
状体の面に対して直角方向で且つ等間隔に切断した後、
その板状切断部片のうち1つ置きに位置する板状部片を
180°回転させて、他の1つ置きに位置する各板状部
片間に嵌挿組み直して再焼結し、次いで相隣る各角柱状
材料間に交互に切込みを入れることにより各角柱状材料
を電気的に直列に連結してなることを特徴とする熱電変
換素子。
1. A plurality of plate-shaped bodies made of two different thermoelectric conversion materials are alternately laminated and sintered, and the sintered laminated body is perpendicular to the plane of the constituent plate-shaped bodies. After cutting to the interval,
One of the plate-shaped cutting pieces located at every other one is rotated by 180 °, and the plate-shaped pieces located at every other one of the plate-shaped cutting pieces are re-sintered by being re-inserted and re-assembled. A thermoelectric conversion element, characterized in that each prismatic material is electrically connected in series by alternately forming cuts between adjacent prismatic materials.
【請求項2】上記相隣る各角柱状材料間に交互に切り込
みを入れることにより形成された隙間に補強用の断熱材
を充填してなることを特徴とする請求項1記載の熱電変
換素子。
2. A thermoelectric conversion element according to claim 1, wherein a gap formed by alternately cutting the adjacent prismatic materials is filled with a heat insulating material for reinforcement. .
【請求項3】相異なる二種の熱電変換材料の板状体を交
互に複数個積層して焼結し、該焼結積層体をその構成板
状体の面に対して直角方向で且つ等間隔に切断した後、
その板状切断部片のうち1つ置きに位置する板状部片を
180°回転させて、他の1つ置きに位置する各板状部
片間に嵌挿組み直して再焼結し、次いで相隣る各角柱状
材料間に交互に切込みを入れることにより各角柱状材料
を電気的に直列に連結することを特徴とする熱電変換素
子の製造方法。
3. A plurality of plate-like bodies of different thermoelectric conversion materials which are different from each other are alternately laminated and sintered, and the sintered laminate is perpendicular to the plane of the constituent plate-like bodies. After cutting to the interval,
One of the plate-shaped cutting pieces located at every other one is rotated by 180 °, and the plate-shaped pieces located at every other one of the plate-shaped cutting pieces are re-sintered by being re-inserted and re-assembled. A method for manufacturing a thermoelectric conversion element, characterized in that each prismatic material is electrically connected in series by alternately forming cuts between adjacent prismatic materials.
【請求項4】上記相隣る各角柱状材料間に交互に切り込
みを入れることにより形成された隙間に補強用の断熱材
を充填することを特徴とする請求項3記載の熱電変換素
子の製造方法。
4. A thermoelectric conversion element according to claim 3, wherein a gap formed by alternately cutting the adjacent prismatic materials is filled with a heat insulating material for reinforcement. Method.
JP8099050A 1996-03-27 1996-03-27 Thermoelectric transducer element and its manufacture Pending JPH09266330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8099050A JPH09266330A (en) 1996-03-27 1996-03-27 Thermoelectric transducer element and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8099050A JPH09266330A (en) 1996-03-27 1996-03-27 Thermoelectric transducer element and its manufacture

Publications (1)

Publication Number Publication Date
JPH09266330A true JPH09266330A (en) 1997-10-07

Family

ID=14236752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8099050A Pending JPH09266330A (en) 1996-03-27 1996-03-27 Thermoelectric transducer element and its manufacture

Country Status (1)

Country Link
JP (1) JPH09266330A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015079796A (en) * 2013-10-15 2015-04-23 住友電気工業株式会社 Thermoelectric element and method of manufacturing thermoelectric element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015079796A (en) * 2013-10-15 2015-04-23 住友電気工業株式会社 Thermoelectric element and method of manufacturing thermoelectric element

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