JPH0923044A - Wiring board - Google Patents

Wiring board

Info

Publication number
JPH0923044A
JPH0923044A JP7168792A JP16879295A JPH0923044A JP H0923044 A JPH0923044 A JP H0923044A JP 7168792 A JP7168792 A JP 7168792A JP 16879295 A JP16879295 A JP 16879295A JP H0923044 A JPH0923044 A JP H0923044A
Authority
JP
Japan
Prior art keywords
wiring
wiring conductor
insulating substrate
wiring board
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7168792A
Other languages
Japanese (ja)
Inventor
Shoichi Nakagawa
彰一 仲川
Shinya Terao
慎也 寺尾
Jun Fukuda
潤 福田
Kenichi Aihara
憲一 合原
Takashi Okunosono
隆志 奥ノ薗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP7168792A priority Critical patent/JPH0923044A/en
Publication of JPH0923044A publication Critical patent/JPH0923044A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which can effectively prevent the cracking of its insulating substrate that may cause the stripping off, disconnection, etc., of wiring conductors and is formed by firmly sticking the wiring conductors to the insulating substrate in a prescribed pattern. SOLUTION: A wiring board is constituted by integrally forming wiring conductors 2 in and on an insulating substrate 1 composed of a sintered ceramic body. The corner sections (c) of the wiring conductors 2 formed in the insulating substrate 1 are rounded to circular-arcuate shapes.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体素子やコンデン
サ、抵抗器等の電子部品が搭載される配線基板に関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board on which electronic parts such as semiconductor elements, capacitors and resistors are mounted.

【0002】[0002]

【従来の技術】従来、配線基板は一般に酸化アルミニウ
ム質焼結体等の電気絶縁性のセラミック質焼結体から成
る絶縁基体の内部及び表面にタングステン、モリブデ
ン、マンガン等の高融点金属粉末から成る配線導体を配
設した構造を有しており、絶縁基体の上面に半導体素子
やコンデンサ、抵抗器等の電子部品を搭載させるととも
に該電子部品の電極を半田を介して配線導体に接続させ
ることによって絶縁基体上面に搭載された各電子部品は
その各々が配線導体を介して電気的に接続されるように
なっている。
2. Description of the Related Art Conventionally, a wiring board is generally made of a refractory metal powder of tungsten, molybdenum, manganese or the like inside and on an insulating substrate made of an electrically insulating ceramic sintered body such as an aluminum oxide sintered body. By having a structure in which a wiring conductor is arranged, by mounting an electronic component such as a semiconductor element, a capacitor, or a resistor on the upper surface of an insulating substrate, and connecting the electrode of the electronic component to the wiring conductor via solder. Each electronic component mounted on the upper surface of the insulating substrate is electrically connected to each other via a wiring conductor.

【0003】尚、かかる従来の配線基板は通常、セラミ
ックスの積層技術及びスクリーン印刷等の厚膜技術を採
用することによって製作されており、具体的には以下の
方法によって製作されている。
Incidentally, such a conventional wiring board is usually manufactured by adopting a ceramics lamination technique and a thick film technique such as screen printing, and specifically, it is produced by the following method.

【0004】即ち、 (1) まず、酸化アルミニウム、酸化珪素、酸化マグネシ
ウム、酸化カルシウム等の原料粉末に適当な有機バイン
ダー、可塑剤、溶剤を添加混合して泥漿状となすととも
にこれを従来周知のドクターブレード法やカレンダーロ
ール法等のテープ成形技術を採用して複数枚のセラミッ
クグリーンシート( セラミック生シート)を得、しかる
後、各セラミックグリーンシートの所定位置に穴あけ加
工法によりスルーホールを形成する。
That is, (1) First, a suitable organic binder, a plasticizer, and a solvent are added to and mixed with a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. to form a slurry, and this is conventionally known. Adopt tape forming technology such as doctor blade method or calendar roll method to obtain a plurality of ceramic green sheets (ceramic green sheets), and then form through holes at predetermined positions of each ceramic green sheet by drilling method. .

【0005】(2) 次にタングステン、モリブデン等の高
融点金属粉末に適当な有機バインダー、可塑剤、溶剤を
添加混合して金属ペーストを得るとともに該金属ペース
トをスクリーン印刷法を採用することによって前記セラ
ミックグリーンシートの表面に所定パターンに印刷塗布
するとともに各セラミックグリーンシートのスルーホー
ル内に充填する。
(2) Next, a suitable organic binder, a plasticizer, and a solvent are added to and mixed with a refractory metal powder such as tungsten and molybdenum to obtain a metal paste, and the metal paste is screen-printed to obtain the metal paste. The surface of each ceramic green sheet is printed and applied in a predetermined pattern, and the through holes of each ceramic green sheet are filled.

【0006】(3) そして最後に表面及びスルーホールに
金属ペーストが塗布充填されたセラミックグリーンシー
トを上下に積層し、しかる後、これを還元雰囲気中もし
くは中性雰囲気中、約1600℃の温度で焼成すること
によって製品としで配線基板が完成する。
(3) Finally, ceramic green sheets whose surfaces and through holes are coated and filled with a metal paste are laminated one on top of the other, and thereafter, in a reducing atmosphere or a neutral atmosphere, at a temperature of about 1600 ° C. The wiring board is completed as a product by firing.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、この従
来の配線基板は、絶縁基体を構成するセラミック質焼結
体(例えば、酸化アルミニウム質焼結体)及び配線導体
を形成するタングステン、モリブデン等、高融点金属粉
末の熱膨張係数がそれぞれ6.0×10-6/℃〜7.5
×10-6/℃、4.5×10-6/℃〜5.5×10-6
℃であり、両者相違することから、タングステン、モリ
ブデン等の高融点金属粉末から成る金属ペーストを所定
パターンに印刷塗布したセラミックグリーンシートを焼
成し、配線基板となす際、絶縁基体と配線導体との間に
両者の熱膨張係数の相違に起因する熱応力が発生すると
ともにこれが配線導体の各角部に集中し、配線導体の各
角部と絶縁基体との間に大きな応力が残留してしまい、
配線基板に外力や熱衝撃力が印加されると該外力や熱衝
撃力が前記配線導体の各角部に集中して残留している応
力と相俟って極めて大きなものとなり、絶縁基体にクラ
ックを発生させて配線導体に断線を招来させたり、配線
導体を絶縁基体より剥離させたりするという欠点を有し
ていた。
This conventional wiring board, however, has a problem in that a ceramic sintered body (for example, an aluminum oxide sintered body) that constitutes an insulating substrate and tungsten, molybdenum, etc. that form a wiring conductor are high in quality. The thermal expansion coefficient of the melting point metal powder is 6.0 × 10 −6 / ° C. to 7.5, respectively.
× 10 -6 /℃,4.5×10 -6 /℃~5.5×10 -6 /
Since the difference between the two is different, the ceramic green sheet on which a metal paste made of a refractory metal powder such as tungsten or molybdenum is printed and applied in a predetermined pattern is fired to form a wiring board. In the meantime, thermal stress is generated due to the difference in thermal expansion coefficient between the two, and this is concentrated at each corner of the wiring conductor, and large stress remains between each corner of the wiring conductor and the insulating substrate.
When an external force or a thermal shock force is applied to the wiring board, the external force or the thermal shock force becomes extremely large in combination with the residual stress concentrated at each corner of the wiring conductor, resulting in a crack in the insulating substrate. However, there are drawbacks in that the wiring conductor is broken and the wiring conductor is separated from the insulating substrate.

【0008】[0008]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は配線導体の剥離や配線導体に断線等を招
来する絶縁基体のクラック発生を有効に防止し、絶縁基
体に所定パターンの配線導体を強固に被着形成させて成
る配線基板を提供することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to effectively prevent cracking of an insulating substrate which may cause peeling of the wiring conductor or disconnection of the wiring conductor, and to provide a predetermined insulating substrate. An object of the present invention is to provide a wiring board formed by firmly forming and forming a wiring conductor of a pattern.

【0009】[0009]

【課題を解決するための手段】本発明はセラミック質焼
結体から成る絶縁基体の内部及び表面に配線導体を一体
的に形成して成る配線基板であって、前記絶縁基体の内
部に形成されている配線導体の各角部が円弧状をなして
いることを特徴とするものである。
SUMMARY OF THE INVENTION The present invention is a wiring board formed by integrally forming wiring conductors inside and on the surface of an insulating base made of a ceramic sintered body, the wiring base being formed inside the insulating base. It is characterized in that each corner portion of the wiring conductor has a circular arc shape.

【0010】また本発明は前記絶縁基体の内部に形成さ
れている配線導体の各角部の円弧半径Rを、配線導体の
厚みをTとしたとき、0.1T≦R≦0.5Tとしたこ
とを特徴とするものである。
Further, according to the present invention, the arc radius R of each corner of the wiring conductor formed inside the insulating substrate is 0.1T≤R≤0.5T, where T is the thickness of the wiring conductor. It is characterized by that.

【0011】[0011]

【作用】本発明の配線基板よれば、絶縁基体の内部に形
成される配線導体の各角部を円弧状となしたことから絶
縁基体の内部及び表面に配線導体を一体的に形成した配
線基板を製作する際、絶縁基体と配線導体との間に両者
の熱膨張係数の相違に起因して熱応力が発生したとして
もその熱応力は配線導体の各角部に集中することなく配
線導体の全体に分散されることとなり、その結果、配線
導体と絶縁基体との間に残留する単位体積当たりの熱応
力は極めて小さく、配線基板に外力や熱衝撃力が印加さ
れても絶縁基体にクラックが発生することは殆どなく、
これによって配線導体に断線等を招来するのを有効に防
止することができるとともに配線導体を絶縁基体に強固
に被着形成させておくことが可能となる。
According to the wiring board of the present invention, since the corners of the wiring conductor formed inside the insulating base are arcuate, the wiring board is integrally formed inside and on the surface of the insulating base. When manufacturing, even if thermal stress is generated between the insulating base and the wiring conductor due to the difference in thermal expansion coefficient between them, the thermal stress does not concentrate at each corner of the wiring conductor and As a result, the thermal stress per unit volume remaining between the wiring conductor and the insulating substrate is extremely small, and even if external force or thermal shock force is applied to the wiring substrate, cracks will occur in the insulating substrate. Rarely happens,
As a result, it is possible to effectively prevent the wiring conductor from being broken or the like, and it is possible to firmly adhere the wiring conductor to the insulating base.

【0012】[0012]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1及び図2は本発明の配線基板の一実施例を示
し、1は絶縁基体、2は絶縁基体1に一体的に形成され
た配線導体である。この配線導体2を絶縁基体1に一体
的に形成させたものが配線基板Aとなる。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 and 2 show an embodiment of a wiring board of the present invention, in which 1 is an insulating base and 2 is a wiring conductor integrally formed on the insulating base 1. A wiring board A is formed by integrally forming the wiring conductor 2 on the insulating base 1.

【0013】前記配線基板Aの絶縁基体1は酸化アルミ
ニウム質焼結体やムライト質焼結体、窒化アルミニウム
質焼結体、ガラスセラミックス焼結体等のセラミック質
焼結体で形成されており、その上面に半導体素子やコン
デンサ、抵抗器等の電子部品4が搭載される。
The insulating substrate 1 of the wiring board A is formed of a ceramic sintered body such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, or a glass ceramic sintered body. Electronic components 4, such as a semiconductor element, a capacitor, and a resistor, are mounted on the upper surface thereof.

【0014】前記絶縁基体1はその内部及び表面に複数
個の配線導体2が多層に配設されており、各配線導体2
は絶縁基体1内に設けたスルーホール導体3を介して電
気的に接続されている。
The insulating substrate 1 has a plurality of wiring conductors 2 arranged in multiple layers inside and on the surface thereof.
Are electrically connected via a through-hole conductor 3 provided in the insulating substrate 1.

【0015】前記配線導体2及びスルーホール導体3は
絶縁基体1の上面に搭載される各電子部品4同士を相互
に電気的に接続するとともに各電子部品4を外部電気回
路に電気的に接続する作用を為し、タングステン、モリ
ブデン等で形成されている。
The wiring conductor 2 and the through-hole conductor 3 electrically connect the electronic components 4 mounted on the upper surface of the insulating substrate 1 to each other and also electrically connect the electronic components 4 to an external electric circuit. It acts and is formed of tungsten, molybdenum, or the like.

【0016】また前記配線導体2は図2に示すように、
絶縁基体1の内部に形成されている領域の各角部cが円
弧状をなしており、各角部cを円弧状となすことによっ
て絶縁基体1に配線導体2を一体的に形成した配線基板
Aを製作する際、絶縁基体1と配線導体2との間に両者
の熱膨張係数の相違に起因して熱応力が発生したとして
もその熱応力は配線導体2の各角部cに集中することな
く配線導体2の全体に分散され、その結果、配線導体2
と絶縁基体1との間に残留する単位体積当たりの熱応力
が極めて小さいものとなって配線基板Aに外力や熱衝撃
力が印加されても絶縁基体1にクラックが発生すること
は殆どなく、これによって配線導体2に断線等を招来す
るのを有効に防止することができるとともに配線導体2
を絶縁基体1に強固に被着形成させておくことが可能と
なる。
The wiring conductor 2 is, as shown in FIG.
Each of the corners c of the region formed inside the insulating base 1 has an arc shape, and the wiring conductor 2 is integrally formed on the insulating base 1 by forming each corner c into an arc shape. When manufacturing A, even if thermal stress is generated between the insulating substrate 1 and the wiring conductor 2 due to the difference in thermal expansion coefficient between them, the thermal stress is concentrated at each corner c of the wiring conductor 2. Distributed over the entire wiring conductor 2 without
The thermal stress per unit volume remaining between the insulating substrate 1 and the insulating substrate 1 becomes extremely small, and even if an external force or a thermal shock force is applied to the wiring substrate A, the insulating substrate 1 hardly cracks. As a result, it is possible to effectively prevent the wiring conductor 2 from being broken, and at the same time,
Can be firmly adhered to the insulating substrate 1.

【0017】尚、前記配線導体2はその各角部cの円弧
半径Rが、配線導体2の厚みをTとしたときR<0.1
Tとなると配線導体2と絶縁基体1との間に発生する熱
応力を配線基板2の全体に分散させるのが困難となる傾
向にあり、またR>0.5Tとなると絶縁基体1に配線
導体2を一体的に形成した配線基板Aを製作する際、絶
縁基体1と配線導体2の各角部cとの間に大きな隙間が
形成されてしまう傾向にある。従って、前記配線導体2
の各角部cの円弧半径Rは、配線導体2の厚みをTとし
たとき、0.1T≦R≦0.5Tの範囲としておくこと
が好ましい。
The radius R of the arc of each corner c of the wiring conductor 2 is R <0.1 when the thickness of the wiring conductor 2 is T.
When T is set, it tends to be difficult to disperse the thermal stress generated between the wiring conductor 2 and the insulating substrate 1 over the entire wiring substrate 2, and when R> 0.5T, the wiring conductor is formed on the insulating substrate 1. When manufacturing the wiring board A in which the two are integrally formed, a large gap tends to be formed between the insulating base 1 and each corner c of the wiring conductor 2. Therefore, the wiring conductor 2
The arc radius R of each corner c is preferably in the range of 0.1T ≦ R ≦ 0.5T, where T is the thickness of the wiring conductor 2.

【0018】また前記配線導体2のうち絶縁基体1の上
面に形成されたものはその露出表面に更にニッケル、金
等の耐蝕性に優れ、且つ良導電性の金属をメッキ法によ
り1μm乃至20μmの厚みに被着させておくと、配線
導体2の酸化腐食が有効に防止されるとともに配線導体
2と電子部品4との電気的接続が良好となる。従って、
前記配線導体2のうち絶縁基体1の上面に形成されたも
のはその露出表面に更にニッケル、金等の耐蝕性に優
れ、且つ良導電性の金属をメッキ法により1μm乃至2
0μmの厚みに被着させておくことが好ましい。
Of the wiring conductors 2, one formed on the upper surface of the insulating substrate 1 has a metal of 1 μm to 20 μm which is excellent in corrosion resistance such as nickel and gold and has good conductivity on the exposed surface by plating. When the wiring conductor 2 is adhered to a thickness, oxidative corrosion of the wiring conductor 2 is effectively prevented and the electrical connection between the wiring conductor 2 and the electronic component 4 is improved. Therefore,
Of the wiring conductors 2, one formed on the upper surface of the insulating substrate 1 has an exposed surface further coated with a metal having excellent corrosion resistance such as nickel and gold and having good conductivity by 1 μm to 2 μm.
It is preferable to deposit it to a thickness of 0 μm.

【0019】かくして上述の配線基板Aによれば、絶縁
基体1の上面に半導体素子やコンデンサ、抵抗器等の電
子部品4を搭載するとともに各電子部品4の電極、端子
を半田等を介して配線導体2に接続すれば、絶縁基体1
の上面に搭載される半導体素子やコンデンサ等の電子部
品4はその各々が配線導体2及びスルーホール導体3を
介して電気的に接続され、これによって所定の電気回路
を形成することとなる。
Thus, according to the wiring board A described above, electronic components 4 such as semiconductor elements, capacitors, and resistors are mounted on the upper surface of the insulating substrate 1, and electrodes and terminals of each electronic component 4 are wired via solder or the like. Insulating substrate 1 if connected to conductor 2
The electronic components 4 such as semiconductor elements and capacitors mounted on the upper surface of each are electrically connected to each other via the wiring conductors 2 and the through-hole conductors 3, thereby forming a predetermined electric circuit.

【0020】次に上述の配線基板の製造方法について図
3乃至図6に基づき説明する。
Next, a method of manufacturing the above wiring board will be described with reference to FIGS.

【0021】まず図3に示す如く、3枚のセラミックグ
リーンシート10a 、10b 、10C を準備するとともにセラ
ミックグリーンシート10a 、10b の所定位置にスルーホ
ールHを形成する。
First, as shown in FIG. 3, three ceramic green sheets 10a, 10b and 10C are prepared and through holes H are formed at predetermined positions of the ceramic green sheets 10a and 10b.

【0022】前記セラミックグリーンシート10a 、10b
、10c は例えば配線基板の絶縁基体が酸化アルミニウ
ム質焼結体で形成されている場合には、酸化アルミニウ
ム、酸化珪素、酸化マグネシウム、酸化カルシウム等の
原料粉末に適当な有機バインダー、可塑剤、溶剤を添加
混合して泥漿状となし、しかる後、前記泥漿物を従来周
知のトクターブレード法やカレンダーロール法等を採用
し、シート状に成形することによって形成される。
The ceramic green sheets 10a and 10b
, 10c are suitable organic binders, plasticizers, solvents for raw material powders of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. when the insulating substrate of the wiring board is formed of an aluminum oxide sintered body. Is added and mixed to form a sludge, and then the sludge is formed into a sheet by using a conventionally known method such as a doctor blade method or a calendar roll method.

【0023】また前記セラミックグリーンシート10a 、
10b へのスルーホールHの形成はセラミックグリーンシ
ート10a 、10b に従来周知のプレス穴あけ加工法により
所定径の貫通孔をあけることによって各セラミックグリ
ーンシート10a 、10b の所定位置に形成される。
Further, the ceramic green sheet 10a,
The through holes H are formed in the ceramic green sheets 10a, 10b by forming through holes of a predetermined diameter in the ceramic green sheets 10a, 10b by a conventionally known press drilling method.

【0024】次に図4に示す如く、前記各セラミックグ
リーンシート10a 、10b 、10c の各々の表面に金属ペー
ストを所定パターンに被着させて配線導体パターン20を
形成し、同時にスルーホールH内に金属ペーストを充填
させてスルーホール用導体層21を形成する。この時、例
えば図5に示すように、セラミックグリーンシート10a
の下面及びセラミックグリーンシート10b の上面で配線
導体パターン20が形成される周辺に予めセラミックグリ
ーンシート10a 、10b と同質のセラミック材料からなる
内周辺を円弧状とした枠状体11を被着させておくとセラ
ミックグリーンシート10a とセラミックグリーンシート
10b 間に配される配線導体パターン20の各角部を円弧状
となすことができる。またセラミックグリーンシート10
b とセラミックグリーンシート10c 間に配される配線導
体パターン20もセラミックグリーンシート10b の下面と
セラミックグリーンシート10c の上面に内周辺を円弧状
とした枠状体を予め被着させておくことによって各角部
を同様に円弧状になすことができる。
Next, as shown in FIG. 4, a metal paste is applied in a predetermined pattern on the surface of each of the ceramic green sheets 10a, 10b, 10c to form a wiring conductor pattern 20, and at the same time, in the through hole H. The metal paste is filled to form the through-hole conductor layer 21. At this time, as shown in FIG. 5, for example, the ceramic green sheet 10a
A frame-shaped body 11 made of the same ceramic material as the ceramic green sheets 10a and 10b and having an arcuate inner periphery is previously attached to the lower surface of the ceramic green sheet 10b and the periphery of the wiring conductor pattern 20 formed on the upper surface of the ceramic green sheet 10b. Okuto Ceramic Green Sheet 10a and Ceramic Green Sheet
Each corner of the wiring conductor pattern 20 arranged between 10b can be formed in an arc shape. Also ceramic green sheet 10
The wiring conductor pattern 20 provided between the ceramic green sheet 10c and the ceramic green sheet 10c is also attached to the lower surface of the ceramic green sheet 10b and the upper surface of the ceramic green sheet 10c by preliminarily attaching a frame body having an arcuate inner periphery. The corners can likewise be arcuate.

【0025】尚、前記配線導体パターン20及びスルーホ
ール用導体層21を形成する金属ペーストはタングステ
ン、モリブデン等の高融点金属粉末に適当な有機バイン
ダー、可塑剤、溶剤を添加混合し、ペースト状となすこ
とによって形成される。
The metal paste for forming the wiring conductor pattern 20 and the through-hole conductor layer 21 is made into a paste form by adding a suitable organic binder, a plasticizer, and a solvent to a refractory metal powder such as tungsten or molybdenum. Formed by eggplant.

【0026】また前記配線導体パターン20及びスルーホ
ール用導体層21の形成は金属ペーストをセラミックグリ
ーンシート10a 、10b 、10c の各々の表面にスクリーン
印刷法より印刷塗布することによって行われる。
The wiring conductor pattern 20 and the through-hole conductor layer 21 are formed by screen-coating a metal paste on each surface of the ceramic green sheets 10a, 10b, 10c by a screen printing method.

【0027】次に前記表面に配線導体パターン20が形成
され、スルーホールH内にスルーホール用導体層21が充
填された各セラミックグリーンシート10a 、10b 、10c
を図6に示す如く、各セラミックグリーンシート10a 、
10b 、10c 表面に形成させた配線導体パターン20がセラ
ミックグリーンシート10a 、10b のスルーホールH内に
充填させたスルーホール用導体層21で電気的に接続され
るようにして上下に積層し、積層体Lを形成する。
Next, the wiring conductor pattern 20 is formed on the surface, and the ceramic green sheets 10a, 10b, 10c in which the through hole conductor layer 21 is filled in the through holes H are formed.
As shown in FIG. 6, each ceramic green sheet 10a,
The wiring conductor patterns 20 formed on the surfaces 10b and 10c are vertically laminated so that they are electrically connected by the through-hole conductor layers 21 filled in the through holes H of the ceramic green sheets 10a and 10b. Form body L.

【0028】そして最後に前記積層体Lを還元雰囲気
中、約1600℃の温度で焼成し、各セラミックグリー
ンシート10a 、10b 、10c と配線導体パターン20とスル
ーホールH内に充填したスルーホール用導体層21とを焼
結一体化することによって図1に示す絶縁基体1の内部
及び表面にスルーホール導体3によって電気的に接続さ
れている配線導体2を配設した製品としての配線基板が
完成する。
Finally, the laminated body L is fired in a reducing atmosphere at a temperature of about 1600 ° C., and the ceramic green sheets 10a, 10b, 10c, the wiring conductor pattern 20, and the through-hole conductor filled in the through-hole H are filled. A wiring board as a product having wiring conductors 2 electrically connected by through-hole conductors 3 inside and on the surface of the insulating substrate 1 shown in FIG. 1 is completed by sintering and integrating with the layer 21. .

【0029】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能である。
The present invention is not limited to the above-mentioned embodiments, but various modifications can be made without departing from the gist of the present invention.

【0030】[0030]

【発明の効果】本発明の配線基板によれば、絶縁基体の
内部に形成される配線導体の各角部を円弧状となしたこ
とから絶縁基体の内部及び表面に配線導体を一体的に形
成した配線基板を製作する際、絶縁基体と配線導体との
間に両者の熱膨張係数の相違に起因して熱応力が発生し
たとしてもその熱応力は配線導体の各角部に集中するこ
となく配線導体の全体に分散されることとなり、その結
果、配線導体と絶縁基体との間に残留する単位体積当た
りの熱応力は極めて小さく、配線基板に外力や熱衝撃力
が印加されても絶縁基体にクラックが発生することは殆
どなく、これによって配線導体に断線等を招来するのを
有効に防止することができるとともに配線導体を絶縁基
体に強固に被着形成させておくことが可能となる。
According to the wiring board of the present invention, since the corner portions of the wiring conductor formed inside the insulating base are arcuate, the wiring conductor is integrally formed inside and on the surface of the insulating base. When manufacturing a printed wiring board, even if thermal stress occurs due to the difference in thermal expansion coefficient between the insulating base and the wiring conductor, the thermal stress does not concentrate at each corner of the wiring conductor. As a result, the thermal stress per unit volume remaining between the wiring conductor and the insulating base is extremely small, and even if an external force or thermal shock force is applied to the wiring base, the insulating base is dispersed. Almost no cracks are generated on the wiring conductors, which effectively prevents the wiring conductors from being broken or the like, and the wiring conductors can be firmly adhered to the insulating base.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の配線基板の一実施例を示す断面図であ
る。
FIG. 1 is a sectional view showing one embodiment of a wiring board of the present invention.

【図2】図1に示す配線基板の配線導体を説明するため
の要部拡大断面図である。
FIG. 2 is an enlarged sectional view of an essential part for explaining a wiring conductor of the wiring board shown in FIG.

【図3】図1に示す配線基板の製造方法を説明するため
の断面図である。
FIG. 3 is a cross-sectional view for explaining the method of manufacturing the wiring board shown in FIG.

【図4】図1に示す配線基板の製造方法を説明するため
の断面図である。
FIG. 4 is a cross-sectional view for explaining the method of manufacturing the wiring board shown in FIG.

【図5】図1に示す配線基板の製造方法を説明するため
の断面図である。
FIG. 5 is a cross-sectional view for explaining the method of manufacturing the wiring board shown in FIG.

【図6】図1に示す配線基板の製造方法を説明するため
の断面図である。
6 is a cross-sectional view for explaining the method of manufacturing the wiring board shown in FIG.

【符号の説明】[Explanation of symbols]

1・・・・・・絶縁基体 2・・・・・・配線導体 3・・・・・・スルーホール導体 A・・・・・・配線基板 c・・・・・・配線導体の角部 1 ··· Insulating substrate 2 ··· Wiring conductor 3 ··· Through-hole conductor A ··· Wiring board c ··· Corner of wiring conductor

───────────────────────────────────────────────────── フロントページの続き (72)発明者 合原 憲一 鹿児島県国分市山下町1番1号 京セラ株 式会社鹿児島国分工場内 (72)発明者 奥ノ薗 隆志 鹿児島県国分市山下町1番1号 京セラ株 式会社鹿児島国分工場内 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Kenichi Aihara 1-1, Yamashita-cho, Kokubun-shi, Kagoshima Prefecture Kyocera stock company Kagoshima Kokubun factory (72) Inventor Takashi Okunozono 1-1, Yamashita-cho, Kokubun-shi, Kagoshima No. Kyocera Stock Company Kagoshima Kokubu Factory

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】セラミック質焼結体から成る絶縁基体の内
部及び表面に配線導体を一体的に形成して成る配線基板
であって、前記絶縁基体の内部に形成されている配線導
体の各角部が円弧状をなしていることを特徴とする配線
基板。
1. A wiring board in which wiring conductors are integrally formed inside and on the surface of an insulating base body made of a ceramic sintered body, wherein each corner of the wiring conductor is formed inside the insulating base body. A wiring board having a circular arc shape.
【請求項2】前記絶縁基体の内部に形成されている配線
導体の各角部の円弧半径Rが配線導体の厚みをTとした
とき、0.1T≦R≦0.5Tであることを特徴とする
請求項1記載の配線基板。
2. An arc radius R of each corner of a wiring conductor formed inside the insulating substrate is 0.1T ≦ R ≦ 0.5T, where T is the thickness of the wiring conductor. The wiring board according to claim 1.
JP7168792A 1995-07-04 1995-07-04 Wiring board Pending JPH0923044A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7168792A JPH0923044A (en) 1995-07-04 1995-07-04 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7168792A JPH0923044A (en) 1995-07-04 1995-07-04 Wiring board

Publications (1)

Publication Number Publication Date
JPH0923044A true JPH0923044A (en) 1997-01-21

Family

ID=15874565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7168792A Pending JPH0923044A (en) 1995-07-04 1995-07-04 Wiring board

Country Status (1)

Country Link
JP (1) JPH0923044A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014141492A1 (en) * 2013-03-11 2014-09-18 日本碍子株式会社 Circuit substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014141492A1 (en) * 2013-03-11 2014-09-18 日本碍子株式会社 Circuit substrate

Similar Documents

Publication Publication Date Title
US6631551B1 (en) Method of forming integral passive electrical components on organic circuit board substrates
US5655209A (en) Multilayer ceramic substrates having internal capacitor, and process for producing same
JPH0923044A (en) Wiring board
WO1997030461A1 (en) Resistor network in ball grid array package
JP3258231B2 (en) Ceramic circuit board and method of manufacturing the same
JPH0923045A (en) Wiring board
JP3250937B2 (en) Wiring board
KR100715152B1 (en) Methods of forming metal contact pads on a metal support substrate
JP3176258B2 (en) Multilayer wiring board
JPH09298368A (en) Ceramic wiring board
JP3215007B2 (en) Wiring board
JPH0432297A (en) Multilayer interconnection board and manufacture thereof
JP2001210948A (en) Ceramic circuit board
JP2002252444A (en) Gang-molded wiring board
JP3080491B2 (en) Wiring pattern
JP2975491B2 (en) Chip resistor
JPH08316638A (en) Multilayer wiring board
JP2515165B2 (en) Method for manufacturing multilayer wiring board
JPH0677660A (en) Ceramic circuit board provided with resistor
JP2004140312A (en) Wiring board
JP2763470B2 (en) Wiring board
JPH1098244A (en) Thick-film circuit board and its manufacture
JP3457247B2 (en) Ceramic circuit board
JPH0653354A (en) Circuit board
JPS5917294A (en) Composite laminated ceramic part and method of producing same

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313117

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 8

Free format text: PAYMENT UNTIL: 20080225

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 9

Free format text: PAYMENT UNTIL: 20090225

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 9

Free format text: PAYMENT UNTIL: 20090225

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100225

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100225

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110225

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120225

Year of fee payment: 12

LAPS Cancellation because of no payment of annual fees