JPH09136378A - Copper thin film board and printed wiring board - Google Patents
Copper thin film board and printed wiring boardInfo
- Publication number
- JPH09136378A JPH09136378A JP29514295A JP29514295A JPH09136378A JP H09136378 A JPH09136378 A JP H09136378A JP 29514295 A JP29514295 A JP 29514295A JP 29514295 A JP29514295 A JP 29514295A JP H09136378 A JPH09136378 A JP H09136378A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- copper
- thin film
- copper thin
- film substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Laminated Bodies (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、微細な回路(通
常、導体幅50μm以下、導体間50μm以下を言う)
を有するプリント配線板あるいは半導体分野で使用する
電子部品のデバイス、センサー等を製造するのに用いら
れる銅薄膜基板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fine circuit (usually a conductor width of 50 .mu.m or less and a conductor interval of 50 .mu.m or less).
The present invention relates to a copper thin film substrate used for manufacturing a printed wiring board having the above or a device, a sensor, etc. of an electronic component used in the semiconductor field.
【0002】[0002]
【従来の技術】従来、プリント配線板の製造に用いられ
る銅張積層板は、有機物の接着剤を介して、耐熱性高分
子フィルムと銅箔を積層する方法あるいは銅箔面上に耐
熱性高分子樹脂溶液をコートし、乾燥してフィルム状の
膜を形成する方法により製造されている。耐熱性高分子
フィルム及び銅箔の厚さは、通常、耐熱性高分子フィル
ムについては、12.5、25、50、75、125μ
mであり、銅箔については、18、35μmが使用され
ている。一方、近年の高密度化及び高性能化に伴う微細
な回路形成に必要な銅張積層板は、有機物の接着剤層を
有せず且つ可能な限り薄い銅層を有する銅薄膜基板が要
求されている。従来の銅薄膜基板は、真空蒸着法、スパ
ッタリング法、イオンプレーティング法、無電解めっき
法等により、耐熱性絶縁基材に銅の薄膜層を形成する事
によって製造されているが、種々の問題があり、微細な
回路を有するプリント配線板の製造に適するものではな
い。2. Description of the Related Art Conventionally, a copper clad laminate used for manufacturing a printed wiring board is manufactured by a method of laminating a heat resistant polymer film and a copper foil via an adhesive of an organic substance or a high heat resistance on a copper foil surface. It is manufactured by a method in which a molecular resin solution is coated and dried to form a film-like film. The thickness of the heat resistant polymer film and the copper foil is usually 12.5, 25, 50, 75, 125μ for the heat resistant polymer film.
m, and for copper foil, 18, 35 μm is used. On the other hand, copper clad laminates required for fine circuit formation in recent years due to higher density and higher performance require a copper thin film substrate that does not have an organic adhesive layer and has a thin copper layer as much as possible. ing. Conventional copper thin film substrates are manufactured by forming a copper thin film layer on a heat-resistant insulating base material by a vacuum deposition method, a sputtering method, an ion plating method, an electroless plating method, etc. However, it is not suitable for manufacturing a printed wiring board having a fine circuit.
【0003】[0003]
【発明が解決しようとする課題】近年の高密度化及び高
性能化に伴う回路形成は、益々微細化の傾向が強くなっ
ている。サブトラクティブ法によりプリント配線板を製
造するうえで、従来の銅張積層板では、回路形成の微細
化に限界がある。この原因は、銅張積層板に使用してい
る銅箔厚が18μm以上が一般的で、18μm以上の銅
箔厚では微細な回路形成は不可能な為である。微細な回
路形成を実現する為の必要な条件の一つは、可能な限り
薄い銅層を有する銅薄膜基板を使用する事である。従来
の銅薄膜基板は、真空蒸着法、スパッタリング法、イオ
ンプレーティング法、無電解めっき法等により製造され
ているもので、銅厚は、通常、1μm以下で、微細回路
の形成には適しているが、これらの銅薄膜基板は、いず
れも接着強度が弱く、ピンホールが多い為、微細回路形
成用基板としての実用性には乏しい。With the recent trend toward higher density and higher performance, circuit formation has become more and more miniaturized. In producing a printed wiring board by the subtractive method, the conventional copper clad laminate has a limit to miniaturization of circuit formation. This is because the copper foil thickness used in the copper-clad laminate is generally 18 μm or more, and a copper foil thickness of 18 μm or more cannot form a fine circuit. One of the necessary conditions for realizing fine circuit formation is to use a copper thin film substrate having a copper layer as thin as possible. The conventional copper thin film substrate is manufactured by a vacuum vapor deposition method, a sputtering method, an ion plating method, an electroless plating method, etc., and the copper thickness is usually 1 μm or less, which is suitable for forming a fine circuit. However, these copper thin film substrates are weak in adhesive strength and have many pinholes, so that they are not practical as substrates for forming fine circuits.
【0004】従来から接着強度向上の為に種々の方法が
提案されているが、未だ実用性を満足する接着強度を有
するものはない。又、ピンホールを無くする為に銅層を
厚くする方法は経済的には実用性に乏しい。更に、これ
らの銅薄膜基板でプリント配線板を製造するには、銅層
があまりにも薄すぎる為、回路形成の加工面の困難さ及
び実用面での電気特性的な制限等により実用性に乏し
い。本発明は、これらの問題点に鑑みてなされたもので
あり、微細回路を形成するに必要な銅の薄膜層を有する
銅薄膜基板の提供を目的とするものである。Conventionally, various methods have been proposed in order to improve the adhesive strength, but none have an adhesive strength satisfying the practical use. Further, the method of thickening the copper layer to eliminate pinholes is economically impractical. Furthermore, in order to manufacture a printed wiring board using these copper thin film substrates, the copper layer is too thin, and therefore it is not practical due to the difficulty of processing the circuit formation and the limitation of electrical characteristics in practical use. . The present invention has been made in view of these problems, and an object of the present invention is to provide a copper thin film substrate having a copper thin film layer necessary for forming a fine circuit.
【0005】[0005]
【課題を解決するための手段】本発明の銅薄膜基板は、
回路形成に充分な接着強度を有し、且つ、ピンホールが
皆無なもので、サブトラクティブ法のプリント配線板製
造技術でも微細な回路形成が容易に可能である任意の厚
さの銅薄膜層を有するものである。The copper thin film substrate of the present invention comprises:
A copper thin film layer of any thickness that has sufficient adhesive strength for circuit formation and has no pinholes, and can easily form fine circuits even with the printed wiring board manufacturing technology of the subtractive method. I have.
【0006】即ち、本発明は、(1)耐熱性絶縁基材の
片面に、第一層としてスパッタリング法で長尺連続形成
した銅薄膜層と、該銅薄膜層上に第二層として電気めっ
き法で長尺連続形成した銅厚層とから成る銅薄膜基板、
(2)耐熱性絶縁基材の両面に、第一層としてスパッタ
リング法で長尺連続形成した銅薄膜層と、それぞれ該銅
薄膜層上に第二層として電気めっき法で長尺連続形成し
た銅厚層とから成る銅薄膜基板、(3)スパッタリング
法で長尺連続形成する第一層の銅薄膜層の銅厚は、1μ
m以下である(1)又は(2)の銅薄膜基板、(4)第
二層の電気めっき法で長尺連続形成する銅厚層は、1μ
m以上18μm以下である(1)又は(2)の銅薄膜基
板、(5)耐熱性絶縁基材が、各種のポリイミドフィル
ムである(1)又は(2)の銅薄膜基板、(6)(1)
〜(5)のいずれかの銅薄膜基板を使用して回路形成し
製造される微細な回路を有するプリント配線板に関する
ものである。That is, the present invention includes (1) a copper thin film layer continuously formed by a sputtering method as a first layer on one surface of a heat resistant insulating substrate, and electroplating as a second layer on the copper thin film layer. Copper thin film substrate consisting of a copper thick layer continuously formed by the method,
(2) A copper thin film layer continuously formed by a sputtering method as a first layer on both surfaces of a heat-resistant insulating base material, and a copper continuously formed by an electroplating method as a second layer on each of the copper thin film layers. A copper thin film substrate consisting of a thick layer, (3) the copper thickness of the first copper thin film layer continuously formed by the sputtering method is 1 μm
The copper thin film substrate of (1) or (2) having a thickness of m or less, and (4) the copper thick layer continuously formed by electroplating the second layer has a thickness of 1 μm.
The copper thin film substrate of (1) or (2) having a thickness of m or more and 18 μm or less, (5) the copper thin film substrate of (1) or (2), wherein the heat-resistant insulating base material is various polyimide films, (6) ( 1)
The present invention relates to a printed wiring board having a fine circuit manufactured by forming a circuit using the copper thin film substrate according to any one of (5) to (5).
【0007】[0007]
【発明の実施の形態】本発明における「長尺連続形成」
とは、ロール状になっているポリイミドフィルムの如き
耐熱性絶縁基材をロールトゥロール方式、即ち連続的に
繰り出しながら、銅層を連続的に形成し、それを連続的
に巻き取り、ロール状の銅薄膜基板が得られるような工
程を言う。BEST MODE FOR CARRYING OUT THE INVENTION "Long continuous formation" in the present invention
Is a roll-to-roll method, that is, a copper layer is continuously formed while continuously feeding a heat-resistant insulating base material such as a polyimide film in a roll shape, which is continuously wound and rolled. Of the copper thin film substrate is obtained.
【0008】本発明の銅薄膜基板の第一層の銅薄膜層の
形成方法は、連続スパッタリング法によるもので、銅厚
は、1μm以下で、好ましくは、0.1μmから0.6
μmで、更に好ましくは、0.25μmから0.3μm
である。上記銅厚では、ピンホールが皆無に等しく、第
二層の銅層との接着力が充分満足できるものである。The method of forming the first copper thin film layer of the copper thin film substrate of the present invention is a continuous sputtering method, and the copper thickness is 1 μm or less, preferably 0.1 μm to 0.6 μm.
μm, more preferably 0.25 μm to 0.3 μm
It is. With the above-mentioned copper thickness, pinholes are almost completely absent, and the adhesive strength to the second copper layer is sufficiently satisfied.
【0009】スパッタリング法による銅薄膜層の形成方
法は、種々あるが、特に限定される条件はない。形成す
べき薄膜に対応させて適宜ターゲットを選択して用いる
ことは当業者の理解するところである。スパッタリング
の方式にも限定される条件はなく、DCマグネトロンス
パッタリング、高周波マグネトロンスパッタリング、イ
オンビームスパッタリング等の方式が有効に用いられ
る。There are various methods for forming the copper thin film layer by the sputtering method, but there is no particular limitation. It is understood by those skilled in the art that a target is appropriately selected and used according to the thin film to be formed. The sputtering method is also not limited, and methods such as DC magnetron sputtering, high frequency magnetron sputtering, and ion beam sputtering are effectively used.
【0010】本発明においては、耐熱性絶縁基材と第一
層の銅薄膜層との間に、スパッタリング法で下地金属層
を形成させることが密着性の点から好ましい。下地金属
層は、コバルト、ニッケル、クロム、ニクロム、チタ
ン、モリブデン、タングステン、亜鉛、錫、インジウ
ム、インジウム錫、シリコン、モネルメタル等ならびに
これらの酸化物、炭化物、窒化物等が有用である。下地
金属層の厚みは0.03〜0.1μmで充分である。
0.03μm未満では密着性の効果が充分でなく、0.
1μmを超えると導電性の低下、エッチングによる回路
加工性の低下、コストの増加等の問題が顕在化してく
る。In the present invention, it is preferable from the viewpoint of adhesion that a base metal layer is formed between the heat resistant insulating base material and the first copper thin film layer by a sputtering method. For the underlying metal layer, cobalt, nickel, chromium, nichrome, titanium, molybdenum, tungsten, zinc, tin, indium, indium tin, silicon, monel metal and the like, and oxides, carbides, nitrides and the like thereof are useful. A thickness of the base metal layer of 0.03 to 0.1 μm is sufficient.
If it is less than 0.03 μm, the effect of the adhesiveness is not sufficient, and
If it exceeds 1 μm, problems such as a decrease in conductivity, a decrease in circuit workability due to etching, and an increase in cost become apparent.
【0011】本発明の銅薄膜基板の第二層の銅厚層の連
続形成方法は、電気めっき法によるもので、銅厚は、1
μm以上18μm以下である。銅厚の設定は、目的とす
る微細な回路形成の種類により選択するが、通常、10
μm以下の銅厚が一般的な傾向である。本方法によれば
経済的にも実用性があるピンホール皆無の銅薄膜基板が
得られる。本発明の銅薄膜基板の第二層の任意の銅厚層
を連続形成する電気めっき法は公知の方法によるもので
ある。The method for continuously forming the second copper thick layer of the copper thin film substrate of the present invention is by electroplating, and the copper thickness is 1
It is not less than μm and not more than 18 μm. The copper thickness is selected according to the type of fine circuit formation desired, but usually 10
A copper thickness of μm or less is a general tendency. According to this method, a copper thin film substrate without pinholes can be obtained which is economically practical. The electroplating method for continuously forming an arbitrary thick copper layer as the second layer of the copper thin film substrate of the present invention is a known method.
【0012】本発明の銅薄膜基板に使用する耐熱性絶縁
基材は、各種ポリイミドフィルムであるが、例えば、カ
プトンフィルム(東レ・デュポン(株)製)、アピカル
フィルム(鐘淵化学工業(株)製)、ユーピレックスフ
ィルム(宇部興産(株)製)等で、厚みは、25、50
μmが実用的である。The heat resistant insulating base material used for the copper thin film substrate of the present invention is various polyimide films, for example, Kapton film (manufactured by Toray DuPont Co., Ltd.), apical film (Kanebuchi Chemical Industry Co., Ltd.). Manufactured by Ube Industries, Ltd., and the thickness is 25, 50.
μm is practical.
【0013】以下に、本発明の銅薄膜基板の製造につい
て記載する。使用目的に適した長尺ポリイミドフィルム
を、スパッタリングする面を銅ターゲット側に位置する
ようにスパッタリング装置の繰り出し部に設置する。規
定のスパッタリング銅厚が形成されるように予め定めら
れた最適な条件下で銅薄膜層を長尺連続形成し、樹脂製
等の管に巻き取り、第一層のスパッタリングによる銅薄
膜層の形成を完了する。次に、該第一層のスパッタリン
グによる銅薄膜層が形成された長尺ポリイミドフィルム
を、第二層の電気めっきによる銅厚層を形成すべく電気
めっき装置の繰り出し部に設置する。規定の銅厚が形成
されるように予め定められた最適な条件下で銅厚層を長
尺連続形成し、樹脂製等の管に巻き取り、第二層の電気
めっきによる銅厚層の形成を完了する。本製造は、第一
層のスパッタリングによる銅薄膜層が形成された長尺ポ
リイミドフィルムをいったん巻き取ることなく、電気メ
ッキ工程へ供給し、第二層の銅厚層の形成を連続工程で
行う事も可能である。上記本発明の銅薄膜基板の製造は
可能な限りクリーンな環境下で進める事と電気めっき液
の管理を厳重に行う事が好ましい。The production of the copper thin film substrate of the present invention will be described below. A long polyimide film suitable for the purpose of use is installed in the feeding part of the sputtering device so that the surface to be sputtered is located on the copper target side. A long thin copper film layer is continuously formed under optimal conditions that are predetermined so that a specified sputtering copper thickness is formed, and the film is wound on a tube made of resin, etc., and the copper thin film layer is formed by sputtering the first layer. To complete. Next, the long polyimide film having the copper thin film layer formed by the sputtering of the first layer is placed in the feeding part of the electroplating apparatus so as to form the thick copper layer by the electroplating of the second layer. Long-term continuous formation of a thick copper layer under optimal conditions that have been specified so that a prescribed copper thickness is formed, and then wound on a tube made of resin, etc., and a copper thick layer is formed by electroplating the second layer. To complete. In this production, a long polyimide film having a copper thin film layer formed by sputtering of the first layer is supplied to the electroplating process without once being wound, and the formation of the second copper thick layer is performed in a continuous process. Is also possible. It is preferable that the production of the copper thin film substrate of the present invention is carried out in the cleanest possible environment and the electroplating solution is strictly controlled.
【0014】本発明の銅薄膜基板のポリイミドフィルム
と銅薄膜層との接着強度及びピンホールの測定を以下に
記載する。接着強度の測定は、長尺の銅薄膜基板の両端
からサンプリングしたものにつき、IPC−TM−65
0−2.4.9に準じて行う。一方、ピンホールの測定
は、接着強度と同様にサンプリングしたものにつきライ
トテーブル上で下向からの光の通過を観察する。The measurement of the adhesive strength and the pinhole between the polyimide film and the copper thin film layer of the copper thin film substrate of the present invention will be described below. The adhesive strength was measured by sampling IPC-TM-65 from both ends of a long copper thin film substrate.
It is carried out according to 0-2.4.9. On the other hand, the pinhole is measured by observing the passage of light from the downward direction on the light table for the sampled sample as well as the adhesive strength.
【0015】次に、本発明の銅薄膜基板を用いて、サブ
トラクティブ法により微細な回路を有するプリント配線
板の製造を以下に記載する。先ず、必要に応じて銅面を
前処理した銅薄膜基板の銅面に液状フォトエッチングレ
ジストインクを全面塗布するか、あるいはドライフィル
ムを全面に貼り付け、所望の回路パターンを有するフォ
トマスクを紫外線等の活性光線を通す事によってレジス
ト材を露光し、現像して所望の回路パターンを形成す
る。しかる後に、塩化第二鉄、塩化第二銅、過硫酸塩
類、アルカリエッチャント等のエッチング液により、回
路パターン以外の銅面を溶解除去し、所望の微細回路を
有するプリント配線板を得るのである。Next, the production of a printed wiring board having a fine circuit by the subtractive method using the copper thin film substrate of the present invention will be described below. First, if necessary, apply a liquid photoetching resist ink to the entire surface of the copper thin film substrate whose copper surface has been pretreated, or attach a dry film to the entire surface, and apply a photomask having a desired circuit pattern to ultraviolet rays or the like. The resist material is exposed to light by passing through the actinic rays of 1 and developed to form a desired circuit pattern. Thereafter, the copper surface other than the circuit pattern is dissolved and removed with an etching solution such as ferric chloride, cupric chloride, persulfates, and alkaline etchant to obtain a printed wiring board having a desired fine circuit.
【0016】[0016]
【実施例】以下に本発明の実施例を具体的に説明する。 〔実施例1〕長尺のポリイミドフィルム、カプトンV
25μm(東レ・デュポン(株)製)の片面に連続スパ
ッタリングにて0.25μmの第一層の銅薄膜層を形成
し、次に電気めっきで5μmの第二層の銅厚層を連続形
成して所望の銅薄膜基板を得た。この銅薄膜基板の接着
強度は1.2kg/cm2 であり、且つ、ピンホールは
皆無であった。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below. [Example 1] Long polyimide film, Kapton V
A 25 μm (Toray DuPont Co., Ltd.) single-sided copper thin film layer of 0.25 μm is formed on one side by continuous sputtering, and then a 5 μm thick second copper layer is continuously formed by electroplating. Thus, a desired copper thin film substrate was obtained. The adhesive strength of this copper thin film substrate was 1.2 kg / cm 2 , and there were no pinholes.
【0017】次に、この銅薄膜基板の銅面に液状フォト
エッチングレジストインクをロールコーターで全面塗布
し、乾燥して液状フォトエッチングレジストインクの被
膜を形成した。次に所望の微細回路を有するフォトマス
クを介して回路パターン部分を露光し、回路被膜を形成
し、現像して所望の回路パターンを得た。しかる後、塩
化第二鉄でエッチングし、回路パターン以外の銅面を溶
解除去し、回路パターン上の液状フォトエッチングレジ
ストインク被膜を除去して所望の微細回路を有するプリ
ント配線板を得た。得られたプリント配線板の導体幅
(L)及び導体間(S)は、L/S=5/15μmの微
細回路であった。Next, the liquid photo-etching resist ink was applied over the entire surface of the copper thin film substrate by a roll coater and dried to form a film of the liquid photo-etching resist ink. Next, the circuit pattern portion was exposed through a photomask having a desired fine circuit, a circuit film was formed and developed to obtain a desired circuit pattern. Then, it was etched with ferric chloride to dissolve and remove the copper surface other than the circuit pattern, and the liquid photoetching resist ink film on the circuit pattern was removed to obtain a printed wiring board having a desired fine circuit. The conductor width (L) and the conductor gap (S) of the obtained printed wiring board were a fine circuit with L / S = 5/15 μm.
【0018】〔実施例2〕長尺のポリイミドフィルム、
アピカルNPI 25μm(鐘淵化学工業(株)製)の
両面に連続スパッタリングにて0.25μmの第一層の
銅薄膜層を形成し、次に電気めっきで8μmの第二層の
銅厚層を連続形成して所望の銅薄膜基板を得た。この銅
薄膜基板の接着強度は両面共1.5kg/cm2 であ
り、且つ、ピンホールは皆無であった。また、実施例1
と同様な方法で得られたプリント配線板の所望の微細回
路は、L/S=25/25μmであった。Example 2 A long polyimide film,
A first copper thin film layer of 0.25 μm was formed by continuous sputtering on both sides of Apical NPI 25 μm (manufactured by Kanegafuchi Chemical Co., Ltd.), and then a second copper thick layer of 8 μm was formed by electroplating. It was continuously formed to obtain a desired copper thin film substrate. The adhesive strength of this copper thin film substrate was 1.5 kg / cm 2 on both sides, and there were no pinholes. In addition, Example 1
The desired fine circuit of the printed wiring board obtained by the same method as in (1) had L / S = 25/25 μm.
【0019】〔実施例3〕長尺のポリイミドフィルム、
ユーピレックスS 50μm(宇部興産(株)製)の片
面に連続スパッタリングにて0.25μmの第一層の銅
薄膜層を形成し、次に電気めっきで8μmの第二層の銅
厚層を連続形成して所望の銅薄膜基板を得た。この銅薄
膜基板の接着強度は1.4kg/cm2 であり、且つ、
ピンホールは皆無であった。また、実施例1と同様な方
法で得られたプリント配線板の所望の微細回路は、L/
S=25/25μmであった。Example 3 A long polyimide film,
Upilex S 50 μm (manufactured by Ube Industries, Ltd.) is continuously sputtered to form a 0.25 μm first copper thin film layer on one side, and then electroplated to continuously form a 8 μm second copper thick layer. Then, a desired copper thin film substrate was obtained. The adhesive strength of this copper thin film substrate is 1.4 kg / cm 2 , and
There were no pinholes. Further, the desired fine circuit of the printed wiring board obtained by the same method as in Example 1 is L /
S = 25/25 μm.
【0020】[0020]
【発明の効果】本発明の銅薄膜基板を使用して、プリン
ト配線板を製造するにあたり、微細な回路形成が通常の
サブトラクティブ法でも容易に且つ正確になった。EFFECTS OF THE INVENTION In manufacturing a printed wiring board using the copper thin film substrate of the present invention, fine circuit formation can be easily and accurately performed even by a normal subtractive method.
─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成7年12月13日[Submission date] December 13, 1995
【手続補正1】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】0016[Correction target item name] 0016
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【0016】[0016]
【実施例】以下に本発明の実施例を具体的に説明する。 〔実施例1〕長尺のポリイミドフィルム、カプトンV
25μm(東レ・デュポン(株)製)の片面に連続スパ
ッタリングにて0.25μmの第一層の銅薄膜層を形成
し、次に電気めっきで5μmの第二層の銅厚層を連続形
成して所望の銅薄膜基板を得た。この銅薄膜基板の接着
強度は1.2kg/cmであり、且つ、ピンホールは皆
無であった。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below. [Example 1] Long polyimide film, Kapton V
A 25 μm (Toray DuPont Co., Ltd.) single-sided copper thin film layer of 0.25 μm is formed on one side by continuous sputtering, and then a 5 μm thick second copper layer is continuously formed by electroplating. Thus, a desired copper thin film substrate was obtained. The adhesive strength of this copper thin film substrate was 1.2 kg / cm , and there were no pinholes.
【手続補正2】[Procedure amendment 2]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】0018[Correction target item name] 0018
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【0018】 〔実施例2〕長尺のポリイミドフィル
ム、アピカルNPI 25μm(鐘淵化学工業(株)
製)の両面に連続スパッタリングにて0.25μmの第
一層の銅薄膜層を形成し、次に電気めっきで8μmの第
二層の銅厚層を連続形成して所望の銅薄膜基板を得た。
この銅薄膜基板の接着強度は両面共1.5kg/cmで
あり、且つ、ピンホールは皆無であった。また、実施例
1と同様な方法で得られたプリント配線板の所望の微細
回路は、L/S=25/25μmであった。Example 2 Long polyimide film, Apical NPI 25 μm (Kanefuchi Chemical Industry Co., Ltd.)
To form a desired copper thin film substrate by continuously forming a first copper thin film layer having a thickness of 0.25 μm on both surfaces and then electroplating a second copper thick layer having a thickness of 8 μm. It was
The adhesive strength of this copper thin film substrate was 1.5 kg / cm on both sides, and there were no pinholes. The desired fine circuit of the printed wiring board obtained by the same method as in Example 1 had L / S = 25/25 μm.
【手続補正3】[Procedure 3]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】0019[Correction target item name] 0019
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【0019】 〔実施例3〕長尺のポリイミドフィル
ム、ユーピレックスS 50μm(宇部興産(株)製)
の片面に連続スパッタリングにて0.25μmの第一層
の銅薄膜層を形成し、次に電気めっきで8μmの第二層
の銅厚層を連続形成して所望の銅薄膜基板を得た。この
銅薄膜基板の接着強度は1.4kg/cmであり、且
つ、ピンホールは皆無であった。また、実施例1と同様
な方法で得られたプリント配線板の所望の微細回路は、
L/S=25/25μmであった。Example 3 Long polyimide film, Upilex S 50 μm (manufactured by Ube Industries, Ltd.)
A first copper thin film layer having a thickness of 0.25 μm was formed on one surface of the substrate by continuous sputtering, and then a second copper thick layer having a thickness of 8 μm was continuously formed by electroplating to obtain a desired copper thin film substrate. The copper thin film substrate had an adhesive strength of 1.4 kg / cm and had no pinholes. Further, a desired fine circuit of the printed wiring board obtained by the same method as in Example 1 is
L / S = 25/25 μm.
Claims (6)
スパッタリング法で長尺連続形成した銅薄膜層と、該銅
薄膜層上に第二層として電気めっき法で長尺連続形成し
た銅厚層とから成る銅薄膜基板。1. A copper thin film layer continuously formed by a sputtering method as a first layer on one surface of a heat resistant insulating substrate, and a long continuous film formed by an electroplating method as a second layer on the copper thin film layer. A copper thin film substrate consisting of a thick copper layer.
スパッタリング法で長尺連続形成した銅薄膜層と、それ
ぞれ該銅薄膜層上に第二層として電気めっき法で長尺連
続形成した銅厚層とから成る銅薄膜基板。2. A copper thin film layer continuously formed by sputtering as a first layer on both surfaces of a heat-resistant insulating substrate, and a continuous long film formed by electroplating as a second layer on each of the copper thin film layers. Copper thin film substrate consisting of a thick copper layer.
一層の銅薄膜層の銅厚が、1μm以下である請求項1又
は2記載の銅薄膜基板。3. The copper thin film substrate according to claim 1, wherein the copper thin film layer of the first layer, which is continuously formed by a sputtering method, has a copper thickness of 1 μm or less.
る銅厚層の銅厚が、1μm以上18μm以下である請求
項1又は2記載の銅薄膜基板。4. The copper thin film substrate according to claim 1, wherein the copper thickness of the copper thick layer continuously formed by electroplating the second layer is 1 μm or more and 18 μm or less.
ィルムである請求項1又は2記載の銅薄膜基板。5. The copper thin film substrate according to claim 1, wherein the heat resistant insulating base material is various polyimide films.
基板を使用して回路形成し製造される微細な回路を有す
るプリント配線板。6. A printed wiring board having a fine circuit manufactured by forming a circuit using the copper thin film substrate according to claim 1. Description:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29514295A JP3570802B2 (en) | 1995-11-14 | 1995-11-14 | Copper thin film substrate and printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29514295A JP3570802B2 (en) | 1995-11-14 | 1995-11-14 | Copper thin film substrate and printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH09136378A true JPH09136378A (en) | 1997-05-27 |
JP3570802B2 JP3570802B2 (en) | 2004-09-29 |
Family
ID=17816827
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29514295A Expired - Fee Related JP3570802B2 (en) | 1995-11-14 | 1995-11-14 | Copper thin film substrate and printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3570802B2 (en) |
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