JPH09120078A - 液晶表示装置 - Google Patents

液晶表示装置

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Publication number
JPH09120078A
JPH09120078A JP27813095A JP27813095A JPH09120078A JP H09120078 A JPH09120078 A JP H09120078A JP 27813095 A JP27813095 A JP 27813095A JP 27813095 A JP27813095 A JP 27813095A JP H09120078 A JPH09120078 A JP H09120078A
Authority
JP
Japan
Prior art keywords
glass substrate
liquid crystal
crystal display
display device
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27813095A
Other languages
English (en)
Inventor
Umimoto Morita
海幹 森田
Takao Minami
隆郎 南
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP27813095A priority Critical patent/JPH09120078A/ja
Publication of JPH09120078A publication Critical patent/JPH09120078A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
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    • H01L2223/5442Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061Disposition
    • H01L2224/0612Layout
    • H01L2224/0615Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/06153Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry with a staggered arrangement, e.g. depopulated array
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
    • H01L2224/49431Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
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    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】 【課題】駆動ICのワイヤーボンデイング性能を増大さ
せ、高い信頼性を得るとともに、小型・軽量化および低
コスト化を達成した液晶表示装置。 【解決手段】下ガラス基板3に液晶を介して上ガラス基
板2を貼り合わせて表示領域4を設け、下ガラス基板3
の非表示領域9の貼り合わせ面上に駆動IC8a、8b
を配するとともに、その非貼り合わせ面上に配線基板5
a、5bを固定し、駆動IC8a、8bの端子と配線基
板5a、5bの端子とをワイヤーボンデイング12によ
り導電せしめた液晶表示装置14。

Description

【発明の詳細な説明】
【0001】
【発明の属する技術分野】本発明は液晶表示装置に関す
るものである。
【0002】
【従来の技術】従来の液晶表示装置1を図4〜図6に示
すと、図4はその平面図、図5および図6はそれぞれ図
4に示すA領域の拡大平面図と拡大断面図である。
【0003】液晶表示装置1においては、上ガラス基板
2と下ガラス基板3との間に液晶を封入し、それぞれの
内面には表示電極を相互に直交するように配列して表示
領域4を成し、下ガラス基板3には、それぞれの端面が
対向するようにプリント基板等の配線基板5を並設する
とともに、ステンレス等から成る金属プレート6の上に
下ガラス基板3と配線基板5とを接着用樹脂7により固
定している。また、駆動IC8が配線基板5と下ガラス
基板3の上に配列され、表示領域4の表示電極は下ガラ
ス基板3の非表示領域9に設けた出力側配線10と接続
され、更に配線基板5上にはボンデイングパッド11も
形成されている。そして、駆動IC8の端子は出力側配
線10(出力側配線10の一部がボンデイングパッドを
成している)およびボンデイングパッド11の各端子と
ワイヤーボンデイング12でもって接続されている。ま
た、13はIC搭載用もしくはIC端子へのワイヤーボ
ンデイング用の座標認識用マーカーである。
【0004】
【発明が解決しようとする課題】しかしながら、上記構
成の液晶表示装置1においては、配線基板5の平坦性が
劣っているので、配線基板5が金属プレート6から剥が
れたり、あるいは駆動IC8が配線基板5から剥がれ、
これによってワイヤーボンデイング12が断線するとい
う問題点がある。
【0005】また、下ガラス基板3や配線基板5は、双
方ともそれ以上に大きな寸法のマスターガラスやマスタ
ーガラエポ基板から切り出して供しているが、その切り
出しに当たって、所望通りのカット精度が得られないの
で、下ガラス基板3と配線基板5との端面同士の間隔を
0.1mm位にしている。
【0006】したがって、このような間隔が生じること
によって、装置の小型化を更にむずかしくしている。
【0007】しかも、薄くて小さいステンレス等から成
る金属プレート6の上に厚みのある大きな下ガラス基板
3と配線基板5とを接着用樹脂7により支持しているの
で、そのための固定が十分ではなく、過酷な環境下にお
かれると、歪みが生じるという問題点もある。
【0008】更にまた、液晶表示装置1には、配線基板
5の他に金属プレート6も設けているので、その金属自
体の重さによって軽量化をむずかしくしており、未だ満
足し得る程度の軽量化にいたっていないという問題点も
ある。
【0009】したがって本発明の目的は叙上の問題点を
解決して、駆動ICのワイヤーボンデイング性能を増大
させ、高い信頼性を得るとともに、小型・軽量化および
低コスト化を達成した液晶表示装置を提供することにあ
る。
【0010】
【課題を解決するための手段】本発明の液晶表示装置
は、大きな主面を有する一方のガラス基板に液晶を介し
て小さな主面を有する他方のガラス基板を貼り合わせて
表示領域を設け、一方のガラス基板の非表示領域の貼り
合わせ面上に駆動ICを配するとともに、その非貼り合
わせ面上に配線基板を固定し、駆動ICの端子と配線基
板の端子とをワイヤーボンデイングにより導電せしめた
ことを特徴とする。
【0011】
【発明の実施の形態】本発明の液晶表示装置14を図1
〜図3に示すと、図1はその平面図、図2は図1に示す
B領域の拡大平面図であり、図3はその拡大断面図であ
る。なお、従来の液晶表示装置1と同一部材には同一符
号を付す。
【0012】液晶表示装置14においては、コモン側の
ガラス基板である上ガラス基板2とセグメント側のガラ
ス基板である下ガラス基板3との間に封止剤(図示せ
ず)によって液晶(図示せず)を封入し、更に両ガラス
基板2、3を貼り合わせている。そして、上下ガラス基
板2、3のそれぞれの内面には表示電極と配向膜(共に
図示せず)を相互に直交するように配列して表示領域4
を成し、下ガラス基板3には表示領域4に対応して非表
示領域9も設けられている。
【0013】また、下ガラス基板3の貼り合わせ面の非
表示領域9上には駆動IC8a、8bをエポキシ・シリ
コンの接着樹脂から成る接着層15を介して固定してい
る。この固定部位は非表示領域9の端にする方が、非表
示領域9の幅が小さくなり、小型化を優位に達成するこ
とができる。
【0014】更にまた、下ガラス基板3の非貼り合わせ
面(外側面)の非表示領域9上にプリント基板等の配線
基板5a、5bを接着樹脂層16を介して設けている。
この接着樹脂層16はテープ(たとえば日東電工(株)
製No.3161−F〔黒色片面テープ〕とNo.59
15〔両面テープ〕)でもって貼り付け固定したもので
ある。
【0015】上記配線基板5a、5bは、たとえば基板
内部に1種もしくは2種以上の配線層が形成できる多層
配線構造および/または両主面上に配線層を形成した構
造であって、駆動IC8a、8bの駆動に必要な電源や
信号線を擁したバスライン群を配線している。更に必要
に応じて電源、ロジック等の各系を層別に配線したり、
あるいは外部から供給される各種電源や信号の処理回路
を搭載してもよい。
【0016】そして、この配線基板5a、5bはワイヤ
ボンデイングパッド17が設けられ、表示領域4の表示
電極は下ガラス基板3の非表示領域9に設けた出力側配
線10と接続しているので、駆動IC8a、8bの端子
は出力側配線10のボンデイングパッド端子およびワイ
ヤボンデイングパッド17とをAu線でもってワイヤー
ボンデイング12により接続されている。
【0017】かくして上記液晶表示装置14によれば、
平坦性に劣る配線基板5a、5bの上ではなくて、それ
に優れた下ガラス基板3上に駆動IC8a、8bを接着
固定しているので、これら駆動IC8a、8bが剥がれ
なくなる。
【0018】また、従来の液晶表示装置1にて用いた金
属プレート6ならびに下ガラス基板3と配線基板5との
端面同士の間隔などを不要し、更に配線基板5a、5b
を下ガラス基板3の非表示領域9に設けているので、装
置の小型化、軽量化ならびに低コスト化が達成できると
ともに、歪みが生じないように配線基板5a、5bを強
固に接合することができる。
【0019】なお、本発明は上記実施形態例に限定され
るものではなく、本発明の要旨を逸脱しない範囲内で種
々の変更や改良等は何ら差し支えない。
【0020】
【発明の効果】以上のように、本発明の液晶表示装置に
よれば、駆動ICをガラス基板上に強固に接着して、更
に金属プレートを不要し、そして、配線基板を非表示領
域の外側に設けているので、駆動ICのワイヤーボンデ
イング性能を増大させ、高い信頼性を得るとともに、小
型・軽量化および低コスト化を達成できる。
【図面の簡単な説明】
【図1】本発明の液晶表示装置の平面図である。
【図2】本発明の液晶表示装置の要部拡大図である。
【図3】本発明の液晶表示装置の要部拡大断面図であ
る。
【図4】従来の液晶表示装置の平面図である。
【図5】従来の液晶表示装置の要部拡大図である。
【図6】従来の液晶表示装置の要部拡大断面図である。
【符合の説明】
1、14 液晶表示装置 2 上ガラス基板 3 下ガラス基板 4 表示領域 5、5a、5b 配線基板 8、8a、8b 駆動IC 9 非表示領域 12 ワイヤーボンデイング

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】 大きな主面を有する一方のガラス基板に
    液晶を介して小さな主面を有する他方のガラス基板を貼
    り合わせて表示領域を設け、一方のガラス基板の非表示
    領域の貼り合わせ面上に駆動ICを配するとともに、そ
    の非貼り合わせ面上に配線基板を固定し、駆動ICの端
    子と配線基板の端子とをワイヤーボンデイングにより導
    電せしめた液晶表示装置。
JP27813095A 1995-10-25 1995-10-25 液晶表示装置 Pending JPH09120078A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27813095A JPH09120078A (ja) 1995-10-25 1995-10-25 液晶表示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27813095A JPH09120078A (ja) 1995-10-25 1995-10-25 液晶表示装置

Publications (1)

Publication Number Publication Date
JPH09120078A true JPH09120078A (ja) 1997-05-06

Family

ID=17593024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27813095A Pending JPH09120078A (ja) 1995-10-25 1995-10-25 液晶表示装置

Country Status (1)

Country Link
JP (1) JPH09120078A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002021199A1 (fr) * 2000-09-08 2002-03-14 Citizen Watch Co., Ltd. Affichage a cristaux liquides
CN100428030C (zh) * 2004-11-09 2008-10-22 三星电子株式会社 液晶显示器驱动集成电路芯片及封装结构

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002021199A1 (fr) * 2000-09-08 2002-03-14 Citizen Watch Co., Ltd. Affichage a cristaux liquides
CN100428030C (zh) * 2004-11-09 2008-10-22 三星电子株式会社 液晶显示器驱动集成电路芯片及封装结构

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