JPH09102560A - External lead pin joining structure for low-temperature baked ceramic substrate - Google Patents
External lead pin joining structure for low-temperature baked ceramic substrateInfo
- Publication number
- JPH09102560A JPH09102560A JP25836795A JP25836795A JPH09102560A JP H09102560 A JPH09102560 A JP H09102560A JP 25836795 A JP25836795 A JP 25836795A JP 25836795 A JP25836795 A JP 25836795A JP H09102560 A JPH09102560 A JP H09102560A
- Authority
- JP
- Japan
- Prior art keywords
- pin
- ceramic substrate
- external lead
- low temperature
- fired ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、低温焼成セラミッ
ク基板に外部リードピンを立てて接合した低温焼成セラ
ミック基板の外部リードピン接合構造に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an external lead pin bonding structure for a low temperature fired ceramic substrate in which external lead pins are erected and joined to a low temperature fired ceramic substrate.
【０００２】[0002]
【従来の技術】従来より、セラミック基板として最も多
く用いられているアルミナ基板は、誘電率が高く、しか
も、１５００℃以上の高温で焼成する必要があるため、
配線導体材料としてＭｏ，Ｗ等のシート抵抗値の高い高
融点金属を使用せざるを得ない。このため、近年の信号
処理の高速化の要求に対して、アルミナ基板ではパッケ
ージ設計が困難になりつつある。2. Description of the Related Art Conventionally, the most widely used ceramic substrate is an alumina substrate, which has a high dielectric constant and needs to be fired at a high temperature of 1500 ° C. or higher.
As the wiring conductor material, there is no choice but to use a high melting point metal such as Mo or W having a high sheet resistance value. Therefore, in response to the recent demand for high-speed signal processing, it is becoming difficult to design a package on an alumina substrate.
【０００３】このような事情から、近年、Ａｇ、Ａｇ−
Ｐｄ、Ａｕ、Ｃｕなどの低抵抗導体の使用が可能で誘電
率が低い低温焼成セラミック基板の需要が急速に増大し
ている。Under these circumstances, in recent years, Ag and Ag-
The demand for low-temperature fired ceramic substrates that can use low-resistance conductors such as Pd, Au, and Cu and have a low dielectric constant is rapidly increasing.
【０００４】[0004]
【発明が解決しようとする課題】上述したように、低温
焼成セラミック基板は電気的特性が優れている反面、低
温焼成セラミック基板裏面に外部リードピンを立ててＰ
ＧＡ（Pin Grid Array)型のパッケージを作ろうとして
も、必要なピン立て強度を確保できない。この理由は、
低温焼成セラミック基板はアルミナ基板と比較して材
料強度が弱いこと、アルミナ基板のピン接合材料とし
て用いられている接合強度の強い金属系ろう材（Ａｇ−
Ｃｕ）の下記の１〜３の特性による。As described above, the low temperature fired ceramic substrate has excellent electrical characteristics, but on the other hand, the external lead pins are erected on the back surface of the low temperature fired ceramic substrate to form P.
Even if an attempt is made to create a GA (Pin Grid Array) type package, the required pin stand strength cannot be secured. The reason for this is
The low-temperature fired ceramic substrate has a weaker material strength than the alumina substrate, and a metal brazing material (Ag-
According to the following characteristics 1 to 3 of Cu).
【０００５】１．低温焼成セラミック基板よりも熱膨張
係数がかなり大きい（低温焼成セラミックの２〜５
倍）。 ２．ろう材の融点が高いため（共晶：７８０℃）、ろう
付け温度が高い（８００℃以上）。 ３．ろう材が硬く変形しにくい。 上記１、２は、接合時、ろう材／セラミック基板間に大
きな残留応力が発生することを意味し、３は１、２の要
因で発生する残留応力をろう材内部で緩和することが困
難であることを意味する。[0005] 1. The coefficient of thermal expansion is considerably larger than that of the low temperature fired ceramic substrate (2 to 5 of low temperature fired ceramics).
Times). 2. Since the melting point of the brazing material is high (eutectic: 780 ° C), the brazing temperature is high (800 ° C or higher). 3. The brazing material is hard and difficult to deform. The above items 1 and 2 mean that a large residual stress is generated between the brazing material and the ceramic substrate at the time of joining, and 3 is difficult to alleviate the residual stress generated by the factors 1 and 2 inside the brazing material. Means there is.
【０００６】以上のことより、金属系ろう材（Ａｇ−Ｃ
ｕ）で低温焼成セラミック基板にろう付けを行った場
合、Ａｇ−Ｐｄパッドを介して低温焼成セラミック基板
側へ非常に大きな残留応力が伝わる。そのため、パッド
／セラミック界面強度が弱いと、界面剥がれが生じ、セ
ラミック基板強度が弱いとセラミック基板内部でクラッ
クが発生する。従って、ピン接合材料として金属系ろう
材より融点の低い半田を用いて残留応力を小さくする必
要があり、それ故に、従来の低温焼成セラミック基板の
外部リードピンは、基板端縁部に挟み込んで固定するク
リップリードを用いていた。From the above, the metallic brazing material (Ag-C
When the low temperature fired ceramic substrate is brazed in u), a very large residual stress is transmitted to the low temperature fired ceramic substrate side through the Ag-Pd pad. Therefore, if the pad / ceramic interface strength is weak, interface peeling occurs, and if the ceramic substrate strength is weak, cracks occur inside the ceramic substrate. Therefore, it is necessary to reduce the residual stress by using a solder having a melting point lower than that of the metal brazing material as the pin bonding material, and therefore, the external lead pins of the conventional low temperature fired ceramic substrate are sandwiched and fixed to the edge of the substrate. I used a clip lead.
【０００７】ところが、この半田は、 １．熱膨張率がセラミックの３〜６倍だが、 ２．ろう材融点が非常に低い（高温半田で３００℃）、 ３．ろう材が非常に柔らかく、変形しやすい、という性
質がある。このため、半田は材料強度が弱く、１０ｋｇ
ｆ以上のピン接合強度を確保することが困難である。し
かも、温度サイクル信頼性試験においても、半田表面に
クラックが入り、強度低下が起こる。However, this solder is The coefficient of thermal expansion is 3 to 6 times that of ceramics, but 1. Very low melting point of brazing material (300 ℃ for high temperature solder), The brazing material is very soft and easily deformed. Therefore, the material strength of solder is weak, and 10 kg
It is difficult to secure a pin bonding strength of f or more. Moreover, also in the temperature cycle reliability test, the solder surface is cracked and the strength is lowered.
【０００８】そこで、最近になって、特開平７−９４６
２０号公報に示すように、外部リードピンの半田付け部
を接着強度の強いエポキシ樹脂で覆うようにセラミック
基板表面にエポキシ樹脂を展着して補強することが提案
されている。Therefore, recently, Japanese Patent Laid-Open No. 7-946 has been proposed.
As disclosed in Japanese Unexamined Patent Application Publication No. 20, it has been proposed to spread and reinforce the epoxy resin on the surface of the ceramic substrate so that the soldered portion of the external lead pin is covered with the epoxy resin having high adhesive strength.
【０００９】しかし、最近のＰＧＡ型パッケージは益々
高密度化・多ピン化が進み、外部リードピンも非常に狭
ピッチ化される傾向にある。このため、外部リードピン
１本当りのエポキシ樹脂／セラミック基板の接着面積が
益々小さくなる傾向にあり、例えば３ｍｍ2 程度にもな
ってしまう場合がある。そのため、高温高湿にさらす
と、樹脂接着強度が低下し、パッケージエッジ部に配置
する外部リードピンの接合部においては樹脂／セラミッ
ク間の界面剥がれが生じ、ピン接合強度の信頼性に欠け
る。例えば、外部リードピン１本当りの接着面積が３ｍ
ｍ2 、エポキシ樹脂の接着強度が３ｋｇｆ／ｍｍ2 であ
れば、外部リードピン１本当りの接合強度が３×３＝９
ｋｇｆとなり、必要とされるピン接合強度（全ピン１０
ｋｇｆ以上）を確保することができない。However, the recent PGA type packages have become more dense and have more pins, and the external lead pins also tend to have a very narrow pitch. For this reason, the adhesive area of the epoxy resin / ceramic substrate per external lead pin tends to become smaller and smaller, and for example, it may become about 3 mm 2 . Therefore, when exposed to high temperature and high humidity, the resin adhesive strength is reduced, the interface between the resin and ceramic is peeled off at the joint portion of the external lead pin arranged at the package edge portion, and the reliability of the pin joint strength is lacking. For example, the adhesive area per external lead pin is 3m
m 2 and the adhesive strength of the epoxy resin is 3 kgf / mm 2 , the bonding strength per external lead pin is 3 × 3 = 9.
kgf, and the required pin joint strength (all pins 10
(kgf or more) cannot be secured.
【００１０】本発明はこのような事情を考慮してなされ
たものであり、従ってその目的は、低温焼成セラミック
基板に対するピン接合強度を十分に向上させることがで
き、多ピン化にも十分に対応できる低温焼成セラミック
基板の外部リードピン接合構造を提供することにある。The present invention has been made in view of the above circumstances, and therefore an object thereof is to sufficiently improve the pin bonding strength with respect to a low temperature fired ceramic substrate and to sufficiently cope with the increase in the number of pins. Another object of the present invention is to provide an external lead pin bonding structure for a low temperature fired ceramic substrate.
【００１１】[0011]
【課題を解決するための手段】上記目的を達成するため
に、本発明の請求項１の低温焼成セラミック基板の外部
リードピン接合構造は、低温焼成セラミック基板にピン
接続用凹部が形成され、このピン接続用凹部の底面に形
成されたピン接続用パッドに外部リードピンのネイルヘ
ッドが半田付けされ、前記低温焼成セラミック基板の少
なくとも前記ピン接続用凹部とピン半田付け部との隙間
に接着用樹脂が前記ピン半田付け部を埋め込むように充
填された構成となっている。In order to achieve the above object, the external lead pin bonding structure of the low temperature fired ceramic substrate according to claim 1 of the present invention has a pin connection recess formed in the low temperature fired ceramic substrate. The nail head of the external lead pin is soldered to the pin connection pad formed on the bottom surface of the connection recess, and the adhesive resin is provided in at least a gap between the pin connection recess and the pin soldering portion of the low temperature fired ceramic substrate. The pin soldering portion is filled so as to be embedded.
【００１２】この構成では、低温焼成セラミック基板に
形成されたピン接続用凹部内に接着用樹脂を充填するの
で、ピン接続用凹部の内周面によって接着用樹脂とセラ
ミックとの接着面積が拡大されると共に、ピン接続用凹
部内に充填された接着用樹脂がピン引張時にネイルヘッ
ドを押さえるため、この樹脂曲げ強度によりピン接合強
度≧１０ｋｇｆを確保することができる。In this structure, since the bonding resin is filled in the pin connecting recess formed in the low temperature fired ceramic substrate, the bonding area between the bonding resin and the ceramic is expanded by the inner peripheral surface of the pin connecting recess. In addition, since the adhesive resin filled in the pin connection concave portion presses the nail head when pulling the pin, the resin bending strength can ensure pin joining strength ≧ 10 kgf.
【００１３】更に、請求項２では、補強板に形成された
ピン貫通孔が外部リードピンに挿通された状態で、該補
強板が前記接着用樹脂で低温焼成セラミック基板に接着
され、前記補強板のピン貫通孔内にも前記接着用樹脂が
充填されている構成となっている。Further, according to a second aspect of the present invention, the reinforcing plate is adhered to the low temperature fired ceramic substrate with the adhesive resin while the pin through hole formed in the reinforcing plate is inserted into the external lead pin. The pin through hole is also filled with the adhesive resin.
【００１４】この構成では、補強板による補強効果によ
り低温焼成セラミック基板の表面強度が高められると共
に、補強板のピン貫通孔内にも接着用樹脂を充填するこ
とで接着用樹脂と外部リードピンとの接着面積も更に拡
大され、外部リードピンの接合強度が増大する。In this structure, the surface strength of the low temperature fired ceramic substrate is enhanced by the reinforcing effect of the reinforcing plate, and the adhesive resin and the external lead pin are filled by filling the adhesive resin also into the pin through holes of the reinforcing plate. The bonding area is further expanded, and the bonding strength of the external lead pin is increased.
【００１５】[0015]
【発明の実施の形態】以下、本発明の第１の実施形態を
図１乃至図４に基づいて説明する。まず、外部リードピ
ン接合構造を図１に基づいて説明する。低温焼成セラミ
ック基板１１は、複数枚のグリーンシートを積層して１
０００℃以下で低温焼成したものである。この低温焼成
セラミック基板１１に用いるセラミック材料としては、
１０００℃以下で焼成できる低温焼成セラミック材料で
あれば良く、例えば、ＣａＯ−ＳｉＯ2 −Ａｌ2 Ｏ3 −
Ｂ2 Ｏ3 系ガラスとＡｌ2 Ｏ3 よりなる系、ＭｇＯ−Ｓ
ｉＯ2 −Ａｌ2 Ｏ3 −Ｂ2 Ｏ3 系ガラスとＡｌ2 Ｏ3 よ
りなる系、ＰｂＯ−ＳｉＯ2 −Ｂ2 Ｏ3 系ガラスとＡｌ
2 Ｏ3 よりなる系、或はＳｉＯ2 −Ｂ2 Ｏ3系ガラスと
Ａｌ2 Ｏ3 よりなる系、結晶化ガラスよりなる系などが
ある。この中で最も好ましいのは、ＣａＯ−ＳｉＯ2 −
Ａｌ2 Ｏ3 −Ｂ2 Ｏ3 系ガラス粉末とＡｌ2 Ｏ3 粉末と
の混合物から成る低温焼成セラミック材料であり、その
好ましい組成は、ＣａＯ１０〜５５重量％、ＳｉＯ2 ４
５〜７０重量％、Ａｌ2 Ｏ3 ０〜３０重量％、Ｂ2 Ｏ3
５〜２０重量％よりなるガラス粉末５０〜６５重量％と
Ａｌ2 Ｏ3 粉末５０〜３５重量％である。DETAILED DESCRIPTION OF THE INVENTION A first embodiment of the present invention will be described below with reference to FIGS. First, the external lead pin joining structure will be described with reference to FIG. The low temperature fired ceramic substrate 11 is formed by laminating a plurality of green sheets.
It was baked at a low temperature of 000 ° C or lower. As a ceramic material used for the low temperature fired ceramic substrate 11,
Any low-temperature fired ceramic material that can be fired at 1000 ° C. or lower, for example, CaO—SiO 2 —Al 2 O 3 —
B 2 O 3 system glass and from consisting systems Al 2 O 3, MgO-S
iO 2 -Al 2 O 3 -B 2 O 3 based glass and Al 2 O 3 than made systems, PbO-SiO 2 -B 2 O 3 based glass and Al
2 O 3 than made systems, or SiO 2 -B 2 O 3 based glass and Al 2 O 3 than made systems, and the like made of crystallized glass system. Most preferred among this, CaO-SiO 2 -
A low temperature fired ceramic material comprising a mixture of Al 2 O 3 -B 2 O 3 based glass powder and Al 2 O 3 powder, the preferred composition of which is 10 to 55 wt% CaO and SiO 2 4
5 to 70% by weight, Al 2 O 3 0 to 30% by weight, B 2 O 3
It is 50 to 65% by weight of glass powder consisting of 5 to 20% by weight and 50 to 35% by weight of Al 2 O 3 powder.
【００１６】このような組成にすると、焼成過程におい
てアノーサイト若しくはアノーサイト＋ケイ酸カルシウ
ムの部分結晶化を起こさせて、酸化雰囲気（空気）中で
８００〜１０００℃の低温焼成を可能にするだけでな
く、焼成過程における微細パターンのずれを上述した部
分結晶化により抑えることができて、ファインパターン
の形成が容易である。また、焼成時に３０〜５０℃／分
という速いスピードで昇温しても、７３０〜８５０℃ま
でガラス層が全く軟化せず、収縮もしない多孔質体を維
持するため、クラックが入ったり、カーボンをガラス層
に封じ込めること無く、バインダーを容易に除去でき、
更に、８００〜１０００℃の焼成温度付近で急速に収縮
焼結するため、大型の緻密なセラミック基板を短時間で
焼成可能である。With such a composition, only partial crystallization of anorthite or anorthite + calcium silicate occurs in the firing process, and low temperature firing at 800 to 1000 ° C. is possible in an oxidizing atmosphere (air). Not only that, the deviation of the fine pattern in the firing process can be suppressed by the above-described partial crystallization, and the fine pattern can be easily formed. Further, even if the temperature is raised at a high speed of 30 to 50 ° C./minute during firing, the glass layer does not soften to 730 to 850 ° C. at all and maintains a porous body that does not shrink, so that cracks or carbon are generated. The binder can be easily removed without enclosing the
Furthermore, since the shrinking sintering is performed rapidly near the firing temperature of 800 to 1000 ° C., a large dense ceramic substrate can be fired in a short time.
【００１７】この低温焼成セラミック基板１１には、ネ
イルヘッド型の外部リードピン１２を半田付けする位置
に円形凹状のピン接続用凹部１３が形成されている。こ
のピン接続用凹部１３の形成法は、表層側に積層する数
枚のグリーンシートにピン接続用凹部１３に対応する孔
を打ち抜き形成し、これを積層してピン接続用凹部１３
を形成するものである。このピン接続用凹部１３は、穴
径が例えば１．０ｍｍ〜１．６ｍｍで、深さ寸法が例え
ば０．２ｍｍ以上に設定されている。更に、外部リード
ピン１２のネイルヘッド１２ａの外径は、ピン接続用凹
部１３の穴径よりも例えば０．３ｍｍ〜０．８ｍｍ程度
小さく形成されている。The low temperature fired ceramic substrate 11 is provided with a circular concave pin connecting recess 13 at a position where the nail head type external lead pin 12 is soldered. This pin connection recess 13 is formed by punching holes corresponding to the pin connection recess 13 in several green sheets stacked on the surface side, and stacking the holes to stack them.
Is formed. The pin connecting recess 13 has a hole diameter of, for example, 1.0 mm to 1.6 mm and a depth dimension of, for example, 0.2 mm or more. Further, the outer diameter of the nail head 12a of the external lead pin 12 is smaller than the hole diameter of the pin connecting recess 13 by, for example, about 0.3 mm to 0.8 mm.
【００１８】また、ピン接続用凹部１３の底面には、ピ
ン接続用パッド１４がスクリーン印刷により形成されて
いる。このピン接続用パッド１４を形成する金属として
は、Ａｇ、Ｐｄ、Ａｇ−Ｐｄ、Ａｕ、Ｐｔ、Ｃｕ等、比
較的低融点の電気的特性の良い金属を用いれば良く、こ
れと同じ金属で内層配線導体・ビアホール導体を形成す
れば良い。そして、上記ピン接続用パッド１４と外部リ
ードピン１２のネイルヘッド１２ａとが高温半田１５
（半田）で半田付けされている。ここで、高温半田１５
は、融点が２４０℃以上のものを使用する。これは、こ
の低温焼成セラミックパッケージをプリント基板（図示
せず）に実装する工程で外部リードピン１２を共晶半田
でプリント基板に半田付けする際に２３０℃程度の熱を
受けるため、その熱によってピン接合部の半田１５が溶
融しないようにするためである。A pin connecting pad 14 is formed on the bottom surface of the pin connecting recess 13 by screen printing. As the metal forming the pad 14 for pin connection, a metal having a relatively low melting point and good electrical characteristics, such as Ag, Pd, Ag-Pd, Au, Pt, or Cu, may be used. Wiring conductors and via-hole conductors may be formed. Then, the pin connection pad 14 and the nail head 12a of the external lead pin 12 are bonded together by the high temperature solder 15
Soldered with (solder). Here, high temperature solder 15
Has a melting point of 240 ° C. or higher. This is because when the external lead pins 12 are soldered to the printed circuit board by eutectic solder in the process of mounting the low temperature fired ceramic package on the printed circuit board (not shown), heat of about 230 ° C. This is to prevent the solder 15 at the joint from melting.
【００１９】また、低温焼成セラミック基板１１のピン
接続用凹部１３と外部リードピン１２の半田付け部との
隙間に、接着用樹脂である熱硬化型のエポキシ樹脂１６
がピン半田付け部を埋め込むように充填され、該エポキ
シ樹脂１６は低温焼成セラミック基板１１の表面のうち
少なくともピン接続用凹部１３の周辺部も覆うように展
着されている。ここで使用するエポキシ樹脂１６は、熱
膨張率が低温焼成セラミック基板１１の熱膨張率の４倍
以下に調整されている。Further, a thermosetting epoxy resin 16 which is an adhesive resin is provided in the gap between the pin connection concave portion 13 of the low temperature fired ceramic substrate 11 and the soldering portion of the external lead pin 12.
Is filled so as to embed the pin soldering portion, and the epoxy resin 16 is spread so as to cover at least the peripheral portion of the pin connecting recess 13 on the surface of the low temperature fired ceramic substrate 11. The coefficient of thermal expansion of the epoxy resin 16 used here is adjusted to 4 times or less of the coefficient of thermal expansion of the low temperature fired ceramic substrate 11.
【００２０】このエポキシ樹脂１６の熱膨張率の調整法
は、エポキシ樹脂自体の熱膨張率よりも低い熱膨張率の
材料をエポキシ樹脂に混合することで、樹脂全体の熱膨
張率を低下させ、低熱膨張率材料の混合量を調整するこ
とで、樹脂全体の熱膨張率を調整するものである。低熱
膨張率材料としては、例えばシリカ粉（ＳｉＯ2 ）を用
いれば良い。このようにエポキシ樹脂１６の熱膨張率を
低温焼成セラミック基板１１の熱膨張率の４倍以下に抑
える理由は、エポキシ樹脂１６と低温焼成セラミック基
板１１との熱膨張率の差が大きいと、温度サイクル信頼
性試験時にエポキシ樹脂１６に過大な応力が加わり、樹
脂内部破壊が発生するためである。The method of adjusting the coefficient of thermal expansion of the epoxy resin 16 is to mix a material having a coefficient of thermal expansion lower than that of the epoxy resin itself into the epoxy resin to decrease the coefficient of thermal expansion of the entire resin, The thermal expansion coefficient of the entire resin is adjusted by adjusting the mixing amount of the low thermal expansion coefficient material. As the low thermal expansion coefficient material, for example, silica powder (SiO 2 ) may be used. The reason why the coefficient of thermal expansion of the epoxy resin 16 is suppressed to 4 times or less of the coefficient of thermal expansion of the low temperature fired ceramic substrate 11 is that the temperature difference is large when the difference in the coefficient of thermal expansion between the epoxy resin 16 and the low temperature fired ceramic substrate 11 is large. This is because an excessive stress is applied to the epoxy resin 16 at the time of the cycle reliability test, which causes internal destruction of the resin.
【００２１】また、エポキシ樹脂１６の充填方法は、図
２及び図３に示すように、ディスペンサのノズル１７を
外部リードピン１２の配列に沿って移動させながらエポ
キシ樹脂１６を注出し、各ピン接続用凹部１３内とその
周辺部に順次充填する。As shown in FIGS. 2 and 3, the epoxy resin 16 is filled by pouring the epoxy resin 16 while moving the nozzle 17 of the dispenser along the arrangement of the external lead pins 12 and connecting each pin. The inside of the concave portion 13 and its peripheral portion are sequentially filled.
【００２２】次に、上記第１の実施形態の外部リードピ
ン１２の接合構造について行った温度サイクル信頼性試
験の結果を説明する。ここで、温度サイクル信頼性試験
は、例えば−６５℃〜＋１５０℃の温度サイクル（Ｔ／
Ｃ）を例えば１０００サイクル繰り返したものである。
次の表１に、初期（試験開始前）、Ｔ／Ｃ２５０サイク
ル後、Ｔ／Ｃ５００サイクル後、Ｔ／Ｃ１０００サイク
ル後の各ピン接合強度を測定したピン垂直引張試験結果
が示されている。Next, the result of the temperature cycle reliability test conducted on the joint structure of the external lead pin 12 of the first embodiment will be described. Here, the temperature cycle reliability test includes, for example, a temperature cycle (T / T of −65 ° C. to + 150 ° C.).
For example, C) is repeated for 1000 cycles.
Table 1 below shows the results of the pin vertical tensile test in which the pin bonding strength was measured at the initial stage (before the start of the test), after 250 cycles of T / C, after 500 cycles of T / C, and after 1000 cycles of T / C.
【００２３】[0023]
【表１】 [Table 1]
【００２４】このピン垂直引張試験結果によれば、初期
〜Ｔ／Ｃ１０００サイクルを通してピン接合強度≧１０
ｋｇｆ（全数ピン切れ）を確保できた。このピン垂直引
張試験後（ピン切れ）のピン半田付け部の断面をＳＥＭ
（走査型電子顕微鏡）で観察したところ、初期〜Ｔ／Ｃ
１０００サイクルを通してピン垂直引張試験後のピン半
田付け部に異常は見られなかった。According to the results of the vertical tensile test of the pin, the pin bonding strength ≧ 10 from the initial to T / C1000 cycles.
It was possible to secure kgf (all pins were cut). SEM of the cross-section of the pin soldering part after this pin vertical tensile test (broken pin)
When observed with a (scanning electron microscope), initial to T / C
No abnormality was found in the pin soldering portion after the pin vertical tensile test through 1000 cycles.
【００２５】また、温度サイクル信頼性試験・ピン垂直
引張試験が配線導体（例えばＡｇ）の電気抵抗率に及ぼ
す影響を調べるために、上記各サイクルのピン垂直引張
試験の前後に外部リードピン１２と搭載チップのワイヤ
ボンド（例えばＡｇ−Ｐｄ）との間の配線長単位長さ当
りの電気抵抗率（＝外部リードピン１２とワイヤボンド
との間の電気抵抗値÷配線長）を測定し、その測定結果
を図４に示している。従来のアルミナ基板の配線導体
（タングステン）の電気抵抗率は１０２〜１４０ｍΩ／
ｍｍであるのに対し、上記第１の実施形態の低温焼成セ
ラミック基板１１の配線導体（Ａｇ）は、Ｔ／Ｃ１００
０サイクル後も１５ｍΩ／ｍｍ程度を確保できた。In order to investigate the influence of the temperature cycle reliability test / pin vertical tensile test on the electrical resistivity of the wiring conductor (for example, Ag), the external lead pins 12 are mounted before and after the pin vertical tensile test of each cycle. Wiring length between the wire bond of the chip (for example, Ag-Pd) The electrical resistivity per unit length (= electrical resistance value between the external lead pin 12 and the wire bond / wiring length) is measured, and the measurement result is obtained. Is shown in FIG. The electrical resistivity of the wiring conductor (tungsten) of the conventional alumina substrate is 102 to 140 mΩ /
Whereas the wiring conductor (Ag) of the low temperature fired ceramic substrate 11 of the first embodiment is T / C100.
After 0 cycles, about 15 mΩ / mm could be secured.
【００２６】以上説明した第１の実施形態では、低温焼
成セラミック基板１１にピン接続用凹部１３を形成し、
このピン接続用凹部１３の底面に形成されたピン接続用
パッド１４に外部リードピン１２を半田付けした後、低
温焼成セラミック基板１１の少なくともピン接続用凹部
１３とピン半田付け部との隙間にエポキシ樹脂１６をピ
ン半田付け部を埋め込むように充填したので、ピン接続
用凹部１３の内周面によってエポキシ樹脂１６とセラミ
ックとの接着面積を拡大できると共に、エポキシ樹脂１
６と外部リードピン１２との接着面積も拡大しつつ、ピ
ン引張時にエポキシ樹脂１６でネイルヘッド１２ａを押
さえることができ、それによってピン接合強度を十分に
向上させることができて、多ピン化（ピンピッチの狭ピ
ッチ化）にも十分に対応できる。In the first embodiment described above, the pin connecting recess 13 is formed in the low temperature fired ceramic substrate 11,
After the external lead pins 12 are soldered to the pin connecting pads 14 formed on the bottom surface of the pin connecting concave portion 13, epoxy resin is provided in at least the gap between the pin connecting concave portion 13 and the pin soldering portion of the low temperature firing ceramic substrate 11. Since 16 is filled so as to embed the pin soldering portion, the adhesion area between the epoxy resin 16 and the ceramic can be increased by the inner peripheral surface of the pin connecting recess 13 and the epoxy resin 1
6 and the external lead pin 12 can be expanded while the epoxy resin 16 can hold down the nail head 12a when pulling the pin, thereby sufficiently improving the pin bonding strength and increasing the pin count (pin pitch). (Narrower pitch) can be fully supported.
【００２７】一方、図５は本発明の第２の実施形態であ
り、上記第１の実施形態のものに補強板１８を追加した
構成となっている。補強板１８は、例えば低温焼成セラ
ミック、Ａｌ2 Ｏ3 、ＦＲ４、ガラスエポキシ等によっ
て形成され、その外形寸法が低温焼成セラミック基板１
１と同一になっている。この補強板１８には、外部リー
ドピン１２を挿通するピン貫通孔１９が形成され、この
ピン貫通孔１９が外部リードピン１２に挿通された状態
で、補強板１８がエポキシ樹脂１６で低温焼成セラミッ
ク基板１１に接着され、ピン貫通孔１９内にもエポキシ
樹脂１６が充填されている。これ以外の構成は、前記第
１の実施形態と同じである。On the other hand, FIG. 5 shows a second embodiment of the present invention, in which a reinforcing plate 18 is added to that of the first embodiment. The reinforcing plate 18 is formed of, for example, low temperature fired ceramic, Al 2 O 3 , FR4, glass epoxy, or the like, and the external dimensions thereof are the low temperature fired ceramic substrate 1.
It is the same as 1. A pin through hole 19 for inserting the external lead pin 12 is formed in the reinforcing plate 18, and the reinforcing plate 18 is made of an epoxy resin 16 for low temperature firing ceramic substrate 11 while the pin through hole 19 is inserted in the external lead pin 12. The pin through hole 19 is also filled with the epoxy resin 16. The other configuration is the same as that of the first embodiment.
【００２８】この第２の実施形態についても、温度サイ
クル信頼性試験を行い、前掲した表１に、初期（試験開
始前）、Ｔ／Ｃ２５０サイクル後、Ｔ／Ｃ５００サイク
ル後、Ｔ／Ｃ１０００サイクル後の各ピン接合強度を測
定したピン垂直引張試験結果が示されている。Also in this second embodiment, the temperature cycle reliability test was conducted, and Table 1 above shows the initial (before the start of the test), after 250 cycles of T / C, after 500 cycles of T / C and after 1000 cycles of T / C. The results of the pin vertical tensile test in which the respective pin joint strengths are measured are shown.
【００２９】このように、低温焼成セラミック基板１１
に補強板１８をエポキシ樹脂１６で接着した構成として
も、初期〜Ｔ／Ｃ１０００サイクルを通してピン接合強
度≧１０ｋｇｆ（全数ピン切れ）を確保できると共に、
ピン半田付け部の断面ＳＥＭ観察でも、初期〜Ｔ／Ｃ１
０００サイクルを通してピン半田付け部に異常は見られ
なかった。また、電気抵抗率についても、初期〜Ｔ／Ｃ
１０００サイクルを通してアルミナ基板の初期電気抵抗
率の１／４〜１／５程度に抑えられ、優れた電気的特性
を長期間にわたって良好に維持できる。Thus, the low temperature fired ceramic substrate 11
Even if the reinforcing plate 18 is adhered to the epoxy resin 16 at the same time, pin bonding strength ≧ 10 kgf (total number of pin breaks) can be secured from the initial to T / C 1000 cycles.
Even from the cross-section SEM observation of the pin soldering part, the initial to T / C1
No abnormality was found in the pin soldering portion through 000 cycles. Also, regarding the electrical resistivity, from the initial stage to T / C
Through 1000 cycles, the initial electrical resistivity of the alumina substrate can be suppressed to about 1/4 to 1/5, and excellent electrical characteristics can be favorably maintained for a long period of time.
【００３０】尚、図５では、ピン貫通孔１９の内径がピ
ン接続用凹部１３の内径とほぼ同一になっているが、ピ
ン貫通孔１９の内径をピン接続用凹部１３の内径よりも
小さくしても良く、要は、ピン貫通孔１９の内径を、外
部リードピン１２の挿入のためのクリアランスを考慮し
て設定すれば良い。In FIG. 5, the inner diameter of the pin through hole 19 is substantially the same as the inner diameter of the pin connecting recess 13, but the inner diameter of the pin through hole 19 is smaller than the inner diameter of the pin connecting recess 13. The point is that the inner diameter of the pin through hole 19 may be set in consideration of the clearance for inserting the external lead pin 12.
【００３１】また、ピン接続用凹部１３等に充填する接
着用樹脂は、熱硬化型のエポキシ系樹脂に限定されず、
例えば熱硬化型のシリコン系樹脂、常温硬化型のシリコ
ン系樹脂であっても良く、要は、低温焼成セラミック基
板１１に対する接着力の強い樹脂を用いれば良い。The adhesive resin to be filled in the pin connecting recesses 13 and the like is not limited to the thermosetting epoxy resin,
For example, a thermosetting silicone resin or a room temperature curing silicone resin may be used. In short, a resin having a strong adhesive force to the low temperature firing ceramic substrate 11 may be used.
【００３２】[0032]
【発明の効果】以上の説明から明らかなように、本発明
の請求項１の構成によれば、低温焼成セラミック基板に
ピン接続用凹部を形成し、このピン接続用凹部の底面に
形成されたピン接続用パッドに外部リードピンを半田付
けし、低温焼成セラミック基板の少なくともピン接続用
凹部とピン半田付け部との隙間にエポキシ樹脂をピン半
田付け部を埋め込むように充填したので、ピン接続用凹
部の内周面によってエポキシ樹脂とセラミックとの接着
面積を拡大できて、ピン接合強度を十分に向上させるこ
とができ、多ピン化（ピンピッチの狭ピッチ化）にも十
分に対応できる。As is apparent from the above description, according to the structure of claim 1 of the present invention, the low temperature fired ceramic substrate is formed with the pin connection concave portion and is formed on the bottom surface of the pin connection concave portion. External lead pins were soldered to the pin connection pads, and epoxy resin was filled into the gap between at least the pin connection recess and the pin soldering part of the low temperature fired ceramic substrate so that the pin soldering part was embedded. The inner peripheral surface can increase the bonding area between the epoxy resin and the ceramic, sufficiently improve the pin bonding strength, and can sufficiently cope with the increase in the number of pins (narrow pitch of the pin pitch).
【００３３】更に、請求項２では、補強板を接着用樹脂
で低温焼成セラミック基板に接着し、該補強板のピン貫
通孔内にも接着用樹脂を充填したので、補強板による補
強効果により低温焼成セラミック基板の表面強度を高め
ることができると共に、補強板のピン貫通孔内にも接着
用樹脂を充填することで接着用樹脂と外部リードピンと
の接着面積を拡大することができ、ピン接合強度を十分
に向上させることができて、多ピン化にも十分に対応で
きる。Further, in the present invention, the reinforcing plate is adhered to the low temperature fired ceramic substrate with the adhesive resin, and the adhesive resin is filled also in the pin through holes of the reinforcing plate. The surface strength of the fired ceramic substrate can be increased, and by filling the adhesive resin in the pin through holes of the reinforcing plate, the adhesive area between the adhesive resin and the external lead pins can be expanded, and the pin bonding strength can be increased. Can be sufficiently improved, and a large number of pins can be sufficiently coped with.
【図１】本発明の第１の実施形態を示す外部リードピン
接合構造の拡大縦断面図FIG. 1 is an enlarged vertical cross-sectional view of an external lead pin joining structure showing a first embodiment of the present invention.
【図２】エポキシ樹脂の充填方法を説明する縦断面図FIG. 2 is a vertical cross-sectional view illustrating a method of filling epoxy resin.
【図３】エポキシ樹脂の充填方法を説明する平面図FIG. 3 is a plan view illustrating a method of filling epoxy resin.
【図４】温度サイクル信頼性試験における単位長さ当り
の電気抵抗率の測定結果を示す図FIG. 4 is a diagram showing measurement results of electric resistivity per unit length in a temperature cycle reliability test.
【図５】本発明の第２の実施形態を示す外部リードピン
接合構造の拡大縦断面図FIG. 5 is an enlarged vertical cross-sectional view of an external lead pin joining structure showing a second embodiment of the present invention.
１１…低温焼成セラミック基板、１２…外部リードピ
ン、１３…ピン接続用凹部、１４…ピン接続用パッド、
１５…高温半田（半田）、１６…エポキシ樹脂（接着用
樹脂）、１８…補強板、１９…ピン貫通孔。11 ... Low temperature fired ceramic substrate, 12 ... External lead pin, 13 ... Recess for pin connection, 14 ... Pad for pin connection,
15 ... High temperature solder (solder), 16 ... Epoxy resin (adhesive resin), 18 ... Reinforcing plate, 19 ... Pin through hole.
Claims (2)
部が形成され、このピン接続用凹部の底面に形成された
ピン接続用パッドに外部リードピンのネイルヘッドが半
田付けされ、 前記低温焼成セラミック基板の少なくとも前記ピン接続
用凹部とピン半田付け部との隙間に接着用樹脂が前記ピ
ン半田付け部を埋め込むように充填されていることを特
徴とする低温焼成セラミック基板の外部リードピン接合
構造。1. A low temperature fired ceramic substrate is formed with a pin connection concave portion, and a nail head of an external lead pin is soldered to a pin connection pad formed on the bottom surface of the pin connection concave portion. An external lead pin bonding structure for a low temperature fired ceramic substrate, wherein at least a gap between the pin connection concave portion and the pin soldering portion is filled with an adhesive resin so as to fill the pin soldering portion.
部リードピンに挿通された状態で、該補強板が前記接着
用樹脂で前記低温焼成セラミック基板に接着され、前記
補強板のピン貫通孔内にも前記接着用樹脂が充填されて
いることを特徴とする請求項１に記載の低温焼成セラミ
ック基板の外部リードピン接合構造。2. The pin through hole of the reinforcing plate is adhered to the low temperature fired ceramic substrate with the adhesive resin in a state where the pin through hole formed in the reinforcing plate is inserted into the external lead pin. 2. The external lead pin bonding structure for a low temperature fired ceramic substrate according to claim 1, wherein the adhesive resin is also filled inside.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25836795A JPH09102560A (en) | 1995-10-05 | 1995-10-05 | External lead pin joining structure for low-temperature baked ceramic substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25836795A JPH09102560A (en) | 1995-10-05 | 1995-10-05 | External lead pin joining structure for low-temperature baked ceramic substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09102560A true JPH09102560A (en) | 1997-04-15 |
Family
ID=17319266
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25836795A Pending JPH09102560A (en) | 1995-10-05 | 1995-10-05 | External lead pin joining structure for low-temperature baked ceramic substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09102560A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000195983A (en) * | 1998-12-24 | 2000-07-14 | Ngk Spark Plug Co Ltd | Substrate made of resin |
| WO2003028100A3 (en) * | 2001-09-27 | 2003-11-20 | Intel Corp | Encapsulation of pin solder for maintaining accuracy in pin position |
| JP2009200313A (en) * | 2008-02-22 | 2009-09-03 | Shinko Electric Ind Co Ltd | Pga wiring board and method of manufacturing the same |
| JP2009260334A (en) * | 2008-03-28 | 2009-11-05 | Ngk Spark Plug Co Ltd | Multi-layer wiring board and manufacturing method thereof |
| JP2009283815A (en) * | 2008-05-26 | 2009-12-03 | Kyocera Corp | Substrate for mounting electronic component |
| CN104093282A (en) * | 2014-07-10 | 2014-10-08 | 海芝通电子(深圳)有限公司 | Circuit board wiring reinforcing process |
| JP2016050815A (en) * | 2014-08-29 | 2016-04-11 | 株式会社村田製作所 | Multilayer wiring board and probe card equipped with multilayer wiring board |
| JP2018078195A (en) * | 2016-11-09 | 2018-05-17 | 京セラ株式会社 | Ceramic wiring substrate, probe substrate, and probe card |
-
1995
- 1995-10-05 JP JP25836795A patent/JPH09102560A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000195983A (en) * | 1998-12-24 | 2000-07-14 | Ngk Spark Plug Co Ltd | Substrate made of resin |
| WO2003028100A3 (en) * | 2001-09-27 | 2003-11-20 | Intel Corp | Encapsulation of pin solder for maintaining accuracy in pin position |
| US6974765B2 (en) | 2001-09-27 | 2005-12-13 | Intel Corporation | Encapsulation of pin solder for maintaining accuracy in pin position |
| US7211888B2 (en) | 2001-09-27 | 2007-05-01 | Intel Corporation | Encapsulation of pin solder for maintaining accuracy in pin position |
| CN100350603C (en) * | 2001-09-27 | 2007-11-21 | 英特尔公司 | Encapsulation of pin solder for maintaining accuracy in pin position |
| JP2009200313A (en) * | 2008-02-22 | 2009-09-03 | Shinko Electric Ind Co Ltd | Pga wiring board and method of manufacturing the same |
| KR101521485B1 (en) * | 2008-02-22 | 2015-05-20 | 신꼬오덴기 고교 가부시키가이샤 | Pga type wiring board and mehtod of manufacturing the same |
| JP2009260334A (en) * | 2008-03-28 | 2009-11-05 | Ngk Spark Plug Co Ltd | Multi-layer wiring board and manufacturing method thereof |
| JP2009283815A (en) * | 2008-05-26 | 2009-12-03 | Kyocera Corp | Substrate for mounting electronic component |
| CN104093282A (en) * | 2014-07-10 | 2014-10-08 | 海芝通电子(深圳)有限公司 | Circuit board wiring reinforcing process |
| JP2016050815A (en) * | 2014-08-29 | 2016-04-11 | 株式会社村田製作所 | Multilayer wiring board and probe card equipped with multilayer wiring board |
| JP2018078195A (en) * | 2016-11-09 | 2018-05-17 | 京セラ株式会社 | Ceramic wiring substrate, probe substrate, and probe card |
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