JPH0897645A - Class b push-pull amplifier circuit - Google Patents
Class b push-pull amplifier circuitInfo
- Publication number
- JPH0897645A JPH0897645A JP22964994A JP22964994A JPH0897645A JP H0897645 A JPH0897645 A JP H0897645A JP 22964994 A JP22964994 A JP 22964994A JP 22964994 A JP22964994 A JP 22964994A JP H0897645 A JPH0897645 A JP H0897645A
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- Prior art keywords
- push
- pull
- current
- output
- minimum value
- Prior art date
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、プッシュ側およびプル
側増幅段と、プッシュ側およびプル側出力段を有するＢ
級プッシュプル増幅回路に関する。BACKGROUND OF THE INVENTION The present invention is a B having a push-side and pull-side amplification stage and a push-side and pull-side output stage.
Class push-pull amplifier circuit
【０００２】[0002]
【従来の技術】Ｂ級プッシュプル増幅器としては、図６
に示すように、プッシュ側およびプル側増幅段としての
オペアンプ６１，６２と、プッシュ側およびプル側出力
段としてのFET(field effect transistor)とを有するも
のが知られている。図６において、６５は負荷インピー
ダンスである。このようなＢ級プッシュプル増幅器は、
出力スイングに応じて出力電流ｉout を負荷に供給する
ので、出力段に流れる電流は図７(a) に示すようにな
る。図７(a) において、出力段のプッシュ側電流を実線
で示し、出力段のプル側電流を破線で示す。2. Description of the Related Art FIG. 6 shows a class B push-pull amplifier.
As shown in FIG. 2, there are known ones having operational amplifiers 61 and 62 as push-side and pull-side amplification stages and FET (field effect transistors) as push-side and pull-side output stages. In FIG. 6, reference numeral 65 is a load impedance. Such a class B push-pull amplifier is
Since the output current iout is supplied to the load according to the output swing, the current flowing through the output stage becomes as shown in FIG. 7 (a). In FIG. 7A, the push-side current of the output stage is shown by a solid line, and the pull-side current of the output stage is shown by a broken line.
【０００３】[0003]
【発明が解決しようとする課題】しかし、なんらかの要
因、例えば、ゲインアンプのオフセット等で出力電流ｉ
out が過剰に流れると、図７(b) に示すように零入力電
流が増大する。逆に、図７(c) に示すように、零入力電
流が流れなくなると、出力にクロスオーバ歪みが発生す
る。出力にクロスオーバ歪みが発生した様子を図７(d)
に示す。However, due to some factor, for example, the offset of the gain amplifier, the output current i
When out flows excessively, the quiescent current increases as shown in FIG. 7 (b). On the contrary, as shown in FIG. 7C, when the quiescent current stops flowing, crossover distortion occurs in the output. Figure 7 (d) showing how crossover distortion occurs in the output
Shown in.
【０００４】本発明の目的は、上記のような問題点を解
決し、クロスオーバ歪の発生を防止することができるＢ
級プッシュプル増幅回路を提供することにある。The object of the present invention is to solve the above problems and prevent the occurrence of crossover distortion.
It is to provide a class push-pull amplifier circuit.
【０００５】[0005]
１） 本発明は、プッシュ側およびプル側増幅段とプッ
シュ側およびプル側出力段を有するＢ級プッシュプル増
幅回路において、前記プッシュ側およびプル側増幅段の
出力電流を加算する加算手段と、該加算手段により加算
して得られた電流の最小値を検出する最小値検出手段
と、該最小値検出手段により検出された最小値と第１基
準値を比較する第１比較手段と、該第１比較手段による
比較結果に応じて前記プッシュ側およびプル側増幅段の
動作点を調整する第１調整手段とを備えたことを特徴と
する。1) According to the present invention, in a class B push-pull amplifier circuit having a push-side and pull-side amplification stage and a push-side and pull-side output stage, adding means for adding output currents of the push-side and pull-side amplification stages, Minimum value detecting means for detecting the minimum value of the current obtained by adding by the adding means; first comparing means for comparing the minimum value detected by the minimum value detecting means with a first reference value; A first adjusting means for adjusting the operating points of the push-side and pull-side amplifying stages in accordance with the comparison result by the comparing means.
【０００６】２） 本発明は、プッシュ側およびプル側
増幅段と、プッシュ側およびプル側出力段を有するＢ級
プッシュプル増幅回路において、前記プッシュ側および
プル側増幅段の出力電流を加算する加算手段と、該加算
手段により加算して得られた電流の平均値を演算する平
均値演算手段と、該平均値演算手段により得られた平均
値と第２基準値を比較する第２比較手段と、該第２比較
手段による比較結果に応じて前記増幅段の動作点を調整
する第２調整手段とを備えたことを特徴とする。2) According to the present invention, in a class B push-pull amplifier circuit having a push-side and pull-side amplification stage and a push-side and pull-side output stage, an addition for adding output currents of the push-side and pull-side amplification stages Means, an average value calculating means for calculating an average value of the currents obtained by adding by the adding means, and a second comparing means for comparing the average value obtained by the average value calculating means with a second reference value. And second adjusting means for adjusting the operating point of the amplification stage according to the comparison result by the second comparing means.
【０００７】[0007]
１） 本発明では、プッシュ側およびプル側増幅段の出
力電流を加算手段により加算し、加算して得られた電流
の最小値を最小値検出手段により検出し、検出された最
小値と第１基準値を第１比較手段により比較し、比較結
果に応じて、プッシュ側およびプル側増幅段の動作点を
第１調整手段により調整する。1) In the present invention, the output currents of the push-side and pull-side amplification stages are added by the adding means, and the minimum value of the current obtained by the addition is detected by the minimum value detecting means. The reference values are compared by the first comparing means, and the operating points of the push-side and pull-side amplifying stages are adjusted by the first adjusting means according to the comparison result.
【０００８】２） 本発明では、プッシュ側およびプル
側増幅段の出力電流を加算手段により加算し、加算して
得られた電流の平均値を平均値演算手段により演算し、
得られた平均値と第２基準値を第２比較手段により比較
し、比較結果に応じて、増幅段の動作点を第２調整手段
により調整する。2) In the present invention, the output currents of the push-side and pull-side amplification stages are added by the adding means, and the average value of the currents obtained by the addition is calculated by the average value calculating means,
The obtained average value and the second reference value are compared by the second comparison means, and the operating point of the amplification stage is adjusted by the second adjustment means according to the comparison result.
【０００９】[0009]
【実施例】以下、本発明の実施例を図面を参照して詳細
に説明する。Embodiments of the present invention will now be described in detail with reference to the drawings.
【００１０】＜第１実施例＞図１は本発明の第１実施例
を示す。図１において、６１ないし６５は図６と同一部
分を示す。１はプッシュ側電流検出回路であり、オペア
ンプ６１の出力電流を検出するものである。２はプル側
電流検出回路であり、オペアンプ６２の出力電流を検出
するものである。３は加算回路であり、プッシュ側電流
検出回路１により検出された電流と、プル側電流検出回
路２により検出された電流とを加算するものである。４
は最小値検出回路であり、加算回路３による加算結果の
最小値を検出するものである。５は比較器であり、最小
値検出回路４の出力値と所定の基準値と比較し、比較結
果に応じて動作点を調整するものである。<First Embodiment> FIG. 1 shows a first embodiment of the present invention. In FIG. 1, reference numerals 61 to 65 denote the same parts as in FIG. Reference numeral 1 denotes a push-side current detection circuit, which detects the output current of the operational amplifier 61. A pull-side current detection circuit 2 detects the output current of the operational amplifier 62. An adder circuit 3 adds the current detected by the push-side current detection circuit 1 and the current detected by the pull-side current detection circuit 2. Four
Is a minimum value detection circuit, which detects the minimum value of the addition result of the addition circuit 3. A comparator 5 compares the output value of the minimum value detection circuit 4 with a predetermined reference value and adjusts the operating point according to the comparison result.
【００１１】次に、動作を説明する。Next, the operation will be described.
【００１２】オペアンプ６１の出力電流をプッシュ側電
流検出回路１により検出し、オペアンプ６２の出力電流
をプル側電流検出回路２により検出し、それぞれ検出さ
れた電流を加算回路３により加算する。そして、加算回
路３の出力電流の最小値を最小値検出回路４により検出
し、検出された最小値と基準値を比較器５により比較す
る。比較した結果、最小値検出回路４の出力値が所定の
基準値未満である場合は、オペアンプ６１の動作点を下
げるとともに、オペアンプ６２の動作点を上げ、他方、
最小値検出回路４の出力値が所定の基準値より大きい場
合は、オペアンプ６１の動作点を上げるとともに、オペ
アンプ６２の動作点を下げる。The output current of the operational amplifier 61 is detected by the push-side current detection circuit 1, the output current of the operational amplifier 62 is detected by the pull-side current detection circuit 2, and the respective detected currents are added by the adder circuit 3. Then, the minimum value of the output current of the adder circuit 3 is detected by the minimum value detection circuit 4, and the detected minimum value and the reference value are compared by the comparator 5. As a result of the comparison, when the output value of the minimum value detection circuit 4 is less than the predetermined reference value, the operating point of the operational amplifier 61 is lowered and the operating point of the operational amplifier 62 is raised, while
When the output value of the minimum value detection circuit 4 is larger than the predetermined reference value, the operating point of the operational amplifier 61 is raised and the operating point of the operational amplifier 62 is lowered.
【００１３】次に、図２ないし図４を参照して動作を説
明する。Next, the operation will be described with reference to FIGS.
【００１４】(1) プッシュ側電流検出回路１により検出
された電流の波形が図２(a) に実線で示すようになり、
プル側電流検出回路２により検出された電流の波形が図
２(a)破線で示すようになった場合、加算して得られた
電流波形は図３に示すようになる。この場合、検出され
た最小値が所定の基準値と等しいので、オペアンプ６
１，６２の動作点は図２(c) に示すようになっており、
増幅器６１，６２の動作点は調整されない。得られた出
力電圧は図２(d) に示すようになる。(1) The waveform of the current detected by the push-side current detection circuit 1 is shown by the solid line in FIG. 2 (a),
When the waveform of the current detected by the pull-side current detection circuit 2 is as shown by the broken line in FIG. 2 (a), the current waveform obtained by addition is as shown in FIG. In this case, since the detected minimum value is equal to the predetermined reference value, the operational amplifier 6
The operating points of 1,62 are as shown in Fig. 2 (c).
The operating points of the amplifiers 61 and 62 are not adjusted. The obtained output voltage is shown in Fig. 2 (d).
【００１５】(2) プッシュ側およびプル側電流検出回路
１，２により検出された電流の波形が図３(a) に実線お
よび破線で示すようになった場合は、加算回路３により
加算して得られた電流波形も図３(a) に示すようにな
る。この場合、最小値検出回路４により検出された最小
値は、基準値より小さいので、オペアンプ６１，６２の
動作点は図３(b) に示すようになっており、比較器５に
より、オペアンプ６１の動作点が下げられるとともに、
オペアンプ６２の動作点が上げられる。その結果、得ら
れた出力電圧波形は図２(d) に示すようになる。なお、
この場合、動作点が調整されないと、その出力電圧波形
は図３(c) に示すようになる。(2) When the current waveforms detected by the push-side and pull-side current detection circuits 1 and 2 are as shown by the solid line and the broken line in FIG. 3 (a), the addition circuit 3 adds them. The obtained current waveform is also as shown in Fig. 3 (a). In this case, since the minimum value detected by the minimum value detection circuit 4 is smaller than the reference value, the operating points of the operational amplifiers 61 and 62 are as shown in FIG. As the operating point of is lowered,
The operating point of the operational amplifier 62 is raised. As a result, the output voltage waveform obtained is as shown in FIG. 2 (d). In addition,
In this case, if the operating point is not adjusted, the output voltage waveform becomes as shown in FIG. 3 (c).
【００１６】(3) プッシュ側およびプル側電流検出回路
１，２により検出された電流の波形が図４(a) に実線お
よび破線で示すようになった場合は、加算回路３により
加算して得られた電流波形も図４(a) に示すようにな
る。この場合、最小値検出回路４により検出された最小
値は、基準値より大きいので、オペアンプ６１，６２の
動作点は図４(c) に示すようになっており、比較器５に
より、オペアンプ６１の動作点が上げられるとともに、
オペアンプ６２の動作点が下げられる。その結果、得ら
れた出力電圧波形は図２(d) に示すようになる。なお、
この場合、動作点が調整されないと、その出力電圧波形
は図４(d) に示すようになる。(3) When the current waveforms detected by the push-side and pull-side current detection circuits 1 and 2 are as shown by the solid and broken lines in FIG. 4 (a), the addition circuit 3 adds them. The obtained current waveform is also shown in Fig. 4 (a). In this case, since the minimum value detected by the minimum value detection circuit 4 is larger than the reference value, the operating points of the operational amplifiers 61 and 62 are as shown in FIG. The operating point of is raised,
The operating point of the operational amplifier 62 is lowered. As a result, the output voltage waveform obtained is as shown in FIG. 2 (d). In addition,
In this case, if the operating point is not adjusted, the output voltage waveform becomes as shown in FIG. 4 (d).
【００１７】このように、出力段は常に一定の零入力電
流が流れるように制御される。零入力電流制御用フィー
ドバックループの周波数特性は、信号帯域に比較しては
るかに低く信号の歪みの原因にはならない。というの
は、制御は出力段のプッシュ側とプル側のいわゆる同相
電流を変化させるのみで、差動電流であり、信号成分に
は関係ないからである。つまり、増幅器の信号成分の通
るパスは、最も単純なＢ級プッシュプル増幅器のみであ
り、より高速な信号に対しても、安定性のある増幅器を
容易に設計することができる。In this way, the output stage is controlled so that a constant quiescent current always flows. The frequency characteristic of the feedback loop for controlling the quiescent current is much lower than the signal band and does not cause signal distortion. This is because the control only changes the so-called in-phase currents on the push side and the pull side of the output stage, which is a differential current and is not related to the signal component. That is, the path through which the signal component of the amplifier passes is only the simplest class B push-pull amplifier, and it is possible to easily design a stable amplifier even for higher speed signals.
【００１８】増幅段の電流は実際のドライバ電流を縮小
しても、基準値を実際の零入力電流値から同じ割合だけ
縮小すれば良いので、回路全体の消費電流もほとんど増
加させることなく、増幅器を構成することができる。Even if the actual driver current is reduced, the current in the amplification stage can be reduced by the same proportion as the reference value from the actual quiescent current value. Therefore, the current consumption of the entire circuit is hardly increased, and the amplifier current is reduced. Can be configured.
【００１９】さらに、この零入力電流制御は特別なタイ
ミングを必要とせず、どのような信号であっても、常
に、その最小出力電流値を検出するので、温度や電源電
流等の環境の変化にも強く、負荷やピーク電流信号周波
数の変化にも充分対応することができる。Further, this quiescent current control does not require any special timing, and the minimum output current value of any signal is always detected, so that it can be applied to environmental changes such as temperature and power supply current. It is also strong and can sufficiently cope with changes in load and peak current signal frequency.
【００２０】＜第２実施例＞第１実施例では、加算回路
３により加算して得られた電流値の最小値を最小値検出
回路４により検出し、検出された最小値と基準値を比較
器５により比較し、比較結果に応じて、オペアンプ６
１，６２の動作点を制御するようにした。<Second Embodiment> In the first embodiment, the minimum value of the current values obtained by addition by the adder circuit 3 is detected by the minimum value detection circuit 4, and the detected minimum value and the reference value are compared. The operational amplifier 6 is compared according to the comparison result by the device 5.
The operating points of 1, 62 are controlled.
【００２１】これに対して、本実施例では、図５に示す
ように、加算回路３の出力を平滑回路５４により平滑
し、平滑回路５４の出力値と基準値を比較器５５により
比較し、平滑回路５４の出力値が所定の基準値未満であ
る場合は、オペアンプ６１の動作点を下げるとともに、
オペアンプ６２の動作点を上げ、他方、平滑回路５４の
出力値が所定の基準値より大きい場合は、オペアンプ６
１の動作点を上げるとともに、オペアンプ６２の動作点
を下げるようにした。On the other hand, in this embodiment, as shown in FIG. 5, the output of the adder circuit 3 is smoothed by the smoothing circuit 54, and the output value of the smoothing circuit 54 and the reference value are compared by the comparator 55. When the output value of the smoothing circuit 54 is less than the predetermined reference value, the operating point of the operational amplifier 61 is lowered and
If the operating point of the operational amplifier 62 is raised and the output value of the smoothing circuit 54 is larger than a predetermined reference value, the operational amplifier 6
The operating point of 1 is raised and the operating point of the operational amplifier 62 is lowered.
【００２２】平滑回路５４の出力値ｉave は次式、すな
わち、The output value i ave of the smoothing circuit 54 is given by the following equation:
【００２３】[0023]
【数１】ｉave = （ｉmax - ｉmin ）/ ２ (1) で表すことができ、出力電流の最大値（ｉmax ）は、負
荷インピーダンス６５と出力スイングのピーク値Ｖpeak
から、次式、すなわち、## EQU1 ## i ave = (i max -i min ) / 2 (1), and the maximum value (i max ) of the output current is the load impedance 65 and the peak value Vpeak of the output swing.
From the following equation,
【００２４】[0024]
【数２】ｉmax = Ｖpeak /ｚ (2) と表すことができる。ただし、ｚは負荷インピーダンス
である。さらに、設定零入力電流値ｉmin は、次式、す
なわち、## EQU2 ## It can be expressed as i max = V peak / z (2). However, z is a load impedance. Further, the set quiescent current value i min is expressed by the following equation:
【００２５】[0025]
【数３】 ｉmin = ( Ｖpeak /ｚ ) - √２・ｉave (3) と表すことができる。## EQU3 ## It can be expressed as i min = ( Vpeak / z) -√2 · i ave (3).
【００２６】式(3) から分かるように、零入力電流値と
平均値は比例関係にあり、第１実施例と同様にオペアン
プ６１，６２の動作点を調整することができる。As can be seen from the equation (3), the quiescent current value and the average value are in a proportional relationship, and the operating points of the operational amplifiers 61 and 62 can be adjusted as in the first embodiment.
【００２７】[0027]
【発明の効果】以上説明したように、本発明によれば、
上記のように構成したので、クロスオーバ歪の発生を防
止することができる。As described above, according to the present invention,
Since it is configured as described above, the occurrence of crossover distortion can be prevented.
【図１】本発明の第１実施例を示すブロック図である。FIG. 1 is a block diagram showing a first embodiment of the present invention.
【図２】図１に示す各部の出力信号波形の一例を示す波
形図である。FIG. 2 is a waveform diagram showing an example of output signal waveforms of respective parts shown in FIG.
【図３】図１に示す各部の出力信号波形の一例を示す波
形図である。FIG. 3 is a waveform diagram showing an example of output signal waveforms of respective parts shown in FIG.
【図４】図１に示す各部の出力信号波形の一例を示す波
形図である。FIG. 4 is a waveform diagram showing an example of output signal waveforms of respective parts shown in FIG.
【図５】本発明の第２実施例を示すブロック図である。FIG. 5 is a block diagram showing a second embodiment of the present invention.
【図６】Ｂ級プッシュプル増幅器の従来例を示すブロッ
ク図である。FIG. 6 is a block diagram showing a conventional example of a class B push-pull amplifier.
【図７】従来例を説明するための波形図である。FIG. 7 is a waveform diagram for explaining a conventional example.
１ プッシュ側電流検出回路 ２ プル側電流検出回路 ３ 加算回路 ４ 最小値検出回路 ５ 比較器 ６１，６２ オペアンプ ６３，６４ ＦＥＴ 1 Push-side current detection circuit 2 Pull-side current detection circuit 3 Adder circuit 4 Minimum value detection circuit 5 Comparator 61,62 Operational amplifier 63,64 FET
Claims (2)
ュ側およびプル側出力段を有するＢ級プッシュプル増幅
回路において、 前記プッシュ側およびプル側増幅段の出力電流を加算す
る加算手段と、 該加算手段により加算して得られた電流の最小値を検出
する最小値検出手段と、 該最小値検出手段により検出された最小値と第１基準値
を比較する第１比較手段と、 該第１比較手段による比較結果に応じて前記プッシュ側
およびプル側増幅段の動作点を調整する第１調整手段と
を備えたことを特徴とするＢ級プッシュプル増幅回路。1. A class B push-pull amplifier circuit having a push-side and pull-side amplification stage and a push-side and pull-side output stage, and adding means for adding output currents of the push-side and pull-side amplification stages, and the addition means. Minimum value detecting means for detecting the minimum value of the current obtained by adding by means, first comparing means for comparing the minimum value detected by the minimum value detecting means with a first reference value, and the first comparing A class B push-pull amplifier circuit comprising: first adjusting means for adjusting the operating points of the push-side and pull-side amplifying stages according to the comparison result by the means.
シュ側およびプル側出力段を有するＢ級プッシュプル増
幅回路において、 前記プッシュ側およびプル側増幅段の出力電流を加算す
る加算手段と、 該加算手段により加算して得られた電流の平均値を演算
する平均値演算手段と、 該平均値演算手段により得られた平均値と第２基準値を
比較する第２比較手段と、 該第２比較手段による比較結果に応じて前記増幅段の動
作点を調整する第２調整手段とを備えたことを特徴とす
るＢ級プッシュプル増幅回路。2. A class B push-pull amplifier circuit having a push-side and pull-side amplification stage and a push-side and pull-side output stage, and adding means for adding output currents of the push-side and pull-side amplification stages, An average value calculating means for calculating an average value of the currents obtained by adding by the adding means; a second comparing means for comparing the average value obtained by the average value calculating means with a second reference value; A class B push-pull amplifier circuit comprising: second adjusting means for adjusting an operating point of the amplifying stage according to a comparison result by the comparing means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22964994A JP3322485B2 (en) | 1994-09-26 | 1994-09-26 | Class B push-pull amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22964994A JP3322485B2 (en) | 1994-09-26 | 1994-09-26 | Class B push-pull amplifier circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0897645A true JPH0897645A (en) | 1996-04-12 |
| JP3322485B2 JP3322485B2 (en) | 2002-09-09 |
Family
ID=16895512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22964994A Expired - Lifetime JP3322485B2 (en) | 1994-09-26 | 1994-09-26 | Class B push-pull amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3322485B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5841321A (en) * | 1996-11-15 | 1998-11-24 | Mitsubishi Denki Kabushiki Kaisha | Amplifying circuit using offset value variable circuit |
| KR20010083415A (en) * | 2000-02-12 | 2001-09-01 | 김홍기 | Cross over distortion compensation circuit in a monitor |
| US6734720B2 (en) | 2001-08-20 | 2004-05-11 | Denso Corporation | Operational amplifier in which the idle current of its output push-pull transistors is substantially zero |
| US7298211B2 (en) | 2004-06-04 | 2007-11-20 | Agilent Technologies, Inc. | Power amplifying apparatus |
| JP2008306564A (en) * | 2007-06-08 | 2008-12-18 | Yokogawa Electric Corp | Power amplifier circuit |
-
1994
- 1994-09-26 JP JP22964994A patent/JP3322485B2/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5841321A (en) * | 1996-11-15 | 1998-11-24 | Mitsubishi Denki Kabushiki Kaisha | Amplifying circuit using offset value variable circuit |
| KR20010083415A (en) * | 2000-02-12 | 2001-09-01 | 김홍기 | Cross over distortion compensation circuit in a monitor |
| US6734720B2 (en) | 2001-08-20 | 2004-05-11 | Denso Corporation | Operational amplifier in which the idle current of its output push-pull transistors is substantially zero |
| US7298211B2 (en) | 2004-06-04 | 2007-11-20 | Agilent Technologies, Inc. | Power amplifying apparatus |
| JP2008306564A (en) * | 2007-06-08 | 2008-12-18 | Yokogawa Electric Corp | Power amplifier circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3322485B2 (en) | 2002-09-09 |
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