JPH0837256A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0837256A
JPH0837256A JP17385394A JP17385394A JPH0837256A JP H0837256 A JPH0837256 A JP H0837256A JP 17385394 A JP17385394 A JP 17385394A JP 17385394 A JP17385394 A JP 17385394A JP H0837256 A JPH0837256 A JP H0837256A
Authority
JP
Japan
Prior art keywords
semiconductor chip
package
heat dissipation
semiconductor device
container
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17385394A
Other languages
Japanese (ja)
Inventor
Toshiyuki Shintani
俊幸 新谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Semiconductor Package and Test Solutions Co Ltd
Original Assignee
Hitachi Hokkai Semiconductor Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Hokkai Semiconductor Ltd, Hitachi Ltd filed Critical Hitachi Hokkai Semiconductor Ltd
Priority to JP17385394A priority Critical patent/JPH0837256A/en
Publication of JPH0837256A publication Critical patent/JPH0837256A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To provide a package-shaped semiconductor device improved in heat radiating effect without changing its size. CONSTITUTION:The title semiconductor device 1 is composed of a semiconductor chip 2 mounted on a tab 3, an external lead-out lead 5, a wire 4 which connects the electrode pad (not shown in the diagram) provided on the semiconductor chip 2 and the external lead-out lead 5, and a package 6 which resin-seals the semiconductor chip 2, an inner lead and a wire 4, and a granulated or powderly heat radiating material 7 is provided on the semiconductor chip 2. The grains of powder of substance of high coefficient of thermal conductivity such as the metal powder or gold, silver, copper and the like, for example, or the metal oxide such as aluminum oxide, or a nitride such as silicon nitride is used as heat radiating material. This heat radiating material 7 is filled in a container 7a, and the material 7 is adhered to the surface of the semiconductor chip together with the container. The container 7a is also formed with the material of high coefficient of thermal conductivity. A metal plate 8 is used as the sealing material of the container 7a.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体製造分野に関す
るものであり、特にパッケージング技術に利用して有効
なものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of semiconductor manufacturing, and is particularly effective when applied to packaging technology.

【0002】[0002]

【従来の技術】半導体装置は年々高機能化されるにつ
れ、搭載されるデバイスが高速化、高周波化、高集積化
されており、それに伴い発熱量も多くなっているため、
パッケージもまた、低熱抵抗化されてきている。低熱抵
抗パッケージに関しては、例えば、特開平3−2147
63号公報第1頁右欄第8行目乃至第17行目に記載さ
れている。すなわち、モールド封入(樹脂封止型)のパ
ッケージでは、DIPタイプの放熱フィン付半導体集積
回路装置のリードフレームやSIPタイプの放熱フィン
付リードフレームがあるが、モールド封入のフラットパ
ッケージやSOPタイプのパッケージには、特に、露出
した放熱フィンのように構造的に熱をにがす技術が少な
い。
2. Description of the Related Art As the performance of semiconductor devices increases year by year, the mounted devices are becoming faster, higher in frequency, and more highly integrated.
The package has also been reduced in thermal resistance. Regarding the low thermal resistance package, for example, Japanese Patent Laid-Open No. 3-2147
No. 63, page 1, right column, line 8 to line 17. That is, in the mold-encapsulated (resin-encapsulated) package, there are a lead frame of a semiconductor integrated circuit device with a DIP type radiation fin and a lead frame with a SIP type radiation fin. In particular, there are few techniques for structurally dissipating heat such as exposed heat radiation fins.

【0003】[0003]

【発明が解決しようとする課題】上記公報のように、半
導体パッケージにおいて、放熱手段が備えられたフラッ
トパッケージの発明は種々出願されているが、図6に示
すような放熱ピンや、図7に示すような放熱板内蔵型の
パッケージでは、放熱材料の形状や熱伝導率によりその
放熱効果が左右される。特に放熱材料の形状による放熱
効果は、その表面積によって大きく変わるが、現状の放
熱ピンや放熱板を内蔵したパッケージでは、その放熱材
の表面積が限られるため、放熱効果の大幅な向上には至
っていない。また、放熱板内蔵型は、封止用樹脂による
成形が難しいという欠点もある。
As described in the above publication, various inventions have been filed for a flat package provided with a heat radiating means in a semiconductor package. However, a heat radiating pin as shown in FIG. 6 or a flat package as shown in FIG. In the package with a built-in heat dissipation plate as shown, the heat dissipation effect depends on the shape and thermal conductivity of the heat dissipation material. In particular, the heat radiation effect due to the shape of the heat radiation material varies greatly depending on the surface area, but in the current package that has built-in heat radiation pins and heat radiation plates, the surface area of the heat radiation material is limited, so the heat radiation effect has not been significantly improved. . Further, the heat sink built-in type has a drawback that molding with a sealing resin is difficult.

【0004】そこで本発明の目的は、パッケージの形
状、大きさを変更せずに放熱効果を向上させた半導体装
置を提供することにある。
Therefore, an object of the present invention is to provide a semiconductor device in which the heat dissipation effect is improved without changing the shape and size of the package.

【0005】本発明の前記並びにその他の目的と新規な
特徴は、本明細書の記述及び添付図面から明らかになる
であろう。
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【0006】[0006]

【課題を解決するための手段】本願において開示される
発明のうち代表的なものの概要を簡単に説明すれば、次
のとおりである。すなわち、半導体チップと、外部導出
用リードと、前記半導体チップの電極パッドと前記外部
導出用リードのインナーリードとを電気的に接続するワ
イヤと、前記半導体チップ、前記ワイヤ、及び前記イン
ナーリードを封止する樹脂封止体とから構成される半導
体装置であって、前記樹脂封止体中の前記半導体チップ
上には、粒状または粉状の放熱材を設けるものである。
The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows. That is, a semiconductor chip, an external lead, a wire that electrically connects an electrode pad of the semiconductor chip and an inner lead of the external lead, the semiconductor chip, the wire, and the inner lead are sealed. A semiconductor device including a resin sealing body to be stopped, wherein a granular or powdery heat dissipation material is provided on the semiconductor chip in the resin sealing body.

【0007】[0007]

【作用】半導体チップ上に、粒状または粉状の放熱材を
設けることにより、放熱材の粒子の表面が放熱面とな
り、多数の粒子によって放熱面積が大きなものとなる。
従って、パッケージ内で放熱材が占める領域を小さくし
ても、放熱面積が結果的に大きいため、放熱効果を大幅
に向上させることができる。
By providing the heat dissipating material in the form of particles or powder on the semiconductor chip, the surface of the particles of the heat dissipating material serves as a heat dissipating surface, and a large number of particles provide a large heat dissipating area.
Therefore, even if the area occupied by the heat dissipating material in the package is reduced, the heat dissipating area is consequently large, so that the heat dissipating effect can be greatly improved.

【0008】[0008]

【実施例】以下、本発明の一実施例を図面を用いて説明
する。図1(a)は、本発明の半導体装置の断面図、
(b)は、その斜視図である。半導体装置1は、アウタ
ーリードがガルウイング状に成形され、4方向へ導出し
ているQFP(Quad Flat P-ackage)タイプの半導体装
置であり、タブ3に搭載された半導体チップ2と、外部
導出リード5、半導体チップ2に設けられた電極パッド
(図示せず)と外部導出リード5とを電気的に接続する
ワイヤ4、及び半導体チップ2、インナーリード、ワイ
ヤ4を樹脂封止しているパッケージ6とから構成され
る。本発明では、半導体チップ2上に粒状または粉状の
放熱材7を設けている。放熱材7は、例えば金、銀、銅
等の金属粉末、あるいは酸化アルミニウムのような金属
酸化物、窒化珪素のような窒化物等、熱伝導率の高い物
質の粒または粉末を用いられている。この放熱材7は、
容器7aに充填されており、容器ごと半導体チップの表
面に接着されている。容器7aもまた、熱伝導率の高い
材料で形成されたものを用いる。容器7aの封止部材と
しては、金属板8を用いている。このような粒状または
粉状の放熱材を用いることにより、放熱材の粒子の表面
が放熱面となり、多数の粒子によって放熱面積が大きな
ものとなる。従って、パッケージ内で放熱材が占める領
域を小さくしても、放熱面積が結果的に大きくできるた
め、放熱効果を大幅に向上させることができる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1A is a sectional view of a semiconductor device of the present invention,
(B) is the perspective view. The semiconductor device 1 has outer lead is formed into a gull-wing shape, a derived the four directions are QFP (Q uad F lat P -ackage ) type semiconductor device, a semiconductor chip 2 mounted on the tab 3, the external The lead-out lead 5, the wire 4 for electrically connecting the electrode pad (not shown) provided on the semiconductor chip 2 to the external lead-out 5, and the semiconductor chip 2, the inner lead, and the wire 4 are resin-sealed. And a package 6. In the present invention, the heat dissipation material 7 in the form of particles or powder is provided on the semiconductor chip 2. As the heat radiating material 7, for example, particles or powder of a substance having a high thermal conductivity such as metal powder such as gold, silver, copper, metal oxide such as aluminum oxide, nitride such as silicon nitride, or the like is used. . This heat dissipation material 7 is
It is filled in the container 7a and is adhered to the surface of the semiconductor chip together with the container. The container 7a is also made of a material having high thermal conductivity. A metal plate 8 is used as a sealing member for the container 7a. By using such a granular or powdery heat dissipation material, the surface of the particles of the heat dissipation material serves as a heat dissipation surface, and a large number of particles increase the heat dissipation area. Therefore, even if the area occupied by the heat dissipating material in the package is reduced, the heat dissipating area can be increased, resulting in a significant improvement in the heat dissipating effect.

【0009】次に、半導体装置1の製造方法について説
明する。まず、図2(a)に示すように、半導体チップ
2をリードフレーム9のタブ3へボンディンングした
後、半導体チップ2上に形成された電極パッド(図示せ
ず)と、リードフレーム9のインナーリードとを金、あ
るいはアルミニウムからなるワイヤ4で電気的接続を、
周知のワイヤボンディング技術を用いて行う。その後、
容器7aに充填され、金属板8で封止された放熱材7
を、半導体チップ2上に接着する。接着の際には吸着コ
レット10を用いる。
Next, a method of manufacturing the semiconductor device 1 will be described. First, as shown in FIG. 2A, after bonding the semiconductor chip 2 to the tabs 3 of the lead frame 9, the electrode pads (not shown) formed on the semiconductor chip 2 and the inner leads of the lead frame 9 are bonded. To connect them electrically with a wire 4 made of gold or aluminum,
The known wire bonding technique is used. afterwards,
Heat dissipation material 7 filled in container 7a and sealed with metal plate 8
Are bonded onto the semiconductor chip 2. A suction collet 10 is used for adhesion.

【0010】以上のように形成された組立体は、図2
(b)に示すように、樹脂封止装置の樹脂封止用金型1
1にセットされ、周知の樹脂封止方法により、半導体チ
ップ2、ワイヤ4、インナーリード、タブ3、及び放熱
材7を熱硬化性の封止用樹脂によって封止する。樹脂封
止された組立体は、樹脂封止用金型11から外された
後、切断・成形工程において、個々の半導体装置に分離
され、アウターリードが成形されて、半導体装置が形成
される。
The assembly formed as described above is shown in FIG.
As shown in (b), a resin sealing mold 1 of a resin sealing device.
The semiconductor chip 2, the wires 4, the inner leads, the tabs 3, and the heat dissipation material 7 are set to 1 by a well-known resin sealing method and are sealed with a thermosetting sealing resin. The resin-sealed assembly is removed from the resin-sealing die 11, and then separated into individual semiconductor devices in the cutting / molding process, and the outer leads are molded to form the semiconductor device.

【0011】このような製造方法によると、放熱材を半
導体チップに接着するだけで良いので、新しく樹脂封止
用金型を設計する必要がなく、従来通りの樹脂封止用金
型を用いて放熱材内蔵の半導体装置を製造することがで
きる。
According to such a manufacturing method, since it is only necessary to bond the heat dissipation material to the semiconductor chip, it is not necessary to design a new resin sealing mold, and the conventional resin sealing mold is used. A semiconductor device with a built-in heat dissipation material can be manufactured.

【0012】以上、本発明者によって、なされた発明を
実施例に基づき具体的に説明したが、本発明は上記実施
例に限定されるものではなく、その要旨を逸脱しない範
囲で種々変更可能であることは言うまでもない。例え
ば、上記実施例では、半導体チップの上にのみ放熱材を
設けていたが、図3に示すように、タブ18の下にも同
様の放熱材23を設けると、更に放熱効率が向上する。
また、放熱材を容器を用いずにパッケージに直に設ける
場合は、図4に示すように、パッケージ32自体に凹部
33を設け、その中に放熱材30を充填し、封止テープ
31を貼り付けて放熱材30を封止する。封止テープ3
1は、熱伝導率の高い材料、例えば、銅板やアルミニウ
ム板等の金属板が好ましく、また、その面積を大きく取
ることにより、放熱材30からの熱を効率良くパッケー
ジ32の外へ放散させることができる。
Although the present invention has been specifically described by the present inventors based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say. For example, in the above-described embodiment, the heat dissipation material is provided only on the semiconductor chip, but if a similar heat dissipation material 23 is provided under the tab 18 as shown in FIG. 3, the heat dissipation efficiency is further improved.
When the heat dissipating material is provided directly on the package without using a container, as shown in FIG. 4, the recess 32 is provided in the package 32 itself, the heat dissipating material 30 is filled therein, and the sealing tape 31 is attached. Then, the heat dissipation material 30 is sealed. Sealing tape 3
1 is preferably a material having a high thermal conductivity, for example, a metal plate such as a copper plate or an aluminum plate. Also, by taking a large area, the heat from the heat dissipation material 30 can be efficiently dissipated to the outside of the package 32. You can

【0013】凹部33は、図5に示すように、凸部39
が設けられた樹脂封止用金型35に、リードフレーム3
4、半導体チップ26、ワイヤ28等からなる組立体を
セットし、封止用樹脂40を注入することにより形成さ
れる。
The concave portion 33, as shown in FIG.
The lead frame 3 is attached to the resin-sealing mold 35 provided with
4, an assembly including the semiconductor chip 26, the wires 28, and the like is set, and the sealing resin 40 is injected to form the assembly.

【0014】以下、本発明の作用効果について説明す
る。
The operation and effect of the present invention will be described below.

【0015】(1)半導体チップ上に、粒状または粉状
の放熱材を設けることにより、体積が小さい放熱材の表
面積を大幅に増加させることができる。従って、パッケ
ージの形状大きさを変更せずに放熱効果を大きく向上さ
せることができる。
(1) By providing a granular or powdery heat dissipation material on the semiconductor chip, the surface area of the heat dissipation material having a small volume can be greatly increased. Therefore, the heat radiation effect can be greatly improved without changing the shape and size of the package.

【0016】(2)放熱材に金属粉末を用いるので、熱
伝導率が高いことにより放熱効果を一層高めることがで
きる。
(2) Since metal powder is used as the heat dissipation material, the high heat conductivity can further enhance the heat dissipation effect.

【0017】(3)放熱材を容器に充填し、半導体チッ
プ上に容器ごと接着することにより、新しく樹脂封止用
金型を設計する必要がなく、従来通りの樹脂封止用金型
を用いて放熱材内蔵の半導体装置を製造することができ
る。
(3) It is not necessary to design a new resin-sealing mold by filling the container with the heat-dissipating material and adhering the container onto the semiconductor chip, and the conventional resin-sealing mold is used. Thus, a semiconductor device with a built-in heat dissipation material can be manufactured.

【0018】(4)放熱材を、パッケージに形成された
凹部に充填し、凹部の領域よりも広い面積を有する金属
板によって凹部を封止することにより、放熱材からの熱
を効率良くパッケージの外へ放散させることができる。
(4) The heat dissipation material is filled in the recess formed in the package, and the recess is sealed with a metal plate having a larger area than the area of the recess, so that the heat from the heat dissipation material can be efficiently supplied to the package. Can be dissipated outside.

【0019】(5)パッケージ内の半導体チップ上、及
びタブの裏面に、粒状または粉状の放熱材を設けたこと
により、半導体チップの上下から放熱が可能なため、さ
らに放熱効率を向上させることができる。
(5) By providing a granular or powdery heat dissipation material on the semiconductor chip in the package and on the back surface of the tab, heat can be dissipated from above and below the semiconductor chip, further improving the heat dissipation efficiency. You can

【0020】[0020]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば、下
記のとおりである。
The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

【0021】すなわち、半導体チップ上に、粒状または
粉状の放熱材を設けることにより、体積が小さい放熱材
の表面積を大幅に増加させることができる。従って、パ
ッケージの形状大きさを変更せずに放熱効果を大きく向
上させることができるものである。
That is, by providing the heat dissipating material in the form of particles or powder on the semiconductor chip, the surface area of the heat dissipating material having a small volume can be greatly increased. Therefore, the heat dissipation effect can be greatly improved without changing the shape and size of the package.

【0022】[0022]

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は、本発明の一実施例である半導体装置
の断面図、(b)は、その斜視図である。
1A is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 1B is a perspective view thereof.

【図2】(a)は、本発明の一実施例である半導体装置
の組立方法を示す図、(b)は、封止方法を示す図であ
る。
2A is a diagram showing an assembling method of a semiconductor device according to an embodiment of the present invention, and FIG. 2B is a diagram showing a sealing method.

【図3】本発明の他の実施例である半導体装置の断面図
である。
FIG. 3 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図4】本発明の他の実施例である半導体装置の断面図
である。
FIG. 4 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【図5】本発明の他の実施例である半導体装置の封止方
法を示す図である。
FIG. 5 is a diagram showing a method of sealing a semiconductor device according to another embodiment of the present invention.

【図6】従来の放熱ピン付半導体装置の断面図である。FIG. 6 is a cross-sectional view of a conventional semiconductor device with heat dissipation pins.

【図7】従来の放熱板内蔵型の半導体装置の断面図であ
る。
FIG. 7 is a cross-sectional view of a conventional semiconductor device with a built-in heat sink.

【符号の説明】[Explanation of symbols]

1……半導体装置,2……半導体チップ,3……タブ,
4……ワイヤ,5……アウターリード,6……パッケー
ジ,7……放熱材,7……容器,8……金属板,9……
リードフレーム,10……吸着コレット,11……樹脂
封止用金型,12……キャビティ,13……ゲート,1
4……ランナ,15……封止用樹脂,16……半導体装
置,17……半導体チップ,18……タブ,19……ワ
イヤ,20……アウターリード,21……放熱材,22
……金属板,23……放熱材,24……金属板,25…
…半導体装置,26……半導体チップ,27……タブ,
28……ワイヤ,29……アウターリード,30……放
熱材,31……封止テープ,32……パッケージ,33
……凹部,34……リードフレーム,35……樹脂封止
用金型,36……キャビティ,37……ゲート,38…
…ランナ,39……凸部,40……封止用樹脂,41…
…半導体装置,42……ペレット,43……アイラン
ド,44……ピン,45……ボンディングワイヤ,46
……モールド樹脂,47……放熱ピン,48……半導体
装置,49……半導体チップ,50……放熱板,51…
…アウターリード,52……ワイヤ,53……パッケー
1 ... Semiconductor device, 2 ... Semiconductor chip, 3 ... Tab,
4 ... Wire, 5 ... Outer lead, 6 ... Package, 7 ... Heat dissipation material, 7 ... Container, 8 ... Metal plate, 9 ...
Lead frame, 10 ... adsorption collet, 11 ... resin sealing mold, 12 ... cavity, 13 ... gate, 1
4 ... Runner, 15 ... Sealing resin, 16 ... Semiconductor device, 17 ... Semiconductor chip, 18 ... Tab, 19 ... Wire, 20 ... Outer lead, 21 ... Heat dissipation material, 22
…… Metal plate, 23 …… Heat dissipation material, 24 …… Metal plate, 25…
… Semiconductor device, 26 …… Semiconductor chip, 27 …… Tabs,
28 ... Wire, 29 ... Outer lead, 30 ... Heat dissipation material, 31 ... Sealing tape, 32 ... Package, 33
...... Recess, 34 ...... Lead frame, 35 ...... Resin sealing mold, 36 ...... Cavity, 37 ...... Gate, 38 ...
… Runners, 39… Projections, 40… Sealing resin, 41…
... Semiconductor device, 42 ... Pellet, 43 ... Island, 44 ... Pin, 45 ... Bonding wire, 46
...... Molding resin, 47 …… Heat dissipation pin, 48 …… Semiconductor device, 49 …… Semiconductor chip, 50 …… Semiconductor plate, 51 ・ ・ ・
… Outer lead, 52 …… Wire, 53 …… Package

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】半導体チップと、外部導出用リードと、前
記半導体チップの電極パッドと前記外部導出用リードの
インナーリードとを電気的に接続するワイヤと、前記半
導体チップ、前記ワイヤ、及び前記インナーリードを封
止するパッケージとから構成される半導体装置であっ
て、前記パッケージ内の前記半導体チップ上には、粒状
または粉状の放熱材を設けたことを特徴とする半導体装
置。
1. A semiconductor chip, an external lead, a wire electrically connecting an electrode pad of the semiconductor chip and an inner lead of the external lead, the semiconductor chip, the wire, and the inner. What is claimed is: 1. A semiconductor device comprising a package for encapsulating leads, wherein a granular or powdery heat dissipation material is provided on the semiconductor chip in the package.
【請求項2】前記放熱材は、金属粉末であることを特徴
とする請求項1記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the heat dissipation material is a metal powder.
【請求項3】前記放熱材は容器に充填されており、前記
半導体チップ上に容器ごと接着されていることを特徴と
する請求項1又は2記載の半導体装置。
3. The semiconductor device according to claim 1, wherein the heat dissipation material is filled in a container and is adhered to the semiconductor chip together with the container.
【請求項4】前記放熱材は、前記パッケージに形成され
た凹部に充填され、該凹部の領域よりも広い面積を有す
る金属板によって前記凹部を封止してなることを特徴と
する請求項1または2記載の半導体装置。
4. The heat dissipation material is filled in a recess formed in the package, and the recess is sealed with a metal plate having a larger area than the area of the recess. Alternatively, the semiconductor device according to item 2.
【請求項5】半導体チップと、該半導体チップが接着さ
れているタブと、外部導出用リードと、前記半導体チッ
プの電極パッドと前記外部導出用リードのインナーリー
ドとを電気的に接続するワイヤと、前記半導体チップ、
前記タブ、前記ワイヤ、及び前記インナーリードを封止
するパッケージとから構成される半導体装置であって、
前記パッケージ内の前記半導体チップ上、及び前記タブ
の裏面には、粒状または粉状の放熱材を設けたことを特
徴とする半導体装置。
5. A semiconductor chip, a tab to which the semiconductor chip is bonded, an external lead, and a wire for electrically connecting an electrode pad of the semiconductor chip and an inner lead of the external lead. , The semiconductor chip,
A semiconductor device comprising a package encapsulating the tab, the wire, and the inner lead,
A semiconductor device characterized in that a granular or powdery heat dissipation material is provided on the semiconductor chip in the package and on the back surface of the tab.
JP17385394A 1994-07-26 1994-07-26 Semiconductor device Pending JPH0837256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17385394A JPH0837256A (en) 1994-07-26 1994-07-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17385394A JPH0837256A (en) 1994-07-26 1994-07-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0837256A true JPH0837256A (en) 1996-02-06

Family

ID=15968371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17385394A Pending JPH0837256A (en) 1994-07-26 1994-07-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0837256A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120133039A1 (en) * 2010-11-29 2012-05-31 Stmicroelectronics (Grenoble 2) Sas Semiconductor package with thermal via and method of fabrication
JP2012151172A (en) * 2011-01-17 2012-08-09 Fujitsu Ltd Semiconductor device and manufacturing method of the same
CN102711551A (en) * 2009-10-27 2012-10-03 欧莱雅 A device including an applicator for applying a cosmetic or care-product composition
JP2014107384A (en) * 2012-11-27 2014-06-09 Mitsubishi Electric Corp Semiconductor device and semiconductor device manufacturing method
JP2017168486A (en) * 2016-03-14 2017-09-21 日本電気株式会社 Electronic apparatus and manufacturing method for the same
KR20210062698A (en) * 2019-01-22 2021-05-31 양쯔 메모리 테크놀로지스 씨오., 엘티디. Integrated circuit packaging structure and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102711551A (en) * 2009-10-27 2012-10-03 欧莱雅 A device including an applicator for applying a cosmetic or care-product composition
US20120133039A1 (en) * 2010-11-29 2012-05-31 Stmicroelectronics (Grenoble 2) Sas Semiconductor package with thermal via and method of fabrication
FR2968126A1 (en) * 2010-11-29 2012-06-01 St Microelectronics Grenoble 2 THERMAL VIA SEMICONDUCTOR HOUSING AND METHOD OF MANUFACTURING
JP2012151172A (en) * 2011-01-17 2012-08-09 Fujitsu Ltd Semiconductor device and manufacturing method of the same
JP2014107384A (en) * 2012-11-27 2014-06-09 Mitsubishi Electric Corp Semiconductor device and semiconductor device manufacturing method
JP2017168486A (en) * 2016-03-14 2017-09-21 日本電気株式会社 Electronic apparatus and manufacturing method for the same
KR20210062698A (en) * 2019-01-22 2021-05-31 양쯔 메모리 테크놀로지스 씨오., 엘티디. Integrated circuit packaging structure and manufacturing method thereof

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