JPH08316212A - Plasma treatment method and plasma treatment device - Google Patents

Plasma treatment method and plasma treatment device

Info

Publication number
JPH08316212A
JPH08316212A JP12334895A JP12334895A JPH08316212A JP H08316212 A JPH08316212 A JP H08316212A JP 12334895 A JP12334895 A JP 12334895A JP 12334895 A JP12334895 A JP 12334895A JP H08316212 A JPH08316212 A JP H08316212A
Authority
JP
Japan
Prior art keywords
electrode
wafer
wafer mounting
plasma processing
outer peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12334895A
Other languages
Japanese (ja)
Inventor
Seiichi Watanabe
成一 渡辺
Muneo Furuse
宗雄 古瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12334895A priority Critical patent/JPH08316212A/en
Publication of JPH08316212A publication Critical patent/JPH08316212A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To make uniform the energy of ions to be applid to a wafer within a wafer surface by dividing the electrode surface of a wafer-placement part into a plurality of electrically insulated regions and connecting an element for impedance matching to each region. CONSTITUTION: An electrode 9a where a high-frequency voltage is applied is provided on an electrode stage 9c which is grounded via an insulation material 9b. Each of the electrode 9a which is divided into center and outer-periphery parts where variable capacitors 13 (Capacitors C1 and C2 ) are connected is connected to a high-frequency electrode 12 via a machining device 11. By changing the ratio of the capacitances C1 and C2 of the two variable capacitors 13, the ratio of high-frequency power to be supplied to the electrodes 9a at the center and outer-periphery parts can be changed, thus making uniform the energy of ions to be applied to the wafer within the wafer surface and performing a more uniform plasma treatment.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、プラズマ処理装置に係
り、特に半導体素子基板等の試料をプラズマを利用して
エッチング処理、成膜処理するのに好適なプラズマ処理
方法及びプラズマ処理装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus, and more particularly to a plasma processing method and a plasma processing apparatus suitable for etching or film-forming a sample such as a semiconductor element substrate using plasma. Is.

【0002】[0002]

【従来の技術】従来のプラズマ処理装置は、例えば、特
開平4−079219号公報に記載のように、ウエハ載
置用電極は、単に整合器を介して高周波電源が接続され
ていた。また、ウエハ載置用電極は、電極面が電気的に
絶縁された複数の領域に分割されることなく、単一の電
極面で構成されており、また電極面も全面に渡ってほぼ
平坦な構成をしており、ウエハと電極間のインピーダン
スは、電極の中央部と外周部でほぼ等しくなるように構
成されていた。
2. Description of the Related Art In a conventional plasma processing apparatus, for example, as described in Japanese Patent Application Laid-Open No. 4-079219, a wafer mounting electrode is simply connected to a high frequency power source through a matching unit. Further, the wafer-mounting electrode is composed of a single electrode surface without being divided into a plurality of regions where the electrode surface is electrically insulated, and the electrode surface is substantially flat over the entire surface. The impedance between the wafer and the electrode is set to be substantially equal in the central portion and the outer peripheral portion of the electrode.

【0003】[0003]

【発明が解決しようとする課題】上記従来技術は、ウエ
ハに入射するイオンのエネルギーがウエハの中央部と外
周部で異なる点については考慮されていなかった。一様
な電極面に整合器を介して高周波電源を接続した場合、
ウエハ中央部に比較して、ウエハ中央部より外周部に入
射するイオンの方が高エネルギーを有しており、その結
果、均一なプラズマを生成しても、プラズマ処理速度は
ウエハ中央部と外周部で異なるという問題点があった。
The above-mentioned prior art has not taken into consideration that the energy of the ions incident on the wafer is different between the central portion and the outer peripheral portion of the wafer. When a high frequency power source is connected to a uniform electrode surface via a matching unit,
Ions having higher energy than the central part of the wafer have higher energy than those in the central part of the wafer. As a result, even if uniform plasma is generated, the plasma processing speed is higher than that of the central part of the wafer. There was a problem that the departments were different.

【0004】本発明は、ウエハを均一にプラズマ処理す
ることが可能なプラズマ処理方法及びプラズマ処理装置
を提供することを目的とする。
An object of the present invention is to provide a plasma processing method and a plasma processing apparatus capable of uniformly plasma processing a wafer.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、ウエハ載置部の電極面を電気的に絶縁された複数の
領域に分割し、その各々の領域にインピーダンス整合用
素子を接続したものである。あるいは、ウエハ載置部の
電極面に凹部を設け、電極の中央部と外周部で、ウエハ
と電極間のインピーダンスが異なるように構成したもの
である。
In order to achieve the above object, the electrode surface of the wafer mounting portion is divided into a plurality of electrically insulated regions, and an impedance matching element is connected to each of the regions. It is a thing. Alternatively, a concave portion is provided on the electrode surface of the wafer mounting portion so that the impedance between the wafer and the electrode is different between the central portion and the outer peripheral portion of the electrode.

【0006】[0006]

【作用】ウエハ載置部の電極面を電気的に絶縁された複
数の領域に分割し、その各々の領域にインピーダンス整
合用素子を接続することにより、電気的に絶縁された複
数の領域の各々に投入する高周波電力の割合を変更する
ことができる。このため、ウエハに入射するイオンのエ
ネルギーをウエハ面内で均一にすることができるので、
より均一なプラズマ処理をすることが可能である。
By dividing the electrode surface of the wafer mounting portion into a plurality of electrically insulated regions and connecting an impedance matching element to each of the regions, each of the plurality of electrically insulated regions is divided. It is possible to change the ratio of the high frequency power supplied to the. Therefore, the energy of the ions incident on the wafer can be made uniform within the wafer surface.
It is possible to perform more uniform plasma treatment.

【0007】また、ウエハ載置部の電極面に凹部を設
け、電極の中央部と外周部で、ウエハと電極間のインピ
ーダンスが異なるように構成することにより、中央部と
外周部に投入する高周波電力の割合を変更することがで
きる。このため、前述と同様に、ウエハに入射するイオ
ンのエネルギーをウエハ面内で均一にすることができる
ので、より均一なプラズマ処理をすることが可能であ
る。
Further, by providing a concave portion on the electrode surface of the wafer mounting portion so that the impedance between the wafer and the electrode is different between the central portion and the outer peripheral portion of the electrode, the high frequency applied to the central portion and the outer peripheral portion. The power percentage can be changed. Therefore, similar to the above, since the energy of the ions incident on the wafer can be made uniform within the wafer surface, more uniform plasma processing can be performed.

【0008】[0008]

【実施例】以下、本発明の一実施例を図1乃至図3によ
り説明する。図1は、本発明を適用する有磁場マイクロ
波ドライエッチング装置を示すが、ウエハ載置用電極は
従来タイプのものを示している。図2は、本発明の一実
施例であるウエハ載置用電極の電極面を上部より見た図
であり、図3は、図2のウエハ載置用電極の縦断面図で
ある。まず図1により、有磁場マイクロ波エッチング装
置の構成とその作用について述べる。図1において、容
器1a、放電管1bおよび石英窓2で区画された処理室
1の内部を真空排気装置(図示省略)により減圧した
後、ガス供給装置(図示省略)によりエッチングガスを
処理室1内に導入し、所望の圧力に調整する。また処理
室1は、コイル3により生成される磁場領域内にある。
マグネトロン4より発した、この場合、2.45GHz
のマイクロ波は、導波管5a、5b内を伝播し、共振器
6内に導入される。共振器6の底面にはスロットアンテ
ナ7が設けられている。スロットアンテナ7より放射さ
れたマイクロ波は、導波管8内を伝播し、石英窓2を透
過して処理室1内に入射される。このマイクロ波によっ
て生成されたプラズマにより、ウエハ載置用電極9に載
置されたウエハ10がエッチング処理される。またウエ
ハ10のエッチング形状を制御するため、ウエハ載置用
電極9の電極9aには整合器11を介して高周波電源1
2が接続され、高周波電圧が印加されている。図2は、
本発明の第1の実施例であるウエハ載置用電極の電極面
を上図より見た図であり、図2において、電極9aは、
中央部と外周部に2分割されている。図3は、本発明の
第1の実施例であるウエハ載置用電極の縦断面図であ
る。高周波電圧が印加される電極9aは絶縁材9bを介
して、接地されている電極台9c上に設けられている。
中央部と外周部に2分割された電極9aの各々は、可変
コンデンサ13(容量C1、C2)が接続され、整合器1
1を介して高周波電源12に接続されている。この2つ
の可変コンデンサ13の容量C1と容量C2の比を変更す
ることにより、中央部と外周部の電極9aに供給される
高周波電力の比を変更することができる。このため、ウ
エハに入射するイオンのエネルギーをウエハ面内で均一
にすることができるので、より均一なプラズマ処理をす
ることが可能であるという効果がある。本実施例では電
極9aに可変コンデンサ13を接続したが、可変コンデ
ンサ13のかわりに、コンデンサ、コイル、抵抗等の回
路から成るインピーダンス整合用素子を用いてもよい。
本実施例の場合は、中央部と外周部の面積が等しくなる
よう電極9aを2分割したが、分割の比率は、均一なプ
ラズマ処理が可能となるよう任意に決めてよい。また電
極9aの分割数も3以上複数にしてもよい。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows a magnetic field microwave dry etching apparatus to which the present invention is applied, but the wafer mounting electrodes are of a conventional type. 2 is a view of an electrode surface of a wafer mounting electrode according to an embodiment of the present invention seen from above, and FIG. 3 is a vertical cross-sectional view of the wafer mounting electrode of FIG. First, the configuration and operation of the magnetic field microwave etching apparatus will be described with reference to FIG. In FIG. 1, after decompressing the inside of the processing chamber 1 partitioned by the container 1a, the discharge tube 1b and the quartz window 2 by a vacuum exhaust device (not shown), an etching gas is supplied by the gas supply device (not shown). Introduce into and adjust to desired pressure. The processing chamber 1 is in the magnetic field region generated by the coil 3.
Emitted from magnetron 4, in this case 2.45 GHz
The microwave propagates through the waveguides 5a and 5b and is introduced into the resonator 6. A slot antenna 7 is provided on the bottom surface of the resonator 6. The microwave radiated from the slot antenna 7 propagates in the waveguide 8, passes through the quartz window 2 and enters the processing chamber 1. The plasma generated by the microwave etches the wafer 10 placed on the wafer placing electrode 9. Further, in order to control the etching shape of the wafer 10, the high frequency power supply 1 is connected to the electrode 9a of the wafer mounting electrode 9 via the matching unit 11.
2 is connected and a high frequency voltage is applied. Figure 2
It is the figure which looked at the electrode surface of the wafer mounting electrode which is the 1st Example of the present invention from the above figure, and in FIG.
It is divided into a central part and an outer peripheral part. FIG. 3 is a vertical sectional view of a wafer mounting electrode according to the first embodiment of the present invention. The electrode 9a to which the high frequency voltage is applied is provided on the electrode base 9c which is grounded via the insulating material 9b.
A variable capacitor 13 (capacitances C 1 and C 2 ) is connected to each of the electrodes 9a divided into the central portion and the outer peripheral portion, and the matching unit 1
It is connected to the high frequency power source 12 via 1. By changing the ratio of the capacitances C 1 and C 2 of the two variable capacitors 13, the ratio of the high frequency power supplied to the electrode 9a in the central portion and the outer peripheral portion can be changed. Therefore, since the energy of the ions incident on the wafer can be made uniform within the wafer surface, there is an effect that more uniform plasma processing can be performed. Although the variable capacitor 13 is connected to the electrode 9a in this embodiment, an impedance matching element including a circuit such as a capacitor, a coil, and a resistor may be used instead of the variable capacitor 13.
In the case of the present embodiment, the electrode 9a is divided into two so that the areas of the central portion and the outer peripheral portion are equal, but the division ratio may be arbitrarily determined so that uniform plasma processing can be performed. The number of divisions of the electrode 9a may be three or more.

【0009】以上本実施例によれば、ウエハ載置部の電
極面を電気的に絶縁された複数の領域に分割し、その各
々の領域にインピーダンス整合用素子を接続したことに
より、分割された電極面に供給される高周波電力の比を
変更でき、その結果ウエハに入射するイオンのエネルギ
ーをウエハ面内で均一にすることができるので、より均
一なプラズマ処理をすることが可能であるという効果が
ある。
As described above, according to the present embodiment, the electrode surface of the wafer mounting portion is divided into a plurality of electrically insulated regions, and the impedance matching element is connected to each of the regions, so that the electrodes are divided. The ratio of the high frequency power supplied to the electrode surface can be changed, and as a result, the energy of the ions incident on the wafer can be made uniform within the wafer surface, so that more uniform plasma processing can be performed. There is.

【0010】次に、本発明の第2の実施例を図4を用い
て説明する。本実施例では、中央部と外周部に分割され
た電極9aの各々に1つずつ整合器11が接続され、そ
して、その2つの整合器11に高周波電源12が1つ接
続されている。本実施例においても、中央部と外周部に
分割された各々の電極9aに供給される高周波電力の比
率を2つの整合器11によって変更できるので、第1の
実施例と同様の効果がある。
Next, a second embodiment of the present invention will be described with reference to FIG. In the present embodiment, one matching device 11 is connected to each of the electrodes 9a divided into the central part and the outer peripheral part, and one high frequency power supply 12 is connected to the two matching devices 11. Also in this embodiment, since the ratio of the high frequency power supplied to each of the electrodes 9a divided into the central portion and the outer peripheral portion can be changed by the two matching units 11, the same effect as the first embodiment can be obtained.

【0011】次に、本発明の第3の実施例を図5を用い
て説明する。本実施例では、電極9aは1つで構成され
ているが、ウエハ載置部の電極面の凹部を設け、電極9
aの中央部と外周部で、ウエハ10と電極9a間のイン
ピーダンスが異なるよう構成されている。つまり、図5
に示すように、電極9aの中央部に比較して外周部の方
が凹部の面積の割合が大きくなるよう構成されている。
ウエハ10と電極9a間の容量 と電極9aとの距離である。凹部の面積比率により平均
的な距離dが決まる。一方、インピーダンスは容量成分
のみを考えた場合1/ωcで決まる。ここでωは高周波
電源の角周波数である。したがって、本実施例のように
電極9aの中央部に比較して外周部の方が凹部の面積の
割合が大きくなるよう構成した場合、外周部の方が容量
が小さく、そのため、インピーダンスは小さくなる。
Next, a third embodiment of the present invention will be described with reference to FIG. In this embodiment, the number of the electrodes 9a is one, but a recess is formed in the electrode surface of the wafer mounting portion to form the electrodes 9a.
The impedance between the wafer 10 and the electrode 9a is different between the central portion and the outer peripheral portion of a. That is, FIG.
As shown in FIG. 5, the outer peripheral portion is configured such that the ratio of the area of the concave portion is larger than that of the central portion of the electrode 9a.
Capacitance between wafer 10 and electrode 9a And the electrode 9a. The average distance d is determined by the area ratio of the recesses. On the other hand, the impedance is determined by 1 / ωc when only the capacitance component is considered. Here, ω is the angular frequency of the high frequency power supply. Therefore, when the outer peripheral portion is configured such that the ratio of the area of the concave portion is larger than that of the central portion of the electrode 9a as in the present embodiment, the outer peripheral portion has a smaller capacitance, and therefore the impedance becomes smaller. .

【0012】以上本実施例によれば、ウエハ載置部の電
極面に凹部を設け、電極の中央部と外周部で、ウエハと
電極間のインピーダンスを異なるようにできるので、電
極の中央部と外周部で供給される高周波電力の比を変更
でき、その結果第1の実施例と同様の効果がある。
As described above, according to the present embodiment, since the concave portion is provided on the electrode surface of the wafer mounting portion and the impedance between the wafer and the electrode can be made different between the central portion and the outer peripheral portion of the electrode, The ratio of the high frequency power supplied in the outer peripheral portion can be changed, and as a result, the same effect as in the first embodiment can be obtained.

【0013】次に、本発明の第4の実施例を図6を用い
て説明する。本実施例では、ウエハ載置部の電極面に設
けられた凹部の深さを、電極9aの中央部と外周部で異
なるよう構成している。このため、電極9aの中央部と
外周部で、前述と同様に平均的な距離dが異なるため、
容量が異なり、その結果インピーダンスが異なる。以上
本実施例によれば、電極の中央部と外周部で、ウエハ1
0と電極間のインピーダンスを異なるようにできるの
で、電極9aの中央部と外周部で供給される高周波電力
の比を変更でき、その結果第1の実施例と同様の効果が
ある。
Next, a fourth embodiment of the present invention will be described with reference to FIG. In the present embodiment, the depth of the recess provided on the electrode surface of the wafer mounting portion is different between the central portion and the outer peripheral portion of the electrode 9a. Therefore, since the average distance d is different between the central portion and the outer peripheral portion of the electrode 9a as described above,
The capacities differ, resulting in different impedances. As described above, according to the present embodiment, the wafer 1 is formed at the central portion and the outer peripheral portion of the electrode.
Since the impedance between 0 and the electrodes can be made different, the ratio of the high frequency power supplied between the central portion and the outer peripheral portion of the electrode 9a can be changed, and as a result, the same effect as that of the first embodiment can be obtained.

【0014】次に、本発明の第5の実施例を図7を用い
て説明する。本実施例では、図5に示す第3の実施例の
電極面上に誘電体14を設けたものである。誘電体14
を設けることにより、ウエハ10と電極9a間の容量を
大きくすることができる。したがって、本実施例によれ
ば、第5の実施例の効果に加えて、電極面に構成する凹
部の深さを小さくしても、インピーダンスを変更するこ
とができるという効果がある。
Next, a fifth embodiment of the present invention will be described with reference to FIG. In this embodiment, the dielectric 14 is provided on the electrode surface of the third embodiment shown in FIG. Dielectric 14
By providing, the capacitance between the wafer 10 and the electrode 9a can be increased. Therefore, according to the present embodiment, in addition to the effect of the fifth embodiment, there is an effect that the impedance can be changed even if the depth of the concave portion formed on the electrode surface is reduced.

【0015】また上記各実施例では、有磁場マイクロ波
ドライエッチング装置について述べたが、その他のマイ
クロ波を利用したドライエッチング装置、プラズマCV
D装置、アッシング装置等のプラズマ処理装置について
も、同様の作用効果が得られる。
Further, in each of the above embodiments, the magnetic field microwave dry etching apparatus has been described. However, other dry etching apparatuses using microwaves and plasma CV are used.
The same action and effect can be obtained also in the plasma processing apparatus such as the D apparatus and the ashing apparatus.

【0016】[0016]

【発明の効果】以上本発明によれば、ウエハ載置部の電
極面を電気的に絶縁された複数の領域に分割し、その各
々の領域にインピーダンス整合用素子を接続することに
より、電気的に絶縁された複数の領域の各々に投入する
高周波電力の割合を変更することができる。このため、
ウエハに入射するイオンのエネルギーをウエハ面内で均
一にすることができるので、より均一なプラズマ処理を
することができるという効果がある。
As described above, according to the present invention, the electrode surface of the wafer mounting portion is divided into a plurality of electrically insulated regions, and an impedance matching element is connected to each of the regions to electrically connect the regions. It is possible to change the ratio of the high frequency power supplied to each of the plurality of regions insulated from each other. For this reason,
Since the energy of the ions incident on the wafer can be made uniform within the wafer surface, there is an effect that more uniform plasma processing can be performed.

【0017】また、ウエハ載置部の電極面に凹部を設
け、電極の中央部と外周部で、ウエハと電極間のインピ
ーダンスが異なるよう構成にすることにより、中央部と
外周部に投入する高周波電力の割合を変更することがで
きる。このため、前述と同様に、ウエハに入射するイオ
ンのエネルギーをウエハ面内で均一にすることができる
ので、より均一なプラズマ処理をすることができるとい
う効果がある。
Further, by providing a concave portion on the electrode surface of the wafer mounting portion so that the impedance between the wafer and the electrode is different between the central portion and the outer peripheral portion of the electrode, the high frequency applied to the central portion and the outer peripheral portion is increased. The power percentage can be changed. Therefore, similar to the above, since the energy of the ions incident on the wafer can be made uniform within the wafer surface, there is an effect that more uniform plasma processing can be performed.

【図面の簡単な説明】[Brief description of drawings]

【図1】有磁場マイクロ波エッチング装置の処理室部の
縦断面図である。
FIG. 1 is a vertical cross-sectional view of a processing chamber portion of a magnetic field microwave etching apparatus.

【図2】本発明の第1の実施例のウエハ載置用電極を上
部よりみた説明図である。
FIG. 2 is an explanatory view of the wafer mounting electrode according to the first embodiment of the present invention as viewed from above.

【図3】本発明の第1の実施例のウエハ載置用電極の縦
断面図である。
FIG. 3 is a vertical cross-sectional view of a wafer mounting electrode according to the first embodiment of the present invention.

【図4】本発明の第2の実施例のウエハ載置用電極の縦
断面図である。
FIG. 4 is a vertical cross-sectional view of a wafer mounting electrode according to a second embodiment of the present invention.

【図5】本発明の第3の実施例のウエハ載置用電極の縦
断面図である。
FIG. 5 is a vertical sectional view of a wafer mounting electrode according to a third embodiment of the present invention.

【図6】本発明の第4の実施例のウエハ載置用電極の縦
断面図である。
FIG. 6 is a vertical sectional view of a wafer mounting electrode according to a fourth embodiment of the present invention.

【図7】本発明の第5の実施例のウエハ載置用電極の縦
断面図である。
FIG. 7 is a vertical sectional view of a wafer mounting electrode according to a fifth embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…処理室、2…石英窓、3…コイル、4…マグネトロ
ン、5…導波管、6…共振器、7…スロットアンテナ、
8…導波管、9…ウエハ載置用電極、10…ウエハ、1
1…整合器、12…高周波電源、13…可変コンデン
サ、14…誘電体。
1 ... Processing chamber, 2 ... Quartz window, 3 ... Coil, 4 ... Magnetron, 5 ... Waveguide, 6 ... Resonator, 7 ... Slot antenna,
8 ... Waveguide, 9 ... Wafer mounting electrode, 10 ... Wafer, 1
1 ... Matching device, 12 ... High frequency power supply, 13 ... Variable capacitor, 14 ... Dielectric material.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】プラズマ発生装置と、減圧可能な処理室
と、ガス供給装置と、真空排気装置と、ウエハ載置用電
極と、より成るプラズマ処理装置により、ウエハを処理
するプラズマ処理装置であって、前記ウエハ載置部の電
極面を電気的に絶縁された複数の領域に分割し、その各
々の領域のインピーダンスを制御することを特徴とする
プラズマ処理方法。
1. A plasma processing apparatus for processing a wafer by a plasma processing apparatus comprising a plasma generator, a decompressible processing chamber, a gas supply device, a vacuum exhaust device, and a wafer mounting electrode. The plasma processing method is characterized in that the electrode surface of the wafer mounting portion is divided into a plurality of electrically insulated regions, and the impedance of each region is controlled.
【請求項2】プラズマ発生装置と、減圧可能な処理室
と、ガス供給装置と、真空排気装置と、ウエハ載置用電
極と、より成るプラズマ処理装置において、前記ウエハ
載置部の電極面を電気的に絶縁された複数の領域に分割
し、その各々の領域にインピーダンス整合用素子を接続
したことを特徴とするプラズマ処理装置。
2. A plasma processing apparatus comprising a plasma generator, a decompressible processing chamber, a gas supply device, a vacuum exhaust device, and a wafer mounting electrode, wherein the electrode surface of the wafer mounting portion is A plasma processing apparatus, characterized in that it is divided into a plurality of electrically insulated regions, and an impedance matching element is connected to each of the regions.
【請求項3】プラズマ発生装置と、減圧可能な処理室
と、ガス供給装置と、真空排気装置と、ウエハ載置用電
極と、より成るプラズマ処理装置において、前記ウエハ
載置部の電極に凹部を設け、電極の中央部と外周部と
で、ウエハと電極間とにインピーダンスが異なるように
構成したことを特徴とするプラズマ処理装置。
3. A plasma processing apparatus comprising a plasma generator, a processing chamber capable of decompressing, a gas supply device, a vacuum exhaust device, and a wafer mounting electrode, wherein a recess is formed in the electrode of the wafer mounting portion. The plasma processing apparatus is characterized in that the impedance is different between the wafer and the electrode between the central portion and the outer peripheral portion of the electrode.
JP12334895A 1995-05-23 1995-05-23 Plasma treatment method and plasma treatment device Pending JPH08316212A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12334895A JPH08316212A (en) 1995-05-23 1995-05-23 Plasma treatment method and plasma treatment device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12334895A JPH08316212A (en) 1995-05-23 1995-05-23 Plasma treatment method and plasma treatment device

Publications (1)

Publication Number Publication Date
JPH08316212A true JPH08316212A (en) 1996-11-29

Family

ID=14858348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12334895A Pending JPH08316212A (en) 1995-05-23 1995-05-23 Plasma treatment method and plasma treatment device

Country Status (1)

Country Link
JP (1) JPH08316212A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6649021B2 (en) 2000-08-25 2003-11-18 Hitachi, Ltd. Apparatus and method for plasma processing high-speed semiconductor circuits with increased yield
JP2007103622A (en) * 2005-10-04 2007-04-19 Hitachi High-Technologies Corp Plasma processing method and apparatus
US7288166B2 (en) 2000-03-01 2007-10-30 Hitachi, Ltd. Plasma processing apparatus
JP2013055165A (en) * 2011-09-01 2013-03-21 Hitachi Kokusai Electric Inc Substrate processing device and manufacturing method of semiconductor device
WO2014149259A1 (en) * 2013-03-15 2014-09-25 Applied Materials, Inc. Apparatus and method for tuning a plasma profile using a tuning ring in a processing chamber
US10032608B2 (en) 2013-03-27 2018-07-24 Applied Materials, Inc. Apparatus and method for tuning electrode impedance for high frequency radio frequency and terminating low frequency radio frequency to ground

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7288166B2 (en) 2000-03-01 2007-10-30 Hitachi, Ltd. Plasma processing apparatus
US7608162B2 (en) 2000-03-01 2009-10-27 Hitachi, Ltd. Plasma processing apparatus and method
US6649021B2 (en) 2000-08-25 2003-11-18 Hitachi, Ltd. Apparatus and method for plasma processing high-speed semiconductor circuits with increased yield
US6867144B2 (en) 2000-08-25 2005-03-15 Hitachi, Ltd. Apparatus and method for plasma processing high-speed semiconductor circuits with increased yield
JP2007103622A (en) * 2005-10-04 2007-04-19 Hitachi High-Technologies Corp Plasma processing method and apparatus
JP4550710B2 (en) * 2005-10-04 2010-09-22 株式会社日立ハイテクノロジーズ Plasma processing method and apparatus
JP2013055165A (en) * 2011-09-01 2013-03-21 Hitachi Kokusai Electric Inc Substrate processing device and manufacturing method of semiconductor device
WO2014149259A1 (en) * 2013-03-15 2014-09-25 Applied Materials, Inc. Apparatus and method for tuning a plasma profile using a tuning ring in a processing chamber
CN105190843A (en) * 2013-03-15 2015-12-23 应用材料公司 Apparatus and method for tuning a plasma profile using a tuning ring in a processing chamber
US10032608B2 (en) 2013-03-27 2018-07-24 Applied Materials, Inc. Apparatus and method for tuning electrode impedance for high frequency radio frequency and terminating low frequency radio frequency to ground

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