JPH08213508A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH08213508A JPH08213508A JP7020008A JP2000895A JPH08213508A JP H08213508 A JPH08213508 A JP H08213508A JP 7020008 A JP7020008 A JP 7020008A JP 2000895 A JP2000895 A JP 2000895A JP H08213508 A JPH08213508 A JP H08213508A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- semiconductor chip
- heat dissipation
- package body
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、セラミック等からなる
パッケージ本体に半導体チップを実装してなる半導体装
置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor chip is mounted on a package body made of ceramic or the like.
【０００２】[0002]
【従来の技術】図４は従来における半導体装置の一例を
示す概略断面図である。図示した半導体装置５０におい
て、５１はパッケージ本体、５２はパッケージ本体５１
に実装された半導体チップ（半導体素子）、５３はパッ
ケージ本体５１の電極部（不図示）と半導体チップ５２
の電極部とを接続するボンディングワイヤ、５４はパッ
ケージ本体５１内に半導体チップ５２を封止するための
キャップ（蓋）、５５はパッケージ本体５１の外部電極
上にマウントされたはんだボールである。この種の半導
体装置５０は、多ピン化への対応策として、パッケージ
本体５１の底面に球状のはんだボール５５が２次元のア
レイ状に配置されていることから、ＢＧＡ（ボール・グ
リッド・アレイ）と呼ばれており、プリント基板等に対
してははんだボール５５を入出力端子として実装され
る。2. Description of the Related Art FIG. 4 is a schematic sectional view showing an example of a conventional semiconductor device. In the illustrated semiconductor device 50, 51 is a package body, and 52 is a package body 51.
The semiconductor chip (semiconductor element) 53 mounted on the semiconductor chip 53 is an electrode portion (not shown) of the package body 51 and the semiconductor chip 52.
Is a bonding wire for connecting to the electrode portion of the package, 54 is a cap (lid) for sealing the semiconductor chip 52 in the package body 51, and 55 is a solder ball mounted on an external electrode of the package body 51. In this type of semiconductor device 50, spherical solder balls 55 are arranged in a two-dimensional array on the bottom surface of the package body 51 as a measure for increasing the number of pins, so that a BGA (ball grid array) is used. The solder balls 55 are mounted as input / output terminals on a printed circuit board or the like.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら上記従来
の半導体装置５０では、半導体チップ５２で発生した熱
の殆どがチップ裏面（図中下面）側からパッケージ本体
５１を経由してキャップ５４から外部に放散される構造
となっているため、伝熱経路が長くなるうえにパッケー
ジ本体５１の側壁部分では伝熱経路が狭くなり、半導体
チップ５２の熱を効率良く外部に逃がすことが出来なか
った。このため、高電力を消費する電源用ＩＣや高速、
高集積ＩＣ（例えば、パーソナルコンピュータのＣＰＵ
を担うＩＣ）として機能する半導体チップ５２を、多ピ
ン化対応のパッケージ構造に採用するにはパッケージ全
体の放熱性を高める必要があった。そこで従来において
は、パッケージ本体５１にヒートシンク（不図示）を取
り付けて放熱性を高める試みもなされているが、この場
合は、十分な放熱効果を得るのに放熱面積を広く確保し
た大型のヒートシンクを採用する必要があり、これによ
ってパッケージ全体が大型化し、実装時にスペース的な
制約が生じるという新たな問題が生じていた。However, in the conventional semiconductor device 50 described above, most of the heat generated in the semiconductor chip 52 is dissipated to the outside from the cap 54 via the package body 51 from the chip back surface (lower surface in the drawing). Since the heat transfer path is long, the heat transfer path is narrow in the side wall portion of the package body 51, and the heat of the semiconductor chip 52 cannot be efficiently released to the outside. Therefore, power supply ICs that consume high power, high speed,
Highly integrated IC (for example, CPU of personal computer
In order to adopt the semiconductor chip 52 functioning as an IC (for carrying out) in a package structure compatible with a large number of pins, it is necessary to improve the heat dissipation of the entire package. Therefore, in the related art, it has been attempted to attach a heat sink (not shown) to the package body 51 to improve heat dissipation, but in this case, a large heat sink having a large heat dissipation area secured in order to obtain a sufficient heat dissipation effect. It is necessary to adopt it, and this causes a new problem that the entire package becomes large and space limitation occurs at the time of mounting.
【０００４】本発明は、上記問題を解決するためになさ
れたもので、その目的とするところは、半導体チップで
発生した熱をきわめて効率良く外部に逃がすことができ
る半導体装置を提供することにある。The present invention has been made in order to solve the above problems, and an object of the present invention is to provide a semiconductor device capable of radiating heat generated in a semiconductor chip to the outside extremely efficiently. .
【０００５】[0005]
【課題を解決するための手段】請求項１記載の半導体装
置は、外部電極が形成された外部電極形成面と反対側の
面をチップ実装面としてなるパッケージ本体と、このパ
ッケージ本体のチップ実装面に、その活性面側が対向す
る状態で実装された半導体チップと、この半導体チップ
の活性面と反対側の面に密着した状態でパッケージ本体
に取り付けられた放熱部材と、パッケージ本体の外部電
極形成面に設けられた入出力端子とを備えた構成となっ
ている。According to a first aspect of the present invention, there is provided a semiconductor device having a package body having a surface opposite to an external electrode forming surface on which external electrodes are formed as a chip mounting surface, and a chip mounting surface of the package main body. , A semiconductor chip mounted with its active surface facing each other, a heat dissipation member attached to the package body in close contact with the surface of the semiconductor chip opposite to the active surface, and an external electrode forming surface of the package body. And an input / output terminal provided in the.
【０００６】請求項２記載の半導体装置は、上記請求項
１記載の半導体装置において放熱部材側に空冷用のファ
ンユニットが取り付けられた構成となっている。According to a second aspect of the present invention, there is provided the semiconductor device according to the first aspect, wherein a fan unit for air cooling is attached to the heat radiation member side.
【０００７】[0007]
【作用】請求項１記載の半導体装置においては、パッケ
ージ本体に実装された半導体チップの裏面（活性面と反
対側の面）が放熱部材と密着した構造となっているた
め、半導体チップで発生した熱がパッケージ本体を経由
することなく直に放熱部材に伝熱され、そこから外部に
放散されるようになる。これにより、従来よりも伝熱経
路が格段に短くなるため、その分だけパッケージ全体の
熱抵抗を低下させることができる。In the semiconductor device according to the first aspect of the present invention, the semiconductor chip mounted on the package body has a structure in which the back surface (the surface opposite to the active surface) is in close contact with the heat dissipation member. The heat is directly transferred to the heat radiating member without passing through the package body, and then radiated to the outside. As a result, the heat transfer path is significantly shorter than in the conventional case, and the thermal resistance of the entire package can be reduced accordingly.
【０００８】請求項２記載の半導体装置においては、空
冷用のファンユニットによって放熱部材の表面が強制的
に冷却されるようになるため、パッケージ全体の放熱効
果をより一層高めることができる。In the semiconductor device according to the second aspect, since the surface of the heat dissipation member is forcibly cooled by the fan unit for air cooling, the heat dissipation effect of the entire package can be further enhanced.
【０００９】[0009]
【実施例】以下、本発明の実施例について図面を参照し
ながら詳細に説明する。図１は本発明に係わる半導体装
置の第１実施例を示す概略断面図であり、図中（ａ）は
その全体図、（ｂ）はＡ部拡大図を示している。図１に
示す半導体装置１０において、パッケージ本体１１は一
方（図中上方）を開口した箱型構造をなすもので、本例
ではパッケージ周縁の凸部が後述する半導体チップの厚
み寸法とほぼ同じ段差をもって形成されている。このパ
ッケージ本体１１の底面１１ａには図示せぬ複数の外部
電極（ランド）が形成されており、さらに各々の外部電
極上には入出力端子としての球状電極（はんだボール
等）１２がマウントされている。一方、上述した外部電
極形成面１１ａと反対側の面１１ｂには、後述する半導
体チップの電極パッド配列に応じて複数の電極部（不図
示）が配置されており、パッケージ本体１１ではこの電
極形成面１１ｂをチップ実装面としている。Embodiments of the present invention will now be described in detail with reference to the drawings. 1A and 1B are schematic sectional views showing a first embodiment of a semiconductor device according to the present invention, wherein FIG. 1A is an overall view thereof, and FIG. In the semiconductor device 10 shown in FIG. 1, the package body 11 has a box-shaped structure in which one side (upper side in the figure) is opened. Is formed with. A plurality of external electrodes (lands) (not shown) are formed on the bottom surface 11a of the package body 11, and a spherical electrode (solder ball etc.) 12 as an input / output terminal is mounted on each external electrode. There is. On the other hand, a plurality of electrode portions (not shown) are arranged on the surface 11b opposite to the above-mentioned external electrode forming surface 11a according to the electrode pad arrangement of the semiconductor chip, which will be described later. The surface 11b is the chip mounting surface.
【００１０】パッケージ本体１１のチップ実装面１１ｂ
には半導体チップ１３が実装されている。半導体チップ
１３は、図１（ｂ）に示すように、その活性面１３ａ側
がチップ実装面１１ｂに対向する状態、すなわちフェー
スダウン構造をもってパッケージ本体１１に実装されて
いる。半導体チップ１３の活性面１３ａには複数の電極
パッド（不図示）が設けられており、これらの電極パッ
ドがはんだバンプ１４等を介してパッケージ本体１１側
の電極部（不図示）に接続されている。Chip mounting surface 11b of package body 11
A semiconductor chip 13 is mounted on. As shown in FIG. 1B, the semiconductor chip 13 is mounted on the package body 11 in a state where the active surface 13a side faces the chip mounting surface 11b, that is, a face-down structure. A plurality of electrode pads (not shown) are provided on the active surface 13a of the semiconductor chip 13, and these electrode pads are connected to the electrode parts (not shown) on the package body 11 side through the solder bumps 14 and the like. There is.
【００１１】さらに、半導体チップ１３の裏面、つまり
活性面１３ａと反対側の面１３ｂには例えばアルミニウ
ムや銅等の高熱伝導性材料からなる放熱部材（ヒートシ
ンク等）１５が密着している。この放熱部材１５は、熱
伝導性を有する接着剤、例えばシリコーン系の接着剤１
６を介してチップ裏面１３ｂに密着しており、その接合
面と反対側の面には冷却効果を高めるための凹凸部（放
熱フィン）が設けられている。また放熱部材１５の周縁
部は接着剤等の固定手段を用いてパッケージ本体１１の
周縁凸部に固定されている。Further, on the back surface of the semiconductor chip 13, that is, the surface 13b opposite to the active surface 13a, a heat dissipation member (heat sink etc.) 15 made of a highly heat conductive material such as aluminum or copper is in close contact. The heat dissipation member 15 is made of an adhesive having thermal conductivity, for example, a silicone adhesive 1
The chip back surface 13b is in close contact with the surface of the chip via 6 and an uneven portion (radiation fin) for enhancing the cooling effect is provided on the surface opposite to the bonding surface. Further, the peripheral edge portion of the heat dissipation member 15 is fixed to the peripheral edge convex portion of the package body 11 using a fixing means such as an adhesive.
【００１２】このように本第１実施例の半導体装置１０
においては、発熱源となる半導体チップ１３の裏面１３
ｂに放熱部材１５が密着した状態で取り付けられた構造
となっているため、図１（ｂ）の一点鎖線で示すよう
に、半導体チップ１３で発生した熱がその裏面１３ｂ側
から直に放熱部材１５に伝熱され、その放熱部材１５の
表面（特に凹凸面）から外部に放散されるようになる。
これにより、パッケージ内における伝熱経路が従来構造
に比較して格段に短くなるうえ、伝熱経路が広い面積を
もって確保されるようになるため、その分だけパッケー
ジ全体としての熱抵抗が低下し、高い放熱効果を得るこ
とができる。As described above, the semiconductor device 10 of the first embodiment
In the case of the back surface 13 of the semiconductor chip 13
Since the heat dissipating member 15 is attached in close contact with the heat dissipating member 15b, heat generated in the semiconductor chip 13 is directly transferred from the back surface 13b side thereof as shown by the dashed line in FIG. The heat is transferred to 15 and is radiated to the outside from the surface (in particular, the uneven surface) of the heat dissipation member 15.
As a result, the heat transfer path in the package is significantly shorter than that of the conventional structure, and the heat transfer path is secured with a large area, so the thermal resistance of the package as a whole is reduced accordingly. A high heat dissipation effect can be obtained.
【００１３】図２は本発明に係わる半導体装置の第２実
施例を示す概略断面図である。図２に示す半導体装置２
０において、２１はパッケージ本体、２２は球状電極、
２３は半導体チップ、２４は放熱部材であり、これらの
基本的な構成については上記第１実施例の場合と同様で
ある。ここで本第２実施例においては、パッケージ本体
２１に対し、半導体チップ２３に密着した状態で取り付
けられた放熱部材２４側に空冷用のファンユニット２５
が取り付けられている。このファンユニット２５は、例
えば、ユニット全体の取付ベースとなるホルダ部２６
と、このホルダ部２６に装着されたモータ２７と、この
モータ２７を駆動源として回転するファン２８とから成
るもので、このうちホルダ部２６は螺子留めや接着剤等
の固定手段によって放熱部材２４に固定されている。FIG. 2 is a schematic sectional view showing a second embodiment of the semiconductor device according to the present invention. Semiconductor device 2 shown in FIG.
In 0, 21 is a package body, 22 is a spherical electrode,
Reference numeral 23 is a semiconductor chip, and 24 is a heat dissipation member. The basic configurations of these are the same as those in the first embodiment. Here, in the second embodiment, the fan unit 25 for air cooling is provided on the heat dissipating member 24 side which is attached to the package body 21 in a state in which the semiconductor chip 23 is closely attached.
Is attached. The fan unit 25 includes, for example, a holder portion 26 that serves as a mounting base for the entire unit.
And a fan 28 that rotates by using the motor 27 as a drive source. Of these, the holder part 26 is a heat dissipating member 24 by means of fixing means such as screw fastening or adhesive. It is fixed to.
【００１４】上記構成からなる本第２実施例の半導体装
置２０においては、モータ２７の駆動によってファン２
８を回転させると、放熱部材２４の表面（凹凸面）がフ
ァン２８の回転によって強制的に冷却される。したがっ
て、半導体チップ２３で発生した熱を、放熱部材２４に
よる放熱作用とファンユニット２５による冷却作用の相
乗効果をもって、より効果的に外部に放散させることが
できる。In the semiconductor device 20 of the second embodiment having the above structure, the fan 2 is driven by driving the motor 27.
When 8 is rotated, the surface (uneven surface) of the heat dissipation member 24 is forcibly cooled by the rotation of the fan 28. Therefore, the heat generated in the semiconductor chip 23 can be more effectively dissipated to the outside by the synergistic effect of the heat dissipation effect of the heat dissipation member 24 and the cooling effect of the fan unit 25.
【００１５】図３は本発明に係わる半導体装置の他の適
用例を示す概略断面図である。図３に示す半導体装置３
０においては、上記第１実施例と同様に、パッケージ本
体３１に対し、その活性面側を対向させた状態（フェー
スダウン構造）で半導体チップ３２が実装されており、
さらにチップ裏面に密着した状態で放熱部材３３が取り
付けられている。また、外部電極が形成されているパッ
ケージ本体３１の底面（外部電極形成面）３１ａには入
出力端子としてリードピン３４が設けられている。FIG. 3 is a schematic sectional view showing another application example of the semiconductor device according to the present invention. Semiconductor device 3 shown in FIG.
In No. 0, as in the first embodiment, the semiconductor chip 32 is mounted on the package body 31 with the active surface side thereof facing (face down structure).
Further, the heat dissipation member 33 is attached in close contact with the back surface of the chip. Further, lead pins 34 are provided as input / output terminals on the bottom surface (external electrode formation surface) 31a of the package body 31 on which the external electrodes are formed.
【００１６】この種のパッケージ構造は、パッケージ本
体３１の外部電極形成面３１ａにリードピン３４が２次
元のアレイ状に配置されていることから、ＰＧＡ（ピン
・グリッド・アレイ）と呼ばれており、この場合におい
ても半導体チップ３２の裏面に放熱部材３３が密着して
取り付けられていることから、上記第１実施例と同様に
熱抵抗が低下し、高い放熱効果を得ることができる。な
お、このＰＧＡパッケージに対しても、上記第２実施例
のごとく放熱部材３３側にファンユニット（不図示）を
取り付けることで、放熱部材３３による放熱作用とファ
ンユニットによる冷却作用の相乗効果をもって、より高
い放熱効果が得られることはいうまでもない。This type of package structure is called a PGA (pin grid array) because the lead pins 34 are arranged in a two-dimensional array on the external electrode forming surface 31a of the package body 31. Also in this case, since the heat dissipation member 33 is attached in close contact with the back surface of the semiconductor chip 32, the thermal resistance is reduced as in the first embodiment, and a high heat dissipation effect can be obtained. In this PGA package as well, by attaching a fan unit (not shown) to the heat dissipation member 33 side as in the second embodiment, the heat dissipation effect of the heat dissipation member 33 and the cooling effect of the fan unit have a synergistic effect. It goes without saying that a higher heat dissipation effect can be obtained.
【００１７】[0017]
【発明の効果】請求項１記載の半導体装置によれば、パ
ッケージ本体に実装された半導体チップの裏面、すなわ
ち活性面と反対側の面を放熱部材に密着させた構造とし
たので、半導体チップで発生した熱を他の部材を経由す
ることなく直に放熱部材に伝えることができる。これに
より、パッケージ全体の熱抵抗が従来よりも格段に小さ
くなり、半導体チップの熱を効率良く外部に放散させる
ことが可能となるため、例えば電源用ＩＣや高速、高集
積ＩＣなど発熱量の多い半導体チップであっても多ピン
化対応のパッケージ構造に何ら支障なく採用することが
できる。According to the semiconductor device of the first aspect, since the back surface of the semiconductor chip mounted on the package body, that is, the surface opposite to the active surface is closely attached to the heat dissipation member, the semiconductor chip The generated heat can be directly transmitted to the heat dissipation member without passing through other members. As a result, the thermal resistance of the entire package becomes much smaller than in the past, and it becomes possible to efficiently dissipate the heat of the semiconductor chip to the outside. Even a semiconductor chip can be adopted in a package structure compatible with a large number of pins without any problem.
【００１８】請求項２記載の半導体装置によれば、放熱
部材の表面をファンユニットによって強制的に冷却する
ことができるため、放熱部材による放熱作用とファンユ
ニットによる冷却作用の相乗効果をもって、半導体チッ
プの熱をより効果的に外部に放散させることが可能とな
る。According to the semiconductor device of the second aspect, since the surface of the heat dissipation member can be forcibly cooled by the fan unit, the semiconductor chip has a synergistic effect of the heat dissipation effect of the heat dissipation member and the cooling effect of the fan unit. It becomes possible to more effectively dissipate the heat of the outside.
【図１】本発明に係わる半導体装置の第１実施例を示す
概略断面図である。FIG. 1 is a schematic sectional view showing a first embodiment of a semiconductor device according to the present invention.
【図２】本発明に係わる半導体装置の第２実施例を示す
概略断面図である。FIG. 2 is a schematic sectional view showing a second embodiment of the semiconductor device according to the present invention.
【図３】他の適用例を示す側面概略図である。FIG. 3 is a schematic side view showing another application example.
【図４】従来における半導体装置の一例を示す概略断面
図である。FIG. 4 is a schematic sectional view showing an example of a conventional semiconductor device.
１０，２０，３０ 半導体装置 １１，２１，３１ パッケージ本体 １２，２２ 球状電極（入出力端子） １３，２３，３２ 半導体チップ １５，２４，３３ 放熱部材 ２５ ファンユニット ３４ リードピン（入出力端子） 10, 20, 30 Semiconductor device 11, 21, 31 Package body 12, 22 Spherical electrode (input / output terminal) 13, 23, 32 Semiconductor chip 15, 24, 33 Heat dissipation member 25 Fan unit 34 Lead pin (input / output terminal)
フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/46 Ｃ Continuation of the front page (51) Int.Cl. 6 Identification number Office reference number FI technical display location H01L 23/46 C
Claims (6)
反対側の面をチップ実装面としてなるパッケージ本体
と、 前記パッケージ本体のチップ実装面に、その活性面側が
対向する状態で実装された半導体チップと、 前記半導体チップの活性面と反対側の面に密着した状態
で前記パッケージ本体に取り付けられた放熱部材と、 前記パッケージ本体の外部電極形成面に設けられた入出
力端子とを備えたことを特徴とする半導体装置。1. A package main body having a surface opposite to the external electrode formation surface on which external electrodes are formed as a chip mounting surface, and mounted on the chip mounting surface of the package main body with their active surfaces facing each other. A semiconductor chip, a heat dissipation member attached to the package body in a state of being in close contact with the surface opposite to the active surface of the semiconductor chip, and an input / output terminal provided on an external electrode forming surface of the package body. A semiconductor device characterized by the above.
トが取り付けられたことを特徴とする請求項１の半導体
装置。2. The semiconductor device according to claim 1, wherein a fan unit for air cooling is attached to the heat dissipation member side.
を特徴とする請求項１記載の半導体装置。3. The semiconductor device according to claim 1, wherein the input / output terminals are spherical electrodes.
を特徴とする請求項２記載の半導体装置。4. The semiconductor device according to claim 2, wherein the input / output terminals are spherical electrodes.
とを特徴とする請求項１記載の半導体装置。5. The semiconductor device according to claim 1, wherein the input / output terminals are lead pins.
とを特徴とする請求項２記載の半導体装置。6. The semiconductor device according to claim 2, wherein the input / output terminals are lead pins.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7020008A JPH08213508A (en) | 1995-02-08 | 1995-02-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7020008A JPH08213508A (en) | 1995-02-08 | 1995-02-08 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH08213508A true JPH08213508A (en) | 1996-08-20 |
Family
ID=12015098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7020008A Pending JPH08213508A (en) | 1995-02-08 | 1995-02-08 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH08213508A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1638143A2 (en) | 2004-09-21 | 2006-03-22 | Lucent Technologies Inc. | Heat-transfer devices |
| CN108738225A (en) * | 2017-04-25 | 2018-11-02 | 欧姆龙汽车电子株式会社 | Circuit board module and electronic device |
-
1995
- 1995-02-08 JP JP7020008A patent/JPH08213508A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1638143A2 (en) | 2004-09-21 | 2006-03-22 | Lucent Technologies Inc. | Heat-transfer devices |
| CN108738225A (en) * | 2017-04-25 | 2018-11-02 | 欧姆龙汽车电子株式会社 | Circuit board module and electronic device |
| JP2018186143A (en) * | 2017-04-25 | 2018-11-22 | オムロンオートモーティブエレクトロニクス株式会社 | Circuit board module and electronic apparatus |
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