JPH08154335A - Phase angle difference, frequency difference and frequency calculation method in digital protection relay - Google Patents
Phase angle difference, frequency difference and frequency calculation method in digital protection relayInfo
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- JPH08154335A JPH08154335A JP6293080A JP29308094A JPH08154335A JP H08154335 A JPH08154335 A JP H08154335A JP 6293080 A JP6293080 A JP 6293080A JP 29308094 A JP29308094 A JP 29308094A JP H08154335 A JPH08154335 A JP H08154335A
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- difference
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Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明はディジタル形保護継電
器における位相角差、周波数差及び周波数演算方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase angle difference, a frequency difference and a frequency calculating method in a digital protective relay.
【０００２】[0002]
【従来の技術】ディジタル形継電器は、継電器の入力で
ある電圧、電流情報を、適当な周期でサンプリングし、
量子化されたディジタル量に変換し、これをあらかじめ
用意されたプログラムで計算処理して、系統事故の有無
を判断する継電器である。2. Description of the Related Art A digital relay samples voltage and current information that is input to the relay at an appropriate cycle,
It is a relay that converts into a quantized digital quantity and calculates it with a program prepared in advance to judge the presence or absence of a system fault.
【０００３】このディジタル継電器において、２つの交
流電気量間の位相差や周波数差を判定する方法には、電
圧、電流の交流波形の１周期時間と２つの交流波形間の
立ち上がり時間、立ち下がり時間を、高精度発振器（ク
リスタル発振器等）を用いてカウントする、いわゆるパ
ルスカウント方式と称される第１の方法がある。In this digital relay, a method for determining a phase difference or a frequency difference between two AC electric quantities is one cycle time of AC waveforms of voltage and current and rising time and falling time between two AC waveforms. There is a first method called a so-called pulse counting method in which a high-precision oscillator (crystal oscillator or the like) is used to count.
【０００４】また、サンプリングされた交流波形瞬時値
より、ゼロクロス時間を求め、これより、周期や位相差
を演算する、いわゆるゼロクロス近似方式と称される第
２の方法がある。There is also a second method called a so-called zero-cross approximation method in which the zero-cross time is obtained from the sampled AC waveform instantaneous value and the period and the phase difference are calculated from this.
【０００５】さらに、サンプリングされた交流波形瞬時
値の積和演算により、２つの交流波形間の位相差に応じ
た正弦値、余弦値を求める、いわゆる積和演算方式と称
される第３の方法がある。Furthermore, a third method, which is a so-called product-sum calculation method, which obtains a sine value and a cosine value according to the phase difference between two AC waveforms by a product-sum operation of sampled AC waveform instantaneous values There is.
【０００６】[0006]
【発明が解決しようとする課題】上述した第１の方法は
専用のパルスカウント回路が必要となるため、ディジタ
ル継電器の構成が複雑となるとともにパルスカウントが
１周期に１回の判定しか出来ない問題がある。また、第
２の方法もゼロクロス時間検出が１周期に１回の判定し
か出来ない。さらに、第３の方法は周波数変動時に演算
誤差が生じ、幅広い周波数変動が想定される用途におい
ては実用精度を満足し得ない。The above-mentioned first method requires a dedicated pulse counting circuit, which complicates the configuration of the digital relay and makes it possible to make only one pulse count determination per cycle. There is. In the second method, the zero-cross time detection can be made only once in one cycle. Further, the third method causes a calculation error when the frequency fluctuates, and cannot satisfy the practical accuracy in applications where a wide frequency fluctuation is expected.
【０００７】この発明は上記の事情に鑑みてなされたも
ので、精度良く位相角差を判定できるとともにサンプリ
ング点に依存されずに、任意の時刻に連続して正確な周
波数差及び周波数が判定できるディジタル形保護継電器
における位相角差、周波数差及び周波数演算方法を提供
することを目的とする。The present invention has been made in view of the above circumstances. It is possible to accurately determine a phase angle difference and to determine an accurate frequency difference and frequency continuously at any time without depending on a sampling point. An object of the present invention is to provide a phase angle difference, a frequency difference and a frequency calculation method in a digital protective relay.
【０００８】[0008]
【課題を解決するための手段】この発明は上記の目的を
達成するために、第１発明は、一定間隔でサンプリング
された交流電気量の瞬時値データを用いて交流量の大き
さや交流量間の位相角差をプロセッサで判定するディジ
タル保護継電器において、２つのサンプリングデータ量
の積演算を行う工程と、この演算値をディジタルフィル
タで処理する工程とからなる位相角差判定処理工程を前
記プロセッサにて行うようにしたことを特徴とするもの
である。SUMMARY OF THE INVENTION In order to achieve the above-mentioned object, the first invention is to use the instantaneous value data of the alternating current electricity quantity sampled at a constant interval to measure the magnitude of the alternating current quantity or the alternating current quantity. In the digital protective relay for determining the phase angle difference of the above, a phase angle difference determination processing step including a step of performing a product operation of two sampling data amounts and a step of processing the calculated value with a digital filter is performed by the processor. It is characterized in that it is carried out by.
【０００９】第２発明は、第１発明の結果として得られ
るところの単位時間当たりの位相角差の変化量を検出し
て２つの電気量間の周波数差を算出することを特徴とす
るものである。The second invention is characterized by detecting the amount of change in the phase angle difference per unit time, which is obtained as a result of the first invention, and calculating the frequency difference between the two electric quantities. is there.
【００１０】第３発明は、第２発明のディジタル保護継
電器の一方の入力に系統の電圧を与え、他方の入力に既
知基準交流発振器の電圧を与えることで系統の周波数を
判定するようにしたことを特徴とするものである。According to a third aspect of the invention, the frequency of the system is judged by applying a system voltage to one input of the digital protective relay of the second invention and applying a voltage of a known reference AC oscillator to the other input. It is characterized by.
【００１１】第４発明は、前記既知の基準交流発振器の
電圧に代えて、その電圧に相当するデータを前記プロセ
ッサに持つようにしたことを特徴とするものである。The fourth invention is characterized in that the processor has data corresponding to the voltage of the known reference AC oscillator instead of the voltage of the known reference AC oscillator.
【００１２】[0012]
【作用】２つのサンプリングデータ量を積演算した値を
ディジタルフィルタ処理工程にて処理したので、位相誤
差を極めて小さくできる。また、周波数差の判定も単位
時間当たりの位相角の変化量を検出することによって簡
単に判定できる。さらに、既知基準交流発振器の電圧及
びその電圧に相当するデータを用いることにより、周波
数演算が可能となる。Since the value obtained by multiplying two sampling data amounts is processed in the digital filter processing step, the phase error can be made extremely small. The frequency difference can be easily determined by detecting the amount of change in the phase angle per unit time. Further, the frequency can be calculated by using the voltage of the known reference AC oscillator and the data corresponding to the voltage.
【００１３】[0013]
【実施例】以下この発明の一実施例を図面に基づいて説
明する。図１は周波数の異なる２つの電気量ａ（ｔ），
ｂ（ｔ）とサンプリングデータの関係を示す説明図で、
この図１において、時刻ｔにおけるそれぞれの値は次式
で表される。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows two electric quantities a (t) with different frequencies,
It is explanatory drawing which shows the relationship between b (t) and sampling data,
In FIG. 1, each value at time t is represented by the following equation.
【００１４】 Ｖｓ＝ａ（ｔ）＝Ａｓｉｎ（ωoｔ＋Δω1ｔ＋θ）……（１） Ｖｒ＝ｂ（ｔ）＝Ｂｓｉｎ（ωoｔ＋Δω2ｔ）……（２） 但し、ω0；定格角速度 Δω1、Δω2；定格角速度に対する差分角速度 θ；ｔ＝０における位相角差 任意時刻ｔで同時にサンプリングされた、瞬時データど
おしの積は、次の（３）式のようになる。Vs = a (t) = Asin (ω o t + Δω 1 t + θ) (1) Vr = b (t) = B sin (ω o t + Δω 2 t) (2) where ω 0 ; rated angular velocity Δω 1 , Δω 2 ; differential angular velocity with respect to rated angular velocity θ; phase angle difference at t = 0 The product of instantaneous data sampled simultaneously at an arbitrary time t is given by the following equation (3).
【００１５】 ａ（ｔ）ｂ（ｔ）＝Ａｓｉｎ（ω0ｔ＋Δω1ｔ＋θ） ×Ｂｓｉｎ（ω0ｔ＋Δω2ｔ） ＝ＡＢ／２｛ｃｏｓ（Δω1ｔ−Δω2ｔ＋θ） −ｃｏｓ（２ω0ｔ＋Δω1ｔ＋Δω2ｔ＋θ）｝……（３） 上記（３）式の右辺第１項は、本来求めたい位相角差に
相当するところの差分角速度（Δω1−Δω2）の余弦で
ある。第２項は定格のほぼ２倍（≒２ω0）の角速度を
持つ項となる。[0015] a (t) b (t) = Asin (ω 0 t + Δω 1 t + θ) × Bsin (ω 0 t + Δω 2 t) = AB / 2 {cos (Δω 1 t-Δω 2 t + θ) -cos (2ω 0 t + Δω 1 t + Δω 2 t + θ)} (3) The first term on the right-hand side of the above equation (3) is the cosine of the differential angular velocity (Δω 1 −Δω 2 ) that corresponds to the phase angle difference originally desired. The second term is a term having an angular velocity that is almost twice the rated value (≈2ω 0 ).
【００１６】定格周波数の１２倍のサンプリング周波数
を持つディジタルリレーでは、系統周波数が定格の場合
のみ、３サンプル離れたところの瞬時値データの積（ａ
（ｔ）ｂ（ｔ））を加算することで第２項を完全に消去
することが可能である。しかしながら、周波数が変動し
ている場合は「サンプリング周波数＝系統周波数×１２
倍」の関係を満足しないで、第２項が消去しきれず、こ
れが誤差となる。次にこの概要を説明する。In a digital relay having a sampling frequency 12 times the rated frequency, only when the system frequency is rated, the product of instantaneous value data (a
It is possible to completely eliminate the second term by adding (t) b (t)). However, when the frequency is fluctuating, “sampling frequency = system frequency × 12
The second term cannot be completely erased without satisfying the relation of "double", which causes an error. Next, this outline will be described.
【００１７】サンプリング間隔をＴ＝２π／（ωO・１
２）とおけば、任意の時刻に対して前後のｎ個のデータ
のサンプリングタイミングは ｔ＋ｎ・Ｔ＝ｔ＋ｎ・π／６ωo………（４） となる。現時点（ｎ＝０）のサンプリングデータを
ａ0、ｂ0、これより３サンプリング後（ｎ＝３）のデー
タをａ3、ｂ3、とすれば、これら瞬時値積Ｘ0,0、Ｘ0,3
は（１）、（２）式により、次の（５）、（６）式とな
る。The sampling interval is T = 2π / (ω O · 1
Speaking of 2), the sampling timing of n data before and after an arbitrary time is t + n · T = t + n · π / 6ω o (4). Assuming that the sampling data at the present time (n = 0) is a 0 , b 0 and the data after 3 samplings (n = 3) is a 3 , b 3 , these instantaneous value products X 0 , 0 , X 0 , 3
The following equations (5) and (6) are obtained from equations (1) and (2).
【００１８】[0018]
【数１】 [Equation 1]
【００１９】なお、（５）、（６）式において、Δ
ωa，Δωb，βa，βbを次の（７）式のようにした。In equations (5) and (6), Δ
ω a , Δω b , β a , and β b are set as in the following equation (7).
【００２０】[0020]
【数２】 [Equation 2]
【００２１】よって、３サンプル離れた瞬時値積の加算
結果Ｘ1,0は次の（８）式となる。Therefore, the addition result X 1 , 0 of the instantaneous value products separated by 3 samples is given by the following expression (8).
【００２２】 Ｘ1,0＝Ｘ0,0＋Ｘ0,3＝ｃｏｓ（Δωaｔ＋βa＋θ）ｃｏｓβa −ｓｉｎ（２ω0ｔ＋Δβbｔ＋βb＋θ）ｓｉｎβb………（８） すなわち、周波数定格からずれていると、ｓｉｎβb≠
０となり、（８）式の第２項を消去することができな
い。ちなみに、Δωb／ω0＝0.2の場合では、第１項の約
15.8％と、かなりの誤差となる。 [0022] X 1, 0 = X 0, 0 + X 0, 3 = cos (Δω a t + β a + θ) cosβ a -sin (2ω 0 t + Δβ b t + β b + θ) sinβ b ......... (8) In other words, the frequency rated If deviates from sin β b ≠
It becomes 0, and the second term of the equation (8) cannot be erased. By the way, in the case of Δω b / ω 0 = 0.2, about the first term
This is a considerable error of 15.8%.
【００２３】 この加算演算は、積演算結果に含まれる
第２調波成分を除去するディジタルフィルタ（以下ＤＦ
と称する）演算に他ならない。加算処理を繰り返すこと
は、このＤＦの段数を増やすことに相当する。これによ
り第２調波近傍のゲインを下げ、第２項の抑圧を行う。
ＤＦの段数と誤差抑圧の関係を以下に示す。This addition operation is performed by a digital filter (hereinafter DF) that removes the second harmonic component included in the product operation result.
It is nothing but a calculation. Repeating the addition process corresponds to increasing the number of stages of this DF. This reduces the gain near the second harmonic and suppresses the second term.
The relationship between the number of DF stages and error suppression is shown below.
【００２４】 ［ＤＦ２段の余弦］ Ｘ1,0＝ａ0ｂ0＋ａ3ｂ3 Ｘ1,3＝ａ3ｂ3＋ａ6ｂ6 とおき、Ｘ2,0＝Ｘ1,0＋Ｘ1,3を計算すれば、 Ｘ2,0＝２ｃｏｓ（Δωaｔ＋２βa＋θ）ｃｏｓ2βa −２ｓｉｎ（２ω0ｔ＋Δωbｔ＋２βb＋θ）ｓｉｎ2βb ………（９） となる。以後同様に計算することで、ｎ段の加算処理実
施後の、任意サンプリング点（ｉ）で求められる余弦の
一般式として以下を得る。[0024] [DF2 stage cosine] X 1, 0 = a 0 b 0 + a 3 b 3 X 1, 3 = a 3 b 3 + a 6 b 6 Distant, X 2, 0 = X 1 , 0 + X 1, When 3 is calculated, X 2 , 0 = 2cos (Δω a t + 2β a + θ) cos 2 β a −2 sin (2ω 0 t + Δω b t + 2β b + θ) sin 2 β b (9) By performing the same calculation thereafter, the following is obtained as a general expression of the cosine obtained at the arbitrary sampling point (i) after performing the n-stage addition processing.
【００２５】［ＤＦｎ段の余弦］ Ｘn,i＝２n-1ｃｏｓ（Δωaｔ＋ｎβa＋θ）ｃｏｓnβa −２n-1ｓｉｎ（２ω0ｔ＋Δωbｔ＋ｎβb＋θ）ｓｉｎnβb ………（１０） また、正弦を求める場合は、初段の積演算において、Ｙ
0,0＝ａ0ｂ3、Ｙ0,3＝−ａ3ｂ0を計算し、以降余弦を求
めた場合と同様に、３サンプル離れたものの加算処理、
Ｙ1,0＝Ｙ0,0＋Ｙ0,3を行えばよい。これによって得られ
るｎ段の加算処理実施後の任意サンプリング点（ｉ）で
の正弦の一般式を下記（１１）式に示す。[0025] [cosine of DFn stage] X n, i = 2 n -1 cos (Δω a t + nβ a + θ) cos n β a -2 n-1 sin (2ω 0 t + Δω b t + nβ b + θ) sin n β b ... ...... (10) When obtaining the sine, in the product operation of the first stage, Y
0, 0 = a 0 b 3 , Y 0, 3 = -a 3 b 0 was calculated, in the same manner as that for determining the cosine later addition process but spaced 3 samples,
Y 1, 0 = Y 0, 0 + Y 0, 3 may be a performed. The general formula of the sine at the arbitrary sampling point (i) after the addition process of n stages obtained by this is shown in the following formula (11).
【００２６】［ＤＦｎ段の正弦］ Ｙn,i＝２n-1ｓｉｎ（Δωaｔ＋ｎβa＋θ）ｃｏｓnβb +２n-1ｃｏｓ（２ω0ｔ＋Δωbｔ＋ｎβb＋θ）ｓｉｎnβa ………（１１） （１０）式との相違は、第１項の係数がｃｏｓnβbとな
り、第２項の係数がｓｉｎnβaとなる点であるが、
βb，βa≪１の領域では誤差抑圧の関係は、ほぼ同等と
見なせる。[0026] [DFn stage of the sine] Y n, i = 2 n -1 sin (Δω a t + nβ a + θ) cos n β b +2 n-1 cos (2ω 0 t + Δω b t + nβ b + θ) sin n β a ... (11) The difference from the equation (10) is that the coefficient of the first term becomes cos n β b and the coefficient of the second term becomes sin n β a .
In the region of β b and β a << 1, the error suppression relationship can be regarded as almost equal.
【００２７】余弦を求める場合の演算原理の概要を図２
に、また、ＤＦの段数に対する積演算結果に含まれる周
波数成分の通過特性を図３に示す。なお、ＤＦ段数によ
って直流ゲインが増加するが、ゲイン１に正規化して表
現した。また、図２はＤＦが３段の場合の演算原理のブ
ロック図で、１はサンプリングデータ２量の積演算（ａ
ｎ・ｂｎ）を行う工程で、この演算工程１の出力は第１
段のＤＦ1２から第３段のＤＦ3４に入力されて演算が行
われる。FIG. 2 shows the outline of the calculation principle for obtaining the cosine.
Further, FIG. 3 shows the pass characteristic of the frequency component included in the product calculation result with respect to the number of stages of DF. Although the DC gain increases depending on the number of DF stages, it is expressed as normalized to gain 1. Further, FIG. 2 is a block diagram of the operation principle when the DF has three stages, and 1 is a product operation (a
n · bn), the output of this calculation step 1 is the first
The data is input from the DF 1 2 of the stage to the DF 3 4 of the third stage and the calculation is performed.
【００２８】以上により、必要精度に応じてＤＦの段数
を選定すれば、（１０）、（１１）式の第２項が無視可
能となる。ここで得られた余弦、正弦から、正接を演算
することで、時間とともに変化する位相角差の判定を行
うことができる。From the above, if the number of stages of the DF is selected according to the required accuracy, the second term of the equations (10) and (11) can be ignored. By calculating the tangent from the cosine and sine obtained here, the phase angle difference that changes with time can be determined.
【００２９】次に周波数差判定原理について述べる。２
つの電気量間に周波数差がある場合、時間とともに位相
角差が変化するので、単位時間当たりの位相角差の変化
量は周波数差に相当する。従って、前述した位相角差演
算の結果を用いて、周波数差を求める。これには任意時
間（Ｔk）離れた２つの余弦値と正弦値から、以下の手
段により周波数差を検出することができる。ここで、
（１０）、（１１）式の第２項が十分抑圧され、ｓｉｎ
nβa≒ｓｉｎnβb≒０、かつｃｏｓnβa≒ｃｏｓnβb≒
１と見なせる場合には時刻ｔ，ｔ＋Ｔkにおける正弦、
余弦の演算結果は次の（１２）式のようになる。Next, the principle of frequency difference determination will be described. Two
When there is a frequency difference between two electric quantities, the phase angle difference changes with time, so the amount of change in the phase angle difference per unit time corresponds to the frequency difference. Therefore, the frequency difference is obtained using the result of the phase angle difference calculation described above. For this purpose, the frequency difference can be detected by the following means from two cosine values and sine values separated by an arbitrary time (T k ). here,
The second term of equations (10) and (11) is sufficiently suppressed, and sin
n β a ≈sin n β b ≈0, and cos n β a ≈cos n β b ≈
If it can be regarded as 1, the sine at time t, t + T k ,
The calculation result of the cosine is expressed by the following expression (12).
【００３０】 Ｘn,i≒２n-1ｃｏｓ（Δωaｔ＋ｎβa＋θ） Ｘn,i+k≒２n-1ｃｏｓ｛Δωa（ｔ＋Ｔk）＋ｎβa＋θ｝ Ｙn,i≒２n-1ｓｉｎ（Δωaｔ＋ｎβa＋θ） Ｙn,i+k≒２n-1ｓｉｎ｛Δωa（ｔ＋Ｔk）＋ｎβa＋θ｝ ………（１２） これらから、周波数差に対応した余弦と正弦を次の（１
３）式で演算可能となる。 ［周波数差に対応した余
弦］ Ｘn,iＸn,i+k＋Ｙn,iＹn,i+k＝２2(n-1)ｃｏｓ（ΔωaＴk）……（１３） ［周波数差に対応した正弦］ Ｘn,iＹn,i+k−Ｘn,i+kＹn,i＝２2(n-1)ｓｉｎ（ΔωaＴk）……（１４） 以上より、周波数差に応じた正接ｔａｎ（ΔωaＴk）を
次の（１５）式により求めることができるので、これを
用いて周波数差判定を行う。ただし、正接値は２π周期
で同一値を取るので、検出しようとする周波数差に応じ
てＴkを適切に選ぶ必要がある。X n , i ≈2 n-1 cos (Δω a t + nβ a + θ) X n , i + k ≈2 n-1 cos {Δω a (t + T k ) + nβ a + θ} Y n , i ≈2 n -1 sin (Δω a t + nβ a + θ) Y n , i + k ≈ 2 n-1 sin {Δω a (t + T k ) + nβ a + θ} (12) From these, the cosine and sine corresponding to the frequency difference To (1
It can be calculated by the formula 3). [Cosine corresponding to the frequency difference] X n, i X n, i + k + Y n, i Y n, i + k = 2 2 (n-1) cos (Δω a T k) ...... (13) [ Frequency sine] X n corresponding to the difference, i Y n, i + k -X n, i + k Y n, from i = 2 2 (n-1 ) sin (Δω a T k) ...... (14) above, Since the tangent tan (Δω a T k ) according to the frequency difference can be obtained by the following expression (15), the frequency difference determination is performed using this. However, since the tangent value takes the same value in 2π cycles, it is necessary to properly select T k according to the frequency difference to be detected.
【００３１】[0031]
【数３】 (Equation 3)
【００３２】図４は上述の周波数差判定を用いたディジ
タルリレーのブロック構成図で、この図４に示すディジ
タルリレーは入力端子ｖ1（ｔ），ｖ2（ｔ）の一方の入
力端子ｖ1（ｔ）に系統入力を、他方の入力端子ｖ
2（ｔ）に既知の基準交流発振器ＯＳＣから電圧を入力
して、この電圧と系統入力との周波数差を判定するよう
にしたものである。基準交流発振器ＯＳＣからの電圧
は、サンプルホールド２４ｂん直前に入力することも可
能である。このように構成すると絶縁変換器２１ｂ、ア
ナログフィルタ２２ｂが省略できる。また、基準交流発
振器の電圧に相当するデータをＣＰＵ内のメモリ上に持
ち、このメモリ上のデータと系統入力のＡ／Ｄ変換値に
対して演算を適用すれば前述と同様にディジタルリレー
が構成できる。このように構成すると絶縁変換器２１
ｂ、アナログフィルタ２２ｂ、サンプルホールド回路２
４ｂを省略できるので、ディジタルリレーの構成を簡素
化できる利点がある。[0032] Figure 4 is a block diagram of a digital relay using the frequency difference determination described above, the digital relay input terminals v 1 shown in FIG. 4 (t), v 2 one input terminal v 1 of (t) System input to (t) and the other input terminal v
2 (t) is input with a voltage from a known reference AC oscillator OSC, and the frequency difference between this voltage and the system input is determined. The voltage from the reference AC oscillator OSC can be input immediately before the sample hold 24b. With this configuration, the insulation converter 21b and the analog filter 22b can be omitted. Further, if the data corresponding to the voltage of the reference AC oscillator is stored in the memory in the CPU and the calculation is applied to the data in this memory and the A / D conversion value of the system input, the digital relay is constructed as described above. it can. With this configuration, the isolation converter 21
b, analog filter 22b, sample hold circuit 2
Since 4b can be omitted, there is an advantage that the configuration of the digital relay can be simplified.
【００３３】図４において、２１ａ，２１ｂ絶縁変換
器、２２ａ，２２ｂはアナログフィルタ、２３はサンプ
リングパルス発生回路、２４ａ，２４ｂはサンプルホー
ルド回路、２５はマルチプレクサ回路、２６はＡ／Ｄ変
換器、２７はＣＰＵ、２８はメモリ、２９はリレードラ
イバー、３０はリレー、ＯＳＣは既知基準交流発振器で
ある。In FIG. 4, 21a and 21b isolation converters, 22a and 22b are analog filters, 23 is a sampling pulse generating circuit, 24a and 24b are sample and hold circuits, 25 is a multiplexer circuit, 26 is an A / D converter, 27. Is a CPU, 28 is a memory, 29 is a relay driver, 30 is a relay, and OSC is a known reference AC oscillator.
【００３４】次表は上記ディジタルリレーを周波数差検
出リレーとして使用したときの実測結果を示すものであ
る。The following table shows the actual measurement results when the above digital relay is used as a frequency difference detection relay.
【００３５】[0035]
【表１】 [Table 1]
【００３６】表１は基準周波数を±１０％の範囲で変動
させ、周波数差検出特性を測定したもので、±１ＨZ整
定に対し、最大でも０.０２６ＨZの誤差であり、良好な
特性であることが検証できた。[0036] Table 1 varies the reference frequency in a range of ± 10%, obtained by measuring the frequency difference detection characteristics, with respect to ± IH Z settling, is the error of 0.026H Z at most, with good properties I was able to verify that there is.
【００３７】[0037]
【発明の効果】以上述べたように、この発明によれば、
精度良く位相角差を判定することができるとともに、サ
ンプリング点に依存されずに、任意時刻に連続して正確
な周波数差および周波数が判定できる利点がある。As described above, according to the present invention,
There is an advantage that the phase angle difference can be accurately determined, and the accurate frequency difference and frequency can be continuously determined at any time without depending on the sampling point.
【図１】２つの電気量とサンプリングデータの関係を示
す説明図。FIG. 1 is an explanatory diagram showing a relationship between two electric quantities and sampling data.
【図２】この発明の実施例を示す演算原理のブロック
図。FIG. 2 is a block diagram of a calculation principle showing an embodiment of the present invention.
【図３】誤差抑圧用ディジタルフィルタの周波数特性
図。FIG. 3 is a frequency characteristic diagram of a digital filter for error suppression.
【図４】この発明の他の実施例を示すブロック図。FIG. 4 is a block diagram showing another embodiment of the present invention.
１…サンプリングデータ２量の積演算工程。 ２、３、４…ディジタルフィルタ ２１ａ，２１ｂ…絶縁変換器 ２２ａ，２２ｂ…アナログフィルタ ２３…サンプリングパルス発生回路 ２４ａ，２４ｂ…サンプルホールド回路 ２７…ＣＰＵ ２８…メモリ ＯＳＣ…既知基準交流発振器 1 ... Product calculation step of sampling data 2 quantity. 2, 3 and 4 ... Digital filter 21a, 21b ... Isolation converter 22a, 22b ... Analog filter 23 ... Sampling pulse generation circuit 24a, 24b ... Sample hold circuit 27 ... CPU 28 ... Memory OSC ... Known reference AC oscillator
───────────────────────────────────────────────────── フロントページの続き (72)発明者 藤本 敏朗 東京都品川区大崎２丁目１番17号 株式会 社明電舎内 (72)発明者 山口 浩史 東京都品川区大崎２丁目１番17号 株式会 社明電舎内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshiro Fujimoto 2-1-117 Osaki, Shinagawa-ku, Tokyo Stock company Inside the company Meidensha (72) Hiroshi Yamaguchi 2-1-117 Osaki, Shinagawa-ku, Tokyo Stock association Shameidensha
Claims (4)
量の瞬時値データを用いて交流量の大きさや交流量間の
位相角差をプロセッサで判定するディジタル形保護継電
器において、 ２つの電気量の積演算を行う工程と、この演算値をディ
ジタルフィルタで処理する工程とからなる位相角差判定
処理工程を前記プロセッサにて行うようにしたことを特
徴とするディジタル形保護継電器における位相角差演算
方法。1. A digital protective relay in which the processor determines the magnitude of an alternating current amount and the phase angle difference between alternating current amounts by using instantaneous value data of alternating current electrical amounts sampled at regular intervals, and the product of two electrical amounts. A phase angle difference calculation method in a digital protective relay, characterized in that the processor performs a phase angle difference determination processing step including a step of performing an operation and a step of processing the calculated value with a digital filter.
出して２つの電気量間の周波数差を判定することを特徴
とする請求項１記載のディジタル形保護継電器における
周波数差演算方法。2. The frequency difference calculation method in a digital protective relay according to claim 1, wherein the amount of change in the phase angle difference per unit time is detected to determine the frequency difference between the two electric quantities.
の一方の入力に系統の電圧を与え、他方の入力に既知の
基準交流発振器の電圧を与えて、系統の周波数をプロセ
ッサで判定するようにしたことを特徴とするディジタル
形保護継電器における周波数演算方法。3. The digital protective relay according to claim 2, wherein a system voltage is applied to one input and a known reference AC oscillator voltage is applied to the other input so that the frequency of the system is determined by a processor. A method for calculating frequency in a digital protective relay characterized by the above.
て、その電圧に相当するデータを前記プロセッサに持つ
ようにしたことを特徴とする請求項３記載のディジタル
保護継電器における周波数演算方法。4. The frequency calculation method in a digital protection relay according to claim 3, wherein the processor has data corresponding to the voltage of the known reference AC oscillator instead of the voltage of the known reference AC oscillator.
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|---|---|---|---|
| JP29308094A JP3612354B2 (en) | 1994-11-28 | 1994-11-28 | Phase angle difference, frequency difference and frequency calculation method in digital type protective relay |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29308094A JP3612354B2 (en) | 1994-11-28 | 1994-11-28 | Phase angle difference, frequency difference and frequency calculation method in digital type protective relay |
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| Publication Number | Publication Date |
|---|---|
| JPH08154335A true JPH08154335A (en) | 1996-06-11 |
| JP3612354B2 JP3612354B2 (en) | 2005-01-19 |
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ID=17790193
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|---|---|---|---|
| JP29308094A Expired - Fee Related JP3612354B2 (en) | 1994-11-28 | 1994-11-28 | Phase angle difference, frequency difference and frequency calculation method in digital type protective relay |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111679155A (en) * | 2020-06-17 | 2020-09-18 | 北京信息科技大学 | Digital analog simulation device and method for distribution line |
| CN111999583A (en) * | 2020-08-24 | 2020-11-27 | 南京工程学院 | Fault trip judging method of safety and stability control device suitable for alternating current power grid |
-
1994
- 1994-11-28 JP JP29308094A patent/JP3612354B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111679155A (en) * | 2020-06-17 | 2020-09-18 | 北京信息科技大学 | Digital analog simulation device and method for distribution line |
| CN111679155B (en) * | 2020-06-17 | 2022-10-11 | 北京信息科技大学 | Digital analog simulation device and method for distribution line |
| CN111999583A (en) * | 2020-08-24 | 2020-11-27 | 南京工程学院 | Fault trip judging method of safety and stability control device suitable for alternating current power grid |
| CN111999583B (en) * | 2020-08-24 | 2023-03-28 | 南京工程学院 | Fault trip judging method of safety and stability control device suitable for alternating current power grid |
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|---|---|
| JP3612354B2 (en) | 2005-01-19 |
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