JPH0750295A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0750295A JPH0750295A JP19378193A JP19378193A JPH0750295A JP H0750295 A JPH0750295 A JP H0750295A JP 19378193 A JP19378193 A JP 19378193A JP 19378193 A JP19378193 A JP 19378193A JP H0750295 A JPH0750295 A JP H0750295A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon oxide
- oxide film
- teos
- gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置の製造方法に
係り, 配線間に形成する層間絶縁膜の平坦化および膜質
改善に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to flattening an interlayer insulating film formed between wirings and improving the film quality.
【０００２】近年, 半導体装置の高集積化にともない，
プロセス中の基板表面の平坦化は極めて困難となってき
ており，又，平坦化膜の膜質によっては下地のデバイス
に悪影響を与え, また, アルミニウム(Al)系等の配線の
劣化を招くことがあり，深刻な問題となっている。In recent years, with the high integration of semiconductor devices,
It is becoming extremely difficult to flatten the substrate surface during the process, and depending on the film quality of the flattening film, it may adversely affect the underlying device and lead to deterioration of aluminum (Al) -based wiring. Yes, it is a serious problem.
【０００３】[0003]
【従来の技術】多層膜の平坦化のためには, 従来技術で
は，平坦化膜としてSOG(スピンオングラス) 膜を用いこ
れを回転塗布し, ベークする等多数の工程が必要なため
スループットの低下および製造コストの増加をきたして
いた。そこで，多層膜の平坦化に優れた層間絶縁膜とし
て TEOS-O3・NSG 膜が用いられるようになった。2. Description of the Related Art In order to flatten a multilayer film, in the conventional technique, a SOG (spin on glass) film is used as a flattening film, and a number of steps such as spin coating and baking are required. And the manufacturing cost was increased. Therefore, TEOS-O 3 · NSG film has come to be used as an interlayer insulating film that is excellent in flattening the multilayer film.
【０００４】TEOS-O3・NSG 膜は常圧または常圧に近い
減圧下で行う気相成長(CVD) 法でTEOS(テトラエトキシ
シラン, (C2H5O)4Siと O3 との混合ガスを用いて成長し
たNSG(ノンドープのシリケートグラス) 膜である。The TEOS-O 3 .NSG film is produced by vapor phase epitaxy (CVD) performed at atmospheric pressure or under reduced pressure close to atmospheric pressure, and TEOS (tetraethoxysilane, (C 2 H 5 O) 4 Si and O 3 It is an NSG (non-doped silicate glass) film grown using a mixed gas.
【０００５】しかし， TEOS-O3・NSG 膜は含有水分が多
く, 下地デバイスに悪影響を与え,且つその膜質は下地
膜に大きく依存するため，膜質は不安定であった。ま
た， TEOS-O3・NSG 膜を用いたときも，例えばメモリ素
子等のセル部と周辺部にかけての大きな段差ができる
が, 段差被覆の改善も重要である。However, since the TEOS-O 3 .NSG film contains a large amount of water and adversely affects the underlying device, and its film quality largely depends on the underlying film, the film quality was unstable. Also, when using the TEOS-O 3 · NSG film, a large step can be formed between the cell part of the memory element and the peripheral part, for example, but improvement of the step coverage is also important.
【０００６】[0006]
【発明が解決しようとする課題】本発明は TEOS-O3・NS
G 膜の膜質を改善し, 且つその上に被着する配線膜の段
差被覆を改善することを目的とする。[Problems to be Solved by the Invention] The present invention is directed to TEOS-O 3 .NS
The purpose is to improve the film quality of the G film and to improve the step coverage of the wiring film deposited thereon.
【０００７】[0007]
【課題を解決するための手段】上記課題の解決は（図１
参照） １）半導体基板 1上に酸化シリコン膜 3を成膜し，該酸
化シリコン膜の表面をアルゴンガスでスパッタ・エッチ
ングする工程と，該酸化シリコン膜の上に有機シリコン
化合物とオゾンを含むガスを用いた気相成長法により珪
酸グラス(TEOS-O3・NSG)膜を成膜する工程とを有する半
導体装置の製造方法, あるいは ２）前記１）のスパッタ・エッチングに代えて，前記酸
化シリコン膜 3の表面を窒素(N2), アンモニア(NH3),
亜酸化窒素(N2O) ガスのプラズマを照射するか，あるい
はウエット酸素(O2)またはドライ酸素中で熱処理を行う
半導体装置の製造方法, あるいは ３）前記１）の前記酸化シリコン膜(3）の成膜時に，原
料ガスに窒素を含むガスを添加して該酸化シリコン膜の
屈折率を高くする半導体装置の製造方法により達成され
る。[Means for Solving the Problems]
Reference) 1) A step of forming a silicon oxide film 3 on a semiconductor substrate 1 and sputtering / etching the surface of the silicon oxide film with an argon gas, and a gas containing an organic silicon compound and ozone on the silicon oxide film. A method for manufacturing a semiconductor device, which comprises a step of forming a silicate glass (TEOS-O 3 · NSG) film by a vapor phase growth method using 2), or 2) the above-mentioned silicon oxide instead of 1) the sputter etching. Nitrogen (N 2 ), ammonia (NH 3 ),
A method of manufacturing a semiconductor device in which nitrous oxide (N 2 O) gas is irradiated with plasma or heat treatment is performed in wet oxygen (O 2 ) or dry oxygen, or 3) the silicon oxide film (3) described in 1) above. This is achieved by a method of manufacturing a semiconductor device in which a gas containing nitrogen is added to a source gas during film formation to increase the refractive index of the silicon oxide film.
【０００８】[0008]
【作用】本発明では，下層配線終了後に, 水分や不純物
の拡散を阻止する等のブロック層としてプラズマ気相成
長による酸化シリコン(p-SiO) 膜を用い, アルゴン・ス
パッタ・エッチング(ASE) によりp-SiO 膜の表面改質を
行い, この上に TEOS-O3・NSG 膜を成長する。In the present invention, after the lower layer wiring is completed, a silicon oxide (p-SiO) film formed by plasma vapor phase epitaxy is used as a block layer for preventing the diffusion of moisture and impurities, and is subjected to argon sputter etching (ASE). The surface of the p-SiO 2 film is modified and the TEOS-O 3 · NSG film is grown on it.
【０００９】膜質を改善するこめには，p-SiO 膜を1000
〜2000Å成長し，アルゴン・スパッタ・エッチングで 1
50Å程度エッチングし，この上に TEOS-O3・NSG 膜を成
長する。To improve the film quality, a p-SiO 2 film is used
~ 2000Å grows and 1 by Argon sputter etching
Etch about 50Å and grow a TEOS-O 3 · NSG film on it.
【００１０】また，膜質を改善し且つ平坦度も併せて改
善するには，p-SiO 膜を4000〜5000Åと厚く成長し，AS
E で1500Å程度エッチングし，この上に TEOS-O3・NSG
膜を成長する。この場合は, p-SiO 膜を厚く成長するこ
とにより, ブロック性を良くして下地デバイスへの影響
を少なくし，さらにセルと周辺回路間の落ち込み部分
（段差）の上層配線膜の被覆を改善することができる。In order to improve the film quality and also the flatness, a p-SiO 2 film is grown to a thickness of 4000 to 5000Å and
Etching about 1500Å with E, and TEOS-O 3 · NSG on top of this
Grow the film. In this case, by growing the p-SiO film thick, the blocking property is improved and the effect on the underlying device is reduced, and the coating of the upper wiring film on the dip (step) between the cell and the peripheral circuit is improved. can do.
【００１１】次に, 下地膜の前処理としてASE 等のエッ
チングを行うことにより, 膜質が改善される理由と, ど
のように改善されるかを示すデータを説明する。図３
(A),(B) は本発明の効果を説明する図である。Next, the reason why the film quality is improved and the data showing how the film quality is improved by performing etching such as ASE as the pretreatment of the base film will be described. Figure 3
(A), (B) is a figure explaining the effect of the present invention.
【００１２】図３(A) はアルゴン・スパッタ・エッチン
グなしの場合の断面図と表面を見た斜視図, 図３(B) は
同有りの場合を示す。いずれも実験結果を示す写真の模
写図である。FIG. 3 (A) shows a sectional view and a perspective view of the surface without argon sputter etching, and FIG. 3 (B) shows the same case. All are duplicates of photographs showing experimental results.
【００１３】図より, アルゴン・スパッタ・エッチング
なしの場合は, TEOS-O3・NSG 膜に「す」ができてお
り, また, TEOS-O3・NSG 膜の表面を撮影した写真では
膜の表面荒れが観測されている。これに対してアルゴン
・スパッタ・エッチング有りの場合は「す」が消滅し，
表面荒れもなくなっており，非常に良好な膜質になって
いることがわかった。From the figure, it can be seen that the TEOS-O 3 · NSG film has “spits” without argon sputter etching, and the TEOS-O 3 · NSG film surface is photographed. Surface roughness has been observed. On the other hand, when argon, spatter, and etching are present, the "su" disappears,
It was found that the surface was not roughened and the film quality was very good.
【００１４】その理由は, アルゴン・スパッタ・エッチ
ングにより，酸化シリコン膜の結合手が変わり, TEOS-
O3・NSG 膜の結合が変化するためと考えられる。The reason for this is that the argon oxide sputter etching changes the bond of the silicon oxide film, and TEOS-
This is probably because the binding of the O 3 · NSG membrane is changed.
【００１５】[0015]
【実施例】図１(A),(B) は本発明の実施例(1) を説明す
る断面図である。図１(A) において，バルク工程が終わ
り表面にボロンドープのりん珪酸ガラス(PSG) 膜が被着
された基板 1の上に１層目アルミニウム(Al)配線 2を形
成し，その上に厚さ1000〜2000Åのp-SiO 膜 3を成長す
る。1 (A) and 1 (B) are sectional views for explaining an embodiment (1) of the present invention. In Fig. 1 (A), the first layer aluminum (Al) wiring 2 is formed on the substrate 1 on which the bulk process is completed and the boron-doped phosphosilicate glass (PSG) film is deposited on the surface. Grow 1000-2000Å p-SiO film 3.
【００１６】図１(B) において，p-SiO 膜 3の上に成長
する TEOS-O3・NSG 膜の下地依存をなくする膜質改善処
理として, アルゴン・スパッタ・エッチングでp-SiO 膜
3を150Å程度エッチングし，この上に厚さ7000〜9000
Åの TEOS-O3・NSG 膜 4を成長する。As shown in FIG. 1 (B), a p-SiO film is formed by argon sputter etching as a film quality improving process for eliminating the underlayer dependence of the TEOS-O 3 · NSG film grown on the p-SiO film 3.
3 is etched about 150Å and the thickness is 7000〜9000
Å Grow TEOS-O 3 · NSG film 4.
【００１７】アルゴン(Ar)・スパッタ・エッチングの条
件の一例は以下のようである。 Ar圧力： 0.1 Torr Ar流量： 50 SCCM RF電力： 800 W 基板温度： 100℃ また， TEOS-O3・NSG 膜の成膜条件の次に一例を示す。An example of the conditions of argon (Ar) / sputtering / etching is as follows. Ar pressure: 0.1 Torr Ar flow rate: 50 SCCM RF power: 800 W Substrate temperature: 100 ° C An example of the TEOS-O 3 · NSG film deposition conditions is shown below.
【００１８】TEOS流量： 1.0 SLM O3流量： 7.5 SLM 希釈N3流量：18.0 SLM (O3濃度 120 g/m3) ガス圧力： 常圧 基板温度： 400 ℃ さらに別の膜質改善処理方法として，N2, NH3, N2Oガス
のプラズマを照射するか，あるいはウエットO2またはド
ライO2中で, 例えば 450℃, 30分間の熱処理を行う方法
がある。TEOS flow rate: 1.0 SLM O 3 flow rate: 7.5 SLM Diluted N 3 flow rate: 18.0 SLM (O 3 concentration 120 g / m 3 ) Gas pressure: Normal pressure Substrate temperature: 400 ° C. As another method for improving film quality, There is a method of irradiating plasma of N 2 , NH 3 , N 2 O gas, or performing heat treatment in wet O 2 or dry O 2 at, for example, 450 ° C. for 30 minutes.
【００１９】次に, N2, NH3, N2Oのプラズマ照射条件の
一例を示す。 N2, またはNH3, またはN2O 圧力： それぞれ, 1.0 ，
1.0 ，1.0 Torr N2, またはNH3, またはN2O 流量： それぞれ, 300 ，
100 ，300 SCCM RF電力： 500 W 電極間隔： 400 mils 基板温度： 350℃ 照射時間： 60 s 図２(A),(B) は従来例と対比して本発明の実施例(2) を
説明する断面図である。Next, an example of plasma irradiation conditions of N 2 , NH 3 , and N 2 O will be shown. N 2 , or NH 3 , or N 2 O pressure: 1.0, respectively
1.0, 1.0 Torr N 2 , or NH 3 , or N 2 O Flow rate: 300, respectively
100, 300 SCCM RF power: 500 W Electrode interval: 400 mils Substrate temperature: 350 ° C Irradiation time: 60 s FIGS. 2 (A) and 2 (B) explain the embodiment (2) of the present invention in comparison with the conventional example. FIG.
【００２０】この例はセルと周辺回路との境界の段差部
の断面を示し，図２(A) は実施例を, 図２(B) は従来例
を示す。図２(A) において，図１と同じ基板上１層目Al
配線 2を形成し，その上に厚さ4000〜5000Åのp-SiO 膜
3を成長する。This example shows a cross-section of the stepped portion at the boundary between the cell and the peripheral circuit. FIG. 2A shows an embodiment and FIG. 2B shows a conventional example. In Fig. 2 (A), the first Al layer on the same substrate as Fig. 1
Wiring 2 is formed and a p-SiO film with a thickness of 4000 to 5000Å is formed on it.
Grow 3
【００２１】次いで，アルゴン・スパッタ・エッチング
でp-SiO 膜 3を1500Å程度エッチングして図示のように
段差の角をとり，この上に厚さ5000〜7000ÅのTEOS-O3
・NSG 膜 4を成長する。Next, the p-SiO film 3 is etched by argon sputter etching for about 1500 Å to make a step angle as shown in the drawing, and TEOS-O 3 with a thickness of 5000-7000 Å is formed on this step.
・ Grow NSG film 4.
【００２２】次いで，その上に２層目配線Al膜 5を成膜
すると段差部で断線することなく被覆が改善される。図
２(B) ではアルゴン・スパッタ・エッチングを行わない
場合で,TEOS-O3・NSG 膜 4上に２層目配線Al膜 5を成膜
すると段差部で断線する場合がある。Then, a second-layer wiring Al film 5 is formed thereon, so that the coating is improved without disconnection at the step. In FIG. 2 (B), when argon sputter etching is not performed, if the second-layer wiring Al film 5 is formed on the TEOS-O 3 · NSG film 4, disconnection may occur at the step portion.
【００２３】実施例(2) では，ブロック膜であるp-SiO
膜 3が厚いことから下地素子への水分拡散が防止でき，
また TEOS-O3・NSG 膜 4を通常の場合〔実施例(1) 〕よ
り約2000Å薄くできるため，全体としての含有水分量も
低減できる。In the embodiment (2), the block film p-SiO 2 is used.
Since the film 3 is thick, it is possible to prevent the diffusion of water into the underlying element,
In addition, the TEOS-O 3 · NSG film 4 can be made thinner by about 2000Å than in the normal case [Example (1)], so the water content as a whole can be reduced.
【００２４】また，p-SiO 膜 3の膜質改良処理として,
成膜時にN2O およびNH3 等を添加して, p-SiO 膜 3に窒
素を含有させて屈折率を1.60〜1.80と高くすることによ
り,一層ブロック性を向上することができる。Further, as a film quality improving treatment of the p-SiO 2 film 3,
The blocking property can be further improved by adding N 2 O, NH 3 and the like at the time of film formation, and making nitrogen contained in the p-SiO 2 film 3 to increase the refractive index to 1.60 to 1.80.
【００２５】[0025]
【発明の効果】本発明によれば， TEOS-O3・NSG 膜の膜
質を改善し, 且つその上に被着する配線膜の段差被覆を
改善することができた。この結果， TEOS-O3・NSG 膜か
ら下地素子への水分等の拡散が防止され，デバイスの信
頼性と製造歩留の向上に寄与することができた。According to the present invention, the film quality of the TEOS-O 3 .NSG film can be improved, and the step coverage of the wiring film deposited thereon can be improved. As a result, diffusion of moisture from the TEOS-O 3 · NSG film to the underlying element was prevented, which contributed to the improvement of device reliability and manufacturing yield.
【図１】 本発明の実施例(1) を説明する断面図FIG. 1 is a sectional view illustrating an embodiment (1) of the present invention.
【図２】 従来例と対比して本発明の実施例(2) を説明
する断面図FIG. 2 is a sectional view illustrating an embodiment (2) of the present invention in comparison with a conventional example.
【図３】 本発明の効果を説明する図FIG. 3 is a diagram for explaining the effect of the present invention.
1 表面に絶縁膜が被着された基板 2 １層目アルミニウム(Al)配線 3 酸化シリコン膜でp-SiO 膜 4 TEOS-O3・ノンドープ珪酸グラス(NSG) 膜 5 ２層目アルミニウム(Al)配線1 Substrate with an insulating film on the surface 2 1st layer aluminum (Al) wiring 3 p-SiO film with silicon oxide film 4 TEOS-O 3 · Non-doped silicate glass (NSG) film 5 2nd layer aluminum (Al) wiring
Claims (3)
を成膜し，該酸化シリコン膜の表面をアルゴンガスでス
パッタ・エッチングする工程と，該酸化シリコン膜の上
に有機シリコン化合物とオゾンを含むガスを用いた気相
成長法により珪酸グラス(TEOS-O3・NSG)膜を成膜する工
程とを有することを特徴とする半導体装置の製造方法。1. A silicon oxide film (3) on a semiconductor substrate (1)
And a surface of the silicon oxide film is sputter-etched with an argon gas, and a silicate glass (TEOS-) film is formed on the silicon oxide film by a vapor phase growth method using a gas containing an organic silicon compound and ozone. And a step of forming an O 3 · NSG) film.
て，前記酸化シリコン膜(3）の表面を窒素(N2), アンモ
ニア(NH3), 亜酸化窒素(N2O) ガスのプラズマを照射す
るか，あるいはウエット酸素(O2)またはドライ酸素中で
熱処理を行うことを特徴とする半導体装置の製造方法。2. The surface of the silicon oxide film (3) is replaced with plasma of nitrogen (N 2 ), ammonia (NH 3 ), and nitrous oxide (N 2 O) gas instead of the sputter etching of claim 1. A method of manufacturing a semiconductor device, which comprises irradiating or performing heat treatment in wet oxygen (O 2 ) or dry oxygen.
膜時に，原料ガスに窒素を含むガスを添加して該酸化シ
リコン膜の屈折率を高くすることを特徴とする半導体装
置の製造方法。3. A semiconductor device according to claim 1, wherein when the silicon oxide film (3) is formed, a gas containing nitrogen is added to a raw material gas to increase the refractive index of the silicon oxide film. Production method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19378193A JPH0750295A (en) | 1993-08-05 | 1993-08-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19378193A JPH0750295A (en) | 1993-08-05 | 1993-08-05 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0750295A true JPH0750295A (en) | 1995-02-21 |
Family
ID=16313700
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19378193A Withdrawn JPH0750295A (en) | 1993-08-05 | 1993-08-05 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0750295A (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0964029A (en) * | 1995-08-18 | 1997-03-07 | Canon Sales Co Inc | Film forming method |
| JPH09186155A (en) * | 1995-12-23 | 1997-07-15 | Hyundai Electron Ind Co Ltd | Semiconductor element manufacturing method |
| JPH11233512A (en) * | 1998-02-12 | 1999-08-27 | Canon Sales Co Inc | Method for base surface reformation and manufacture of semiconductor device |
| KR100256818B1 (en) * | 1997-04-18 | 2000-05-15 | 김영환 | Semiconductor element isolation layer manufacturing method |
| US6255230B1 (en) | 1999-06-04 | 2001-07-03 | Canon Sales Co., Inc. | Method for modifying a film forming surface of a substrate on which a film is to be formed, and method for manufacturing a semiconductor device using the same |
| KR100391840B1 (en) * | 1997-06-20 | 2003-11-28 | 가가쿠 기쥬츠 신코 지교단 | Method and apparatus for forming an insulating film on the surface of a semiconductor substrate |
| KR100464862B1 (en) * | 2002-08-02 | 2005-01-06 | 삼성전자주식회사 | Method of Manufacturing of a Semiconductor Device |
| US6900144B2 (en) | 2000-03-31 | 2005-05-31 | Canon Sales Co., Inc. | Film-forming surface reforming method and semiconductor device manufacturing method |
| US6911686B1 (en) | 1999-06-17 | 2005-06-28 | Fujitsu Limited | Semiconductor memory device having planarized upper surface and a SiON moisture barrier |
| JP2017059729A (en) * | 2015-09-17 | 2017-03-23 | エスアイアイ・セミコンダクタ株式会社 | Manufacturing method of semiconductor device |
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1993
- 1993-08-05 JP JP19378193A patent/JPH0750295A/en not_active Withdrawn
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5800877A (en) * | 1995-08-18 | 1998-09-01 | Canon Sales Co., Inc. | Method for forming a fluorine containing silicon oxide film |
| JPH0964029A (en) * | 1995-08-18 | 1997-03-07 | Canon Sales Co Inc | Film forming method |
| JPH09186155A (en) * | 1995-12-23 | 1997-07-15 | Hyundai Electron Ind Co Ltd | Semiconductor element manufacturing method |
| KR100256818B1 (en) * | 1997-04-18 | 2000-05-15 | 김영환 | Semiconductor element isolation layer manufacturing method |
| KR100391840B1 (en) * | 1997-06-20 | 2003-11-28 | 가가쿠 기쥬츠 신코 지교단 | Method and apparatus for forming an insulating film on the surface of a semiconductor substrate |
| JPH11233512A (en) * | 1998-02-12 | 1999-08-27 | Canon Sales Co Inc | Method for base surface reformation and manufacture of semiconductor device |
| US6225236B1 (en) | 1998-02-12 | 2001-05-01 | Canon Sales Co., Inc. | Method for reforming undercoating surface and method for production of semiconductor device |
| US6255230B1 (en) | 1999-06-04 | 2001-07-03 | Canon Sales Co., Inc. | Method for modifying a film forming surface of a substrate on which a film is to be formed, and method for manufacturing a semiconductor device using the same |
| US6911686B1 (en) | 1999-06-17 | 2005-06-28 | Fujitsu Limited | Semiconductor memory device having planarized upper surface and a SiON moisture barrier |
| US7074625B2 (en) | 1999-06-17 | 2006-07-11 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
| US6900144B2 (en) | 2000-03-31 | 2005-05-31 | Canon Sales Co., Inc. | Film-forming surface reforming method and semiconductor device manufacturing method |
| KR100464862B1 (en) * | 2002-08-02 | 2005-01-06 | 삼성전자주식회사 | Method of Manufacturing of a Semiconductor Device |
| JP2017059729A (en) * | 2015-09-17 | 2017-03-23 | エスアイアイ・セミコンダクタ株式会社 | Manufacturing method of semiconductor device |
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