JPH0750232A - Electric double layered capacitor - Google Patents
Electric double layered capacitorInfo
- Publication number
- JPH0750232A JPH0750232A JP5193404A JP19340493A JPH0750232A JP H0750232 A JPH0750232 A JP H0750232A JP 5193404 A JP5193404 A JP 5193404A JP 19340493 A JP19340493 A JP 19340493A JP H0750232 A JPH0750232 A JP H0750232A
- Authority
- JP
- Japan
- Prior art keywords
- electric double
- view
- electrode plate
- double layer
- layer capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/13—Energy storage using capacitors
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は電気二重層コンデンサに
関し、特に表面実装型の電気二重層コンデンサのリード
端子部構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electric double layer capacitor, and more particularly to a lead terminal structure of a surface mount type electric double layer capacitor.
【０００２】[0002]
【従来の技術】電気二重層コンデンサを利用して大容量
のコンデンサを得る手段の一つとして米国特許第３５３
９６３号明細書にて開示されているように、カーボン粉
末と電解液とを接触させて、電気二重層を発生させるこ
とを利用したものがある。2. Description of the Related Art U.S. Pat. No. 353 is one of means for obtaining a large-capacity capacitor using an electric double layer capacitor.
As disclosed in the specification of Japanese Patent No. 963, there is one utilizing the generation of an electric double layer by bringing carbon powder into contact with an electrolytic solution.
【０００３】図１１は電気二重層コンデンサ素子（以下
素子と称す）の断面図である。図１１において、１３は
電子伝導性でかつイオン不浸透性の導電性セパレータ、
１４は粉末活性炭と電解質溶液からなるカーボンペース
ト電極、１５はカーボンペースト電極間の導通を防止す
るために設けたイオン透過性で、かつ非電子伝導性を有
する多孔性セパレータ、１６はカーボンペースト電極を
保持し、かつ外界から遮断するために設けた非導電性ガ
スケットである。FIG. 11 is a sectional view of an electric double layer capacitor element (hereinafter referred to as an element). In FIG. 11, 13 is an electrically conductive and ion-impermeable conductive separator,
14 is a carbon paste electrode composed of powdered activated carbon and an electrolyte solution, 15 is an ion-permeable and non-electroconductive porous separator provided to prevent conduction between the carbon paste electrodes, and 16 is a carbon paste electrode. It is a non-conductive gasket provided to hold and shield from the outside world.
【０００４】図１２は従来の表面実装型電気二重層コン
デンサの斜視図，図１３は従来の表面実装型電気二重層
コンデンサの上面図，図１４は従来の表面実装型電気二
重層コンデンサの断面図である。図１４において１８は
絶縁性を有する外装熱可塑性樹脂，１９及び２０はそれ
ぞれリード端子部１９ａ及び２０ａを有する上部電極板
と下部電極板，８は素子１７を積層した素子積層体であ
る。従来の電気二重層コンデンサは素子積層体８の上下
面に、リード端子部１９ａを有する上部電極板１９，リ
ード端子部２０ａを有する下部電極板２０をリード端子
部が相対する方向に突出するように配置した状態でモー
ルド成形金型にセットし、電極板の上下方向に所定の圧
力を加えた状態で、モールド成形金型に熱可塑性樹脂等
の絶縁樹脂を注入して成形を行っていた。FIG. 12 is a perspective view of a conventional surface mount type electric double layer capacitor, FIG. 13 is a top view of a conventional surface mount type electric double layer capacitor, and FIG. 14 is a sectional view of a conventional surface mount type electric double layer capacitor. Is. In FIG. 14, 18 is an exterior thermoplastic resin having an insulating property, 19 and 20 are upper and lower electrode plates having lead terminal portions 19a and 20a, respectively, and 8 is an element laminated body in which an element 17 is laminated. In the conventional electric double layer capacitor, the upper electrode plate 19 having the lead terminal portion 19a and the lower electrode plate 20 having the lead terminal portion 20a are formed on the upper and lower surfaces of the element laminate 8 so that the lead terminal portions protrude in opposite directions. It was set in the mold forming die in the arranged state, and an insulating resin such as a thermoplastic resin was injected into the mold forming die in a state where a predetermined pressure was applied in the vertical direction of the electrode plate for forming.
【０００５】また従来の表面実装型電気二重層コンデン
サを含む小形電子部品は、複数のリード端子部を有する
一対の電極板が同形状ではなかった。（例えば実開平２
−０３７０２６号公開及び図１４）Further, in a conventional small electronic component including a surface mount type electric double layer capacitor, a pair of electrode plates having a plurality of lead terminal portions are not in the same shape. (For example, the actual Kaihei 2
-037026 published and Figure 14)
【発明が解決しようとする課題】上述した従来の表面実
装型電気二重層コンデンサは、リード端子部が正極，負
極一対のみであったため、製品を左右反転させると極性
に注意する必要があるという問題点があった。また複数
のリード端子部を有する一対の電極板の形状が違ってい
たため、それぞれ別の金型で打ち抜かねばならず加工効
率が悪いという問題点があった。In the above-mentioned conventional surface mount type electric double layer capacitor, the lead terminal portion has only a positive electrode and a negative electrode pair, so that it is necessary to pay attention to the polarity when the product is horizontally reversed. There was a point. Further, since the pair of electrode plates having a plurality of lead terminal portions have different shapes, there is a problem that the die must be punched by different dies and the working efficiency is poor.
【０００６】本発明の目的は、小形で、実装時に極性に
よる実装方向を考える必要がなく実装の安定性がよく、
かつ複数のリード端子部を有する一対の電極板の形状が
同一で、電極板の打抜き加工効率を向上させることがで
きる電気二重層コンデンサを提供することにある。It is an object of the present invention to be small in size, and it is not necessary to consider the mounting direction depending on the polarity at the time of mounting, and the mounting stability is good,
Another object of the present invention is to provide an electric double layer capacitor in which the shape of a pair of electrode plates having a plurality of lead terminal portions is the same and the punching efficiency of the electrode plates can be improved.
【０００７】[0007]
【課題を解決するための手段】本発明の電気二重層コン
デンサは、絶縁樹脂にてモールド成形してなる電気二重
層コンデンサにおいて、電気二重層コンデンサ素子積層
体の上下面に、相対する辺より点対称に突出したリード
端子部を有する上部電極板と上部電極板を反転させた形
の下部電極板とを備えている。The electric double layer capacitor of the present invention is an electric double layer capacitor formed by molding with an insulating resin. An upper electrode plate having symmetrically protruding lead terminal portions and a lower electrode plate in which the upper electrode plate is inverted are provided.
【０００８】[0008]
【実施例】次に本発明について図面を参照して説明す
る。図６は本発明の一実施例の表面実装型電気二重層コ
ンデンサの正面図，左側面図，右側面図および上面図で
あり、図１は本発明の一実施例の構成並びに製造方法を
説明するためのモールド成形金型へセット直前の状態を
示す斜視図である。又図２は図１の外部リードの成形を
変えたものの正面図，左側面図，右側面図および下面図
である。本実施例の製造に当たっては、図２に示す電極
板斜視図に示すように、まず１辺が９ｍｍの正方形で、
その相対する２辺より点対称に幅２ｍｍ，長さ６ｍｍの
リード端子部５ａを有する厚さ０．３ｍｍで金属製の上
部電極板５と、上部電極板５のリード端子が突出してい
る方向を軸として反転させた形状で、リード端子６ａの
幅，厚みが上部電極板５と同じである下部電極板６を、
それぞれリード端子部に曲げ加工を施し、外径８ｍｍ，
厚さ０．５ｍｍの素子６枚を積層した素子積層体８の上
下に上部より見て上部電極板のリード端子部と下部電極
板のリード端子部が端子部が重ならないよに配置する。
図１は樹脂射出成形用の上金型７，および下金型１０の
間に素子積層体８，素子積層体８の上部にリード端子５
ａを有する上部電極板５，素子積層体８の下面にリード
端子６ａを有する下部電極６を配置した位置関係を示す
斜視図である。又図３は図１のＡ−Ａ線における断面図
であり、又図４は図３の加圧状態を示す断面図である。
図１〜図３に示すように、素子積層体８と上部電極板
５及び下部電極板６を温度１３０℃に保持した加圧ピン
９を有する射出成形用下金型１０に配置し、上方より温
度１３０℃に保持した加圧ピン９を有する射出成形用上
金型７をかぶせ、加圧ピン９は図４において素子積層体
８を約２０ｋｇ／ｃｍ2 の圧力にて加圧する長さに設計
してあり、射出成形用上金型及び下金型７，１０を型締
め力７０ｔにて閉じた後、約３１０℃に加熱して溶解さ
せたポリフェニレンサルファイド（ＰＰＳ）樹脂を最大
射出圧６００ｋｇ／ｃｍ2 で樹脂射出口１１より圧入
し、圧入後１０秒の冷却後、射出成形用上金型７及び下
金型１０それぞれを開いて、図５（ａ）の斜視図に示す
ような成形した縦・横１０ｍｍ，厚さ５ｍｍの電気二重
層コンデンサを得た。The present invention will be described below with reference to the drawings. FIG. 6 is a front view, a left side view, a right side view and a top view of a surface mount type electric double layer capacitor of one embodiment of the present invention, and FIG. 1 explains a configuration and a manufacturing method of one embodiment of the present invention. FIG. 3 is a perspective view showing a state immediately before being set in a molding die for molding. FIG. 2 is a front view, a left side view, a right side view and a bottom view of a modified external lead shown in FIG. In the manufacture of this example, first, as shown in the perspective view of the electrode plate shown in FIG.
A metal upper electrode plate 5 having a thickness of 0.3 mm having a lead terminal portion 5a having a width of 2 mm and a length of 6 mm from the opposite two sides and a direction in which the lead terminals of the upper electrode plate 5 are projected. The lower electrode plate 6 having an inverted shape as an axis and the lead terminal 6a having the same width and thickness as the upper electrode plate 5 is
Each lead terminal is bent to have an outer diameter of 8 mm,
The lead terminal portion of the upper electrode plate and the lead terminal portion of the lower electrode plate are arranged above and below the element laminated body 8 in which six elements having a thickness of 0.5 mm are laminated so that the terminal portions do not overlap each other.
FIG. 1 shows an element laminated body 8 between an upper die 7 and a lower die 10 for resin injection molding, and a lead terminal 5 on the upper portion of the element laminated body 8.
FIG. 6 is a perspective view showing a positional relationship in which a lower electrode 6 having a lead terminal 6a is arranged on the lower surface of the upper electrode plate 5 having a and the element laminated body 8. 3 is a sectional view taken along the line AA of FIG. 1, and FIG. 4 is a sectional view showing the pressurized state of FIG.
As shown in FIGS. 1 to 3, the element laminate 8, the upper electrode plate 5, and the lower electrode plate 6 are placed in a lower injection-molding die 10 having a pressure pin 9 held at a temperature of 130 ° C. An upper die 7 for injection molding having a pressure pin 9 held at a temperature of 130 ° C. is covered, and the pressure pin 9 is designed to have a length to press the element laminate 8 at a pressure of about 20 kg / cm 2 in FIG. After closing the upper and lower molds 7 and 10 for injection molding with a mold clamping force of 70 t, a maximum injection pressure of 600 kg / 600 kg / After press-fitting from the resin injection port 11 at 10 cm 2 and cooling for 10 seconds after the press-fitting, the upper mold 7 for injection molding and the lower mold 10 were opened to perform molding as shown in the perspective view of FIG. An electric double layer capacitor having a length and width of 10 mm and a thickness of 5 mm was obtained.
【０００９】その後、図５（ａ）の成形品を曲げ金型に
て２段階に曲げ加工を施し、本発明の第１の実施例の図
５（ｂ）および図５（ｃ）に示す表面実装型電気二重層
コンデンサを得た。なお図５（ｂ）及び（ｃ）の外形を
より明確にするために図６，図７を示したことは前記し
たとおりである。Thereafter, the molded product of FIG. 5 (a) is subjected to a bending process in two steps by a bending die, and the surface shown in FIGS. 5 (b) and 5 (c) of the first embodiment of the present invention. A mountable electric double layer capacitor was obtained. As described above, FIGS. 6 and 7 are shown to clarify the outer shapes of FIGS. 5B and 5C.
【００１０】図８は本発明の他の実施例の正面図、左側
面図，右側面図及び上面図であり、また図９は図８の外
部リードの形を変えたものの正面図、左側面図，右側面
図及び下面図である。本第２の実施例においては、第１
の実施例と異なる点はリード端子と点対象で各辺より突
出させている。FIG. 8 is a front view, a left side view, a right side view and a top view of another embodiment of the present invention, and FIG. 9 is a front view and a left side view of a modified external lead shown in FIG. It is a figure, a right side view, and a bottom view. In the second embodiment, the first
The point different from the above embodiment is that the lead terminal is projected from each side in a point object.
【００１１】図１０は本発明の第１の実施例の初期実装
時の上面図，９０°回転させた時の上面図および１８０
°回転させて再び基板に実装したときの上面図である。
これより明らかなように、１８０°回転させても極性が
変化せず、また実装安定性の改善にもつながる。FIG. 10 is a top view of the first embodiment of the present invention at the time of initial mounting, a top view when rotated by 90 °, and 180.
FIG. 7 is a top view when the substrate is rotated and mounted again on the substrate.
As is clear from this, the polarity does not change even when rotated by 180 °, and the mounting stability is also improved.
【００１２】又、図８，図９に示す本発明の第２の実施
例によれば、上部及び下部電極板の垂直方向を軸に９０
°，１８０°，２７０°回転させても極性が変化せず、
また第１の実施例の表面実装他電気二重層コンデンサ以
上の実装安定性を有する。Further, according to the second embodiment of the present invention shown in FIGS. 8 and 9, the vertical axis of the upper and lower electrode plates is 90 degrees.
The polarity does not change even when rotated by °, 180 °, 270 °,
Further, it has mounting stability higher than that of the electric double layer capacitor of the surface mounting of the first embodiment.
【００１３】[0013]
【発明の効果】以上説明したように本発明は、それぞれ
に複数本のリード端子部を点対称に有し、そのため複数
組の極性を有することとなる上下一対の電極板の間に電
気二重層コンデンサ素子積層体を配置し、リード端子部
に曲げ加工を施した後、電極板の上下方向ら所定の圧力
を加えた状態で、溶融させた樹脂にて射出成形すること
により、リード端子部の極性が点対称となる電気二重層
コンデンサができ、その結果、実装方向を考える必要が
ないという効果を有する。As described above, according to the present invention, the electric double layer capacitor element is provided between the pair of upper and lower electrode plates which have a plurality of lead terminal portions in point symmetry and therefore have a plurality of sets of polarities. After arranging the laminated body and bending the lead terminal part, injection molding with molten resin under the condition that a predetermined pressure is applied from the vertical direction of the electrode plate, the polarity of the lead terminal part An electric double layer capacitor having point symmetry can be obtained, and as a result, it is not necessary to consider the mounting direction.
【００１４】また、本発明の電極板は複数本のリード端
子部を点対称に有し、下部電極板は上部電極板を反転さ
せて用いるため、上下リード端子板の形状が同じである
ので、上下リード端子板は同じ金型で打ち抜け、加工効
率がよく、また生産コストも低くできるという効果を有
する。Further, since the electrode plate of the present invention has a plurality of lead terminal portions in point symmetry and the lower electrode plate is used by reversing the upper electrode plate, the upper and lower lead terminal plates have the same shape. The upper and lower lead terminal plates can be punched with the same die, which has the effect of improving the processing efficiency and reducing the production cost.
【図１】本発明の一実施例のモールド成形金型にセット
する直前の状態を示す斜視図である。FIG. 1 is a perspective view showing a state immediately before setting in a molding die according to an embodiment of the present invention.
【図２】本発明の一実施例に使用する上部電極板及び下
部電極板の斜視図である。FIG. 2 is a perspective view of an upper electrode plate and a lower electrode plate used in one embodiment of the present invention.
【図３】本発明の一実施例の図１のＡ−Ａ線における断
面図である。FIG. 3 is a cross-sectional view taken along the line AA of FIG. 1 according to the embodiment of the present invention.
【図４】本発明の一実施例の図１を成形するために金型
にセットした直後の断面図である。FIG. 4 is a cross-sectional view immediately after being set in a mold for molding FIG. 1 of one embodiment of the present invention.
【図５】本発明の一実施例のモールド成形直後の斜視図
及び外部端子曲げ加工後の斜視図である。FIG. 5 is a perspective view immediately after molding of an embodiment of the present invention and a perspective view after external terminal bending.
【図６】本発明の一実施例の正面図，左側面図，右側面
図及び上面図である。FIG. 6 is a front view, a left side view, a right side view and a top view of an embodiment of the present invention.
【図７】本発明の一実施例の外部リードの曲げ加工が図
６と異なる場合その正面図，左側面図，右側面図及び下
面図である。FIG. 7 is a front view, a left side view, a right side view and a bottom view of a case where a bending process of an external lead according to an embodiment of the present invention is different from that of FIG.
【図８】本発明の他の実施例の正面図，左側面図，右側
面図及び上面図である。FIG. 8 is a front view, left side view, right side view and top view of another embodiment of the present invention.
【図９】本発明の他の実施例で外部リード加工が図８と
異なる場合の正面図，左側面図，右側面図及び下面図で
ある。9A and 9B are a front view, a left side view, a right side view and a bottom view in the case where the external lead processing is different from that of FIG. 8 in another embodiment of the present invention.
【図１０】本発明の第１の実施例の実装説明図で（ａ）
は初期実装時、（ｂ）は９０°回転時、（ｃ）は１８０
°回転して実装した時の上面図である。FIG. 10 is an explanatory diagram of the mounting of the first embodiment of the present invention (a)
Indicates initial mounting, (b) 90 ° rotation, (c) 180 °
It is a top view at the time of mounting by rotating by °.
【図１１】電気二重層コンデンサ素子の断面図である。FIG. 11 is a sectional view of an electric double layer capacitor element.
【図１２】従来の表面実装型電気二重層コンデンサの斜
視図である。FIG. 12 is a perspective view of a conventional surface mount type electric double layer capacitor.
【図１３】図１２に示す従来の表面実装型電気二重層コ
ンデンサの上面図である。13 is a top view of the conventional surface mount type electric double layer capacitor shown in FIG.
【図１４】従来の表面実装型電気二重層コンデンサの断
面図である。FIG. 14 is a cross-sectional view of a conventional surface mount type electric double layer capacitor.
１，２，１８ 樹脂外装 ３ａ，４ａ，５ａ，６ａ，１９ａ，２０ａ リード端
子部 ５，１９ 上部電極板 ６，２０ 下部電極板 ７ 上金型 ８ 素子積層体 ９ 加圧ピン １０ 下金型 １１ 樹脂射出出口 １２ 上金型位置合わせピン １３ 導電性セパレータ １４ カーボンペースト電極 １５ 多孔性セパレータ １６ 非導電性ガスケット １７ 素子 ２１ 基板側負極端子 ２２ 基板側正極端子 ５ａ 電気二重層コンデンサ側負極端子 ６ａ 電気二重層コンデンサ側正極端子1,2,18 Resin exterior 3a, 4a, 5a, 6a, 19a, 20a Lead terminal part 5,19 Upper electrode plate 6,20 Lower electrode plate 7 Upper mold 8 Element stack 9 Pressure pin 10 Lower mold 11 Resin injection outlet 12 Upper mold alignment pin 13 Conductive separator 14 Carbon paste electrode 15 Porous separator 16 Non-conductive gasket 17 Element 21 Substrate negative electrode terminal 22 Substrate positive electrode terminal 5a Electric double layer capacitor side negative electrode terminal 6a Electric two Multilayer capacitor side positive terminal
Claims (1)
気二重層コンデンサにおいて、電気二重層コンデンサ素
子積層体の上下面に、相対する辺より点対象に突出し、
モールド成形時の導出位置に合わせて曲げ加工されたリ
ードを有する上部電極板と、該上部電極板の中心軸に関
して反転させた形を有しリードが成形時の導出位置に合
わせて曲げ加工された下部電極板が配置され、前期電気
二重層コンデンサ素子およびリードの一部を除く上部電
極，下部電極がモールド樹脂により加圧・成形されてい
ることを特徴とする電気二重層コンデンサ。1. An electric double layer capacitor formed by molding with an insulating resin, wherein the electric double layer capacitor element laminate has a top and a bottom surface protruding pointwise from opposite sides,
An upper electrode plate having leads bent according to the lead-out position at the time of molding, and a lead having a shape inverted with respect to the central axis of the upper electrode plate was bent according to the lead-out position at the time of molding An electric double layer capacitor in which a lower electrode plate is arranged, and the upper electrode and the lower electrode excluding a part of the electric double layer capacitor element and the lead are pressed and molded by a molding resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5193404A JPH0750232A (en) | 1993-08-04 | 1993-08-04 | Electric double layered capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5193404A JPH0750232A (en) | 1993-08-04 | 1993-08-04 | Electric double layered capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0750232A true JPH0750232A (en) | 1995-02-21 |
Family
ID=16307394
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5193404A Pending JPH0750232A (en) | 1993-08-04 | 1993-08-04 | Electric double layered capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0750232A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100603052B1 (en) * | 1999-03-11 | 2006-07-24 | (주)에스와이하이테크 | Method of chip-type electric double layer capacitor |
| KR100688467B1 (en) * | 2005-11-04 | 2007-03-02 | 삼화전기주식회사 | Lead frame for solid state electrolytic capacitor |
| JP2018064051A (en) * | 2016-10-14 | 2018-04-19 | 株式会社トーキン | Electric double-layer capacitor |
-
1993
- 1993-08-04 JP JP5193404A patent/JPH0750232A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100603052B1 (en) * | 1999-03-11 | 2006-07-24 | (주)에스와이하이테크 | Method of chip-type electric double layer capacitor |
| KR100688467B1 (en) * | 2005-11-04 | 2007-03-02 | 삼화전기주식회사 | Lead frame for solid state electrolytic capacitor |
| JP2018064051A (en) * | 2016-10-14 | 2018-04-19 | 株式会社トーキン | Electric double-layer capacitor |
| US10566146B2 (en) | 2016-10-14 | 2020-02-18 | Tokin Corporation | Electric double-layer capacitor including a terminal having a protruding portion in an exterior body thereof |
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| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19990921 |