JPH07335800A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH07335800A JPH07335800A JP12602394A JP12602394A JPH07335800A JP H07335800 A JPH07335800 A JP H07335800A JP 12602394 A JP12602394 A JP 12602394A JP 12602394 A JP12602394 A JP 12602394A JP H07335800 A JPH07335800 A JP H07335800A
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- semiconductor device
- power device
- silicone gel
- sealed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、パワーデバイスとその
制御回路を複合化して組立てたインテリジェント・パワ
ーデバイスなどを対象とする半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for an intelligent power device or the like in which a power device and its control circuit are combined and assembled.
【０００２】[0002]
【従来の技術】頭記した半導体装置として、パワーデバ
イスと制御回路を２枚の基板に分けて構築し、両者を外
囲ケース内に組み込んでパッケージングした構成のもの
が知られている。ここで、パワーデバイスは基板にパワ
ー素子（ＭＯＳＦＥＴ，ＩＧＢＴなど）を搭載したもの
であり、制御回路は実装基板に制御回路を構成するＩＣ
チップ，抵抗器，コンデンサなどの各種電子部品を搭載
して構成されている。また、かかる半導体装置を周囲環
境から保護する手段として、外囲ケース内にシリコーン
ゲル，エポキシ樹脂などを充填，ないしはコーティング
して各素子を封止することが従来より実施されている。2. Description of the Related Art As the above-mentioned semiconductor device, there is known a semiconductor device having a structure in which a power device and a control circuit are separately constructed on two substrates, and both are assembled in an outer case and packaged. Here, the power device is one in which a power element (MOSFET, IGBT, etc.) is mounted on the substrate, and the control circuit is an IC that constitutes the control circuit on the mounting substrate.
It is configured by mounting various electronic components such as chips, resistors and capacitors. Further, as a means for protecting such a semiconductor device from the surrounding environment, it has been conventionally practiced to fill or coat the outer case with silicone gel, epoxy resin or the like to seal each element.
【０００３】[0003]
【発明が解決しようとする課題】ところで、前記した従
来構成のままでは耐環境に対する信頼性の面で次記のよ
うな問題が残る。すなわち、実使用の状態で半導体装置
が硫化水素ガス，亜硫酸ガス，アンモニアガス，ＮＯｘ
などの腐蝕性ガス、および湿度の高い湿気に長期間晒さ
れると、腐蝕性ガス，湿気がシリコーンゲルの封止層を
透過して制御回路の電子部品を腐蝕し、その結果として
制御回路が正常に動作しなくなってデバイス破壊を引き
起こすことがある。また、エポキシ樹脂で制御回路を直
接封止したものでは、外部からのガス，湿気の侵入を良
好に防ぐことができる反面、制御回路の電子部品とエポ
キシ樹脂との熱膨張率の差から温度サイクルに伴って加
わる機械的な応力で電子部品が破壊される問題があるほ
か、エポキシ樹脂中に含まれる不純物を低濃度に管理す
る必要があることからコスト的にも高価になる。By the way, with the conventional structure as described above, the following problems remain in terms of reliability with respect to environment resistance. That is, when the semiconductor device is actually used, hydrogen sulfide gas, sulfurous acid gas, ammonia gas, NOx
When exposed to corrosive gases such as, for example, and high humidity for a long period of time, the corrosive gases and moisture permeate the silicone gel sealing layer and corrode electronic components of the control circuit, resulting in normal control circuit. It may stop working and cause device destruction. Further, if the control circuit is directly sealed with epoxy resin, it is possible to prevent gas and moisture from entering from the outside, but on the other hand, due to the difference in the coefficient of thermal expansion between the electronic components of the control circuit and the epoxy resin, the temperature cycle In addition to the problem that the electronic stress is destroyed by the mechanical stress applied along with it, it is necessary to control the impurities contained in the epoxy resin to a low concentration, which increases the cost.
【０００４】なお、制御回路に使われる電子部品とし
て、最近では特に耐湿，腐蝕対策を強化した製品も市場
に出回っているが、このような製品は高価であって前記
の半導体装置に採用するとコスト高となる。本発明は上
記の点にかんがみなされたものであり、パワーデバイス
と制御回路と複合化した半導体装置を対象に、安価で信
頼性の高い耐環境性が確保できるようにした半導体装置
を提供することを目的とする。Recently, as electronic parts used in control circuits, products having particularly enhanced resistance to moisture and corrosion have been on the market, but such products are expensive and costly if they are used in the semiconductor device. It becomes high. SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and provides a semiconductor device in which a power device and a control circuit are combined and a cheap and reliable environment resistance can be secured. With the goal.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
に、本発明によれば、制御回路の電子部品に対して、そ
の表面を耐湿, ガスバリア性を有するコーティング剤で
スポットコートするものとする。ここで、前記のコーテ
ィング剤にはポリエーテルアミド，またはフッ素樹脂系
のコーティング剤を用い、その膜厚を１００μｍ以下に
して電子部品にスポットコートするのがよい。In order to achieve the above object, according to the present invention, an electronic component of a control circuit is spot-coated on its surface with a coating agent having moisture resistance and gas barrier properties. . Here, it is preferable that a polyether amide or fluororesin-based coating agent is used as the above-mentioned coating agent, and the thickness thereof is set to 100 μm or less to perform spot coating on electronic components.
【０００６】また、前記のように制御回路の電子部品に
コーティングを施した半導体装置は、具体的には次記の
ようなパッケージ構造を採用して実施することができ
る。 （１）制御回路, パワーデバイスを外囲ケースと組合わ
せたベース板上に並置搭載し、かつ外囲ケース内に充填
したシリコーンゲルで封止する。 （２）前項（１）において、シリコーンゲルの上面に空
隙を残して、外囲ケースの上面を蓋板でカバーするか、
あるいはシリコーンゲルの上面をエポキシ樹脂で封止す
る。Further, the semiconductor device in which the electronic components of the control circuit are coated as described above can be implemented by specifically adopting the following package structure. (1) A control circuit and a power device are mounted side by side on a base plate combined with an outer case, and sealed with a silicone gel filled in the outer case. (2) In the above item (1), the upper surface of the silicone gel may be left with a gap and the upper surface of the enclosure case may be covered with a lid plate, or
Alternatively, the upper surface of the silicone gel is sealed with epoxy resin.
【０００７】（３）制御回路，パワーデバイスを上下段
に並べて囲ケース内に組み込み、かつパワーデバイスを
シリコーンゲルで封止するとともに、制御回路をシリコ
ーンゲルの上に充填したエポキシ樹脂の層内に埋設して
封止する。(3) The control circuit and the power device are arranged vertically and assembled in an enclosure, the power device is sealed with silicone gel, and the control circuit is placed in a layer of epoxy resin filled on the silicone gel. Buried and sealed.
【０００８】[0008]
【作用】上記のようにパッケージとともに外囲ケース内
に組み込んだ制御回路の個々の電子部品に対して、その
表面に耐湿，ガスバリア性の高いポリエーテルアミド，
またはフッ素樹脂系のコーティング剤をスポットコート
することにより耐環境性が大幅に向上し、その周囲をシ
リコーンゲルで封止しただけでも十分な信頼性が確保で
き、かつコーティング剤の使用量も最小必要量となるの
で経済的である。また、制御回路をエポキシ樹脂の層内
に埋設した封止構造を採用した場合でも、前記のコーテ
ィング剤が機械的な応力に対する緩衝材として機能し、
温度サイクルに起因する応力破壊から電子部品を安全に
保護できる。[Function] For each electronic component of the control circuit incorporated in the outer casing together with the package as described above, a polyether amide having a high moisture resistance and a high gas barrier property on its surface,
Alternatively, spot coating with a fluororesin coating agent greatly improves the environment resistance, and sufficient reliability can be secured by simply sealing the area with silicone gel, and the amount of coating agent used must be minimal. It is economical because it becomes a quantity. Further, even when the sealing structure in which the control circuit is embedded in the epoxy resin layer is adopted, the coating agent functions as a cushioning material against mechanical stress,
Electronic components can be safely protected from stress fracture due to temperature cycle.
【０００９】[0009]
【実施例】以下、本発明の実施例を図面に基づいて説明
する。図１は本発明の基本構造を示すものである。図に
おいて、１は制御回路用実装基板であり、該基板上には
メルフタイプ抵抗器２，チップコンデンサ３，パッケー
ジ構造のＩＣ４，チップ抵抗器５，ベアＩＣチップ６な
どを実装して制御回路７を構成している。なお、８はベ
アＩＣチップ６にコーティングしたエポキシコート樹脂
である。そして、かかる構成の制御回路７に対し、耐環
境性の高いパッケージ構造のＩＣ４，およびエポキシ樹
脂でコートされているＩＣチップ６を除いて、メルフタ
イプ抵抗器２，チップコンデンサ３，チップ抵抗器５，
ベアＩＣチップ６などの各部品の表面には、個別に耐
湿，ガスバリア性の高いコーティング剤９がスポットコ
ート（部分コート）されている。ここで、前記コーティ
ング剤９には、具体的にポリエーテルアミド，またはフ
ッ素樹脂系のコーティング剤を用い、かつその膜厚ｔは
後記のように機械的応力の緩衝機能を持たせるために１
００μｍ程度ないしそれ以下とするのがよい。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the basic structure of the present invention. In the figure, reference numeral 1 denotes a control circuit mounting board, on which a melf type resistor 2, a chip capacitor 3, an IC 4 having a package structure, a chip resistor 5, a bare IC chip 6 and the like are mounted to mount a control circuit 7. I am configuring. In addition, 8 is an epoxy coat resin coated on the bare IC chip 6. With respect to the control circuit 7 having such a configuration, the melf type resistor 2, the chip capacitor 3, the chip resistor 5, except the IC 4 having a package structure with high environment resistance and the IC chip 6 coated with epoxy resin.
The surface of each component such as the bare IC chip 6 is individually spot-coated with a coating agent 9 having high moisture resistance and gas barrier properties. Here, as the coating agent 9, specifically, a polyether amide or fluororesin type coating agent is used, and its film thickness t is 1 in order to have a mechanical stress buffering function as described later.
The thickness is preferably about 00 μm or less.
【００１０】次に、図１で述べた制御回路７をパワーデ
バイスと組合わせてパッケージングした半導体装置の実
施例を図２，図３，図４に示す。なお、各図において、
１０は基板１０ａにＩＧＢＴなどのパワーチップ１０ｂ
を搭載したパワーデバイス、１１は放熱用ベース板、１
２は外囲ケース、１３は外部導出端子である。まず、図
２の実施例においては、制御回路７，およびパワーデバ
イス１０が外囲ケース１２と組合わせたベース板１１の
上に並置して搭載されており、かつ外囲ケース１２に充
填したシリコーンゲル１４で封止されている。そしてシ
リコーンゲル１４の上面との間に0.５mm以上の間隙を残
して外囲ケース１２の上面がケースに被着した上蓋１２
ａでカバーされている。An embodiment of a semiconductor device in which the control circuit 7 described in FIG. 1 is packaged in combination with a power device is shown in FIGS. In each figure,
10 is a power chip 10b such as an IGBT on a substrate 10a.
Power device equipped with, 11 is a base plate for heat dissipation, 1
Reference numeral 2 is an outer case, and 13 is an external lead terminal. First, in the embodiment shown in FIG. 2, the control circuit 7 and the power device 10 are mounted side by side on the base plate 11 combined with the outer case 12, and the outer case 12 is filled with silicone. It is sealed with gel 14. The upper surface of the outer case 12 is attached to the case 12 leaving a gap of 0.5 mm or more with the upper surface of the silicone gel 14.
Covered by a.
【００１１】また、図３に示す実施例では、図１と同様
にパワーデバイス１０，制御回路７がベース板１１の上
に並置され、かつパワーデバイス，制御回路がシリコー
ンゲル１４で封止されているのに対し、シリコーンゲル
１４を図１の上蓋１２ａに代えて外囲ケース１２の上面
側にエポキシ樹脂１５を充填した封止構造を採用してい
る。In the embodiment shown in FIG. 3, the power device 10 and the control circuit 7 are juxtaposed on the base plate 11 as in FIG. 1, and the power device and the control circuit are sealed with a silicone gel 14. In contrast, the silicone gel 14 is replaced with the upper lid 12a of FIG. 1 and a sealing structure in which the upper surface side of the outer casing 12 is filled with an epoxy resin 15 is adopted.
【００１２】さらに、図４の実施例では、パワーデバイ
ス１０をベース板１１の上に搭載し、制御回路７はパワ
ーデバイス１０の上方に並んで二階建式に構築されてお
り、ここで、パワーデバイス１０はシリコーンゲル１４
で封止され、制御回路７は外囲ケース１２の上面側に充
填したエポキシ樹脂１５の層内に埋設して封止されてい
る。なお、１６はパワーデバイス１０の基板と制御回路
７の実装基板との間に架け渡した内部接続端子、１７は
外部導出端子１３を支持した端子ブロックである。かか
る封止構造によれば、制御回路７の各電子部品にスポッ
トコートしたコーティング剤９が本来の封止機能のほか
に、温度サイクルによりエポキシ樹脂１５から電子部品
に加わる応力の緩衝材として機能し、電子部品を応力破
壊から防護する。Further, in the embodiment shown in FIG. 4, the power device 10 is mounted on the base plate 11, and the control circuit 7 is constructed in a two-story structure alongside the power device 10. Device 10 is silicone gel 14
The control circuit 7 is embedded in a layer of the epoxy resin 15 filled on the upper surface side of the outer casing 12 and sealed. Reference numeral 16 is an internal connection terminal provided between the substrate of the power device 10 and the mounting board of the control circuit 7, and 17 is a terminal block supporting the external lead-out terminal 13. According to such a sealing structure, the coating agent 9 spot-coated on each electronic component of the control circuit 7 has an original sealing function and also functions as a buffer for the stress applied from the epoxy resin 15 to the electronic component by the temperature cycle. , Protect electronic components from stress breakdown.
【００１３】[0013]
【発明の効果】以上述べたように本発明の構成によれ
ば、湿気，腐蝕性ガスなどを含む過酷な周囲環境の条件
でも制御回路部品の腐蝕，破壊を防いで安全に適用可能
な高信頼性の半導体装置を低コストで提供することがで
きる。As described above, according to the structure of the present invention, the control circuit parts are prevented from being corroded and destroyed even under severe environmental conditions including moisture, corrosive gas, etc. A highly reliable semiconductor device can be provided at low cost.
【図１】本発明実施例の半導体装置に組み込んだ制御回
路の構成図FIG. 1 is a configuration diagram of a control circuit incorporated in a semiconductor device according to an embodiment of the present invention.
【図２】図１の制御回路を採用した本発明実施例の組立
構成図FIG. 2 is an assembly configuration diagram of an embodiment of the present invention which employs the control circuit of FIG.
【図３】図２と異なる実施例の組立構成図FIG. 3 is an assembly configuration diagram of an embodiment different from FIG.
【図４】図３とさらに異なる実施例の組立構成図FIG. 4 is an assembly configuration diagram of an embodiment different from that of FIG. 3;
１ 制御回路用実装基板 ２〜６ 電子部品 ７ 制御回路 ９ コーティング剤 １０ パワーデバイス １２ 外囲ケース １４ シリコーンゲル １５ エポキシ樹脂 DESCRIPTION OF SYMBOLS 1 Mounting board for control circuit 2-6 Electronic component 7 Control circuit 9 Coating agent 10 Power device 12 Enclosure case 14 Silicone gel 15 Epoxy resin
Claims (6)
せてパッケージングした半導体装置であり、制御回路が
パワーデバイスと分離独立した実装基板に電子部品を搭
載してなるものにおいて、制御回路の電子部品に対し
て、その表面を耐湿, ガスバリア性を有するコーティン
グ剤でスポットコートしたことを特徴とする半導体装
置。1. A semiconductor device in which a power device and a control circuit for the power device are combined and packaged, wherein the control circuit has electronic components mounted on a mounting substrate separate from and independent of the power device. A semiconductor device in which the surface of a component is spot-coated with a coating agent having moisture resistance and gas barrier properties.
ティング剤がポリエーテルアミド，またはフッ素樹脂系
のコーティング剤であり、膜厚を１００μｍ以下にして
電子部品にコートしたことを特徴とする半導体装置。2. The semiconductor device according to claim 1, wherein the coating agent is a polyether amide or fluororesin type coating agent, and the electronic component is coated to a thickness of 100 μm or less. .
回路, パワーデバイスを外囲ケースと組合わせたベース
板上に並置搭載し、かつ外囲ケース内に充填したシリコ
ーンゲルで封止したことを特徴とする半導体装置。3. The semiconductor device according to claim 1, wherein the control circuit and the power device are mounted side by side on a base plate combined with the outer case and sealed with a silicone gel filled in the outer case. A semiconductor device characterized by:
コーンゲルの上面に空隙を残して、外囲ケースの上面を
蓋板でカバーしたことを特徴とする半導体装置。4. The semiconductor device according to claim 3, wherein the upper surface of the silicone case is covered with a lid plate while leaving a void on the upper surface of the silicone gel.
コーンゲルの上面をエポキシ樹脂で封止したことを特徴
とする半導体装置。5. The semiconductor device according to claim 3, wherein the upper surface of the silicone gel is sealed with an epoxy resin.
回路，パワーデバイスを上下段に並べて囲ケース内に組
み込み、かつパワーデバイスをシリコーンゲルで封止す
るとともに、制御回路をシリコーンゲルの上に充填した
エポキシ樹脂の層内に埋設して封止したことを特徴とす
る半導体装置。6. The semiconductor device according to claim 1, wherein the control circuit and the power device are vertically arranged and assembled in an enclosure, the power device is sealed with silicone gel, and the control circuit is provided on the silicone gel. A semiconductor device characterized by being embedded and sealed in a layer of filled epoxy resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12602394A JPH07335800A (en) | 1994-06-08 | 1994-06-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12602394A JPH07335800A (en) | 1994-06-08 | 1994-06-08 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07335800A true JPH07335800A (en) | 1995-12-22 |
Family
ID=14924799
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12602394A Pending JPH07335800A (en) | 1994-06-08 | 1994-06-08 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07335800A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001053814A3 (en) * | 2000-01-22 | 2002-04-25 | Bosch Gmbh Robert | Gas sensor with a gel layer for determination of moisture content |
| US6828706B2 (en) | 2003-01-17 | 2004-12-07 | Sanyo Denki Co., Ltd. | Watertight brushless fan motor |
-
1994
- 1994-06-08 JP JP12602394A patent/JPH07335800A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001053814A3 (en) * | 2000-01-22 | 2002-04-25 | Bosch Gmbh Robert | Gas sensor with a gel layer for determination of moisture content |
| US6828706B2 (en) | 2003-01-17 | 2004-12-07 | Sanyo Denki Co., Ltd. | Watertight brushless fan motor |
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