JPH07264036A - Multiple optical axes photoelectric switch - Google Patents

Multiple optical axes photoelectric switch

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Publication number
JPH07264036A
JPH07264036A JP5410394A JP5410394A JPH07264036A JP H07264036 A JPH07264036 A JP H07264036A JP 5410394 A JP5410394 A JP 5410394A JP 5410394 A JP5410394 A JP 5410394A JP H07264036 A JPH07264036 A JP H07264036A
Authority
JP
Japan
Prior art keywords
light
output
signal
light receiving
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5410394A
Other languages
Japanese (ja)
Inventor
Kunio Tanaka
邦夫 田中
Maki Yasumoto
真樹 安本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Keyence Corp
Original Assignee
Keyence Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Keyence Corp filed Critical Keyence Corp
Priority to JP5410394A priority Critical patent/JPH07264036A/en
Publication of JPH07264036A publication Critical patent/JPH07264036A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To detect a state that the light from a light projecting element is shielded with high accuracy by providing plural amplifier means individually amplifying the output of each of plural light receiving elements and plural selection means selecting this output. CONSTITUTION:Light is successively projected from plural light projecting elements 7a to 7c and light is individually projected to plural light receiving elements 8a to 8c. The output of each of the light receiving elements 8a to 8c is amplified by amplifier means 9a to 9c and each output is selected by a selection means in accordance with a light projecting order. By the selected output of the amplifier means, the light shielding state between the light projecting elements 7a to 7c and the light receiving elements 8a to 8c is detected. When the amplifier means 9a to 9c are made to perform an amplifying operation, the selection means selects the output amplified by the amplifier means 9a to 9c by interlocking with the operation. When the amplifier means 9a to 9c are not made to perform the amplifier operation, the selection means does not select the outputs of the amplifier means 9a to 9c by interlocking with the operation. Thus, the selection means is capable of selecting only the outputs of the light receiving element receiving the light from the light projecting element.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、投光素子からの光の遮
光状態を高精度に検出する多光軸光電スイッチに関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-optical axis photoelectric switch for detecting a light blocking state from a light projecting element with high accuracy.

【0002】[0002]

【従来の技術】プレス装置、作業用ロボット等の安全装
置には、複数の投光素子及び受光素子を備えている多光
軸光電スイッチが用いられる。図3は従来のこの種の多
光軸光電スイッチの構成を示すブロック図である。クロ
ック発生回路1により発生させたクロック及び発光制御
回路2から出力される制御信号はタイミング発生回路3
へ入力される。タイミング発生回路3の出力信号は投光
素子切替回路4及び信号合成回路5a,5b,5cへ与えられ
る。投光素子切替回路4から出力される信号は信号合成
回路5a,5b,5cへ入力され、その出力信号は各別に、駆動
回路6a,6b,6cへ入力される。駆動回路6a,6b,6cの出力信
号は各別に、例えば発光ダイオードからなる投光素子7
a,7b,7cへ入力され、これらにより投光部LAが構成され
ている。
2. Description of the Related Art A multi-optical axis photoelectric switch having a plurality of light projecting elements and light receiving elements is used for a safety device such as a press device and a work robot. FIG. 3 is a block diagram showing the configuration of a conventional multi-optical axis photoelectric switch of this type. The clock generated by the clock generation circuit 1 and the control signal output from the light emission control circuit 2 are the timing generation circuit 3
Is input to. The output signal of the timing generating circuit 3 is given to the light projecting element switching circuit 4 and the signal synthesizing circuits 5a, 5b, 5c. The signal output from the light projecting element switching circuit 4 is input to the signal synthesizing circuits 5a, 5b, 5c, and the output signals thereof are input to the drive circuits 6a, 6b, 6c separately. The output signals of the drive circuits 6a, 6b and 6c are separately output from the light emitting elements 7 such as light emitting diodes.
The light is input to a, 7b, 7c, and these constitute a light projecting unit LA.

【0003】ホトダイオードからなる受光素子8a,8b,8c
の出力信号は、各別にアンプ9a,9b,9cへ入力される。ア
ンプ9a,9b,9cの出力信号は各別にゲート回路10a,10b,10
c へ入力され、ゲート回路10a,10b,10c の出力信号はコ
ンデンサC1 、抵抗R1 の直列回路を介してアンプ11a
へ入力される。アンプ11a の出力信号はアンプ11b へ入
力され、その出力信号は一側入力端子に基準電圧Vref
が入力されているコンパレータ12の他側入力端子へ入力
される。コンパレータ12の出力信号は同期信号検出回路
13及び信号検波回路14へ入力される。
Light receiving elements 8a, 8b, 8c composed of photodiodes
The output signals of are separately input to the amplifiers 9a, 9b, 9c. The output signals of the amplifiers 9a, 9b, 9c are gate circuits 10a, 10b, 10 separately.
The output signals of the gate circuits 10a, 10b and 10c are input to the amplifier c and are output to the amplifier 11a via the series circuit of the capacitor C 1 and the resistor R 1.
Is input to. The output signal of the amplifier 11a is input to the amplifier 11b, and the output signal is applied to the reference voltage V ref at one input terminal.
Is input to the other input terminal of the comparator 12. The output signal of the comparator 12 is a sync signal detection circuit.
13 and the signal detection circuit 14.

【0004】同期信号検出回路13の出力信号はタイミン
グ発生回路15へ入力され、その出力信号はゲート信号と
してゲート回路10a,10b,10c へ与えられる。タイミング
発生回路15の出力信号は、信号検波回路14へ入力され
る。信号検波回路14は、コンパレータ12から投光の1走
査における一連の信号が入力された場合に信号を出力す
るようになっている。これらにより受光部LBを構成して
いる。なお、投光素子7a,7b,7cの投光面と、受光素子8
a,8b,8cの受光面とが対向している。
The output signal of the sync signal detection circuit 13 is input to the timing generation circuit 15, and the output signal is given to the gate circuits 10a, 10b and 10c as gate signals. The output signal of the timing generation circuit 15 is input to the signal detection circuit 14. The signal detection circuit 14 is adapted to output a signal when a series of signals in one scan of light projection is input from the comparator 12. These constitute the light receiving section LB. In addition, the light projecting surfaces of the light projecting elements 7a, 7b, and 7c and the light receiving element 8
The light receiving surfaces of a, 8b, and 8c face each other.

【0005】次にこの多光軸光電スイッチの動作を、各
部信号のタイミングチャートを示す図4とともに説明す
る。投光部LAのタイミング発生回路3から出力される信
号により投光素子切替回路4及び信号合成回路5a,5b,5c
を制御して、投光素子7a,7b,7cを駆動する。そうすると
投光素子7a,7b,7cが図4(a),(b),(c) に示すように、先
ず4パルスの光同期信号LSYC を同時に投光し、続いて
投光素子7a,7b,7cの順に、光同期信号LSYCからの遅れ
時間が異なる3パルスの光信号LS を投光する。
Next, the operation of the multi-optical axis photoelectric switch will be described with reference to FIG. 4 which shows a timing chart of signals at respective parts. The light emitting element switching circuit 4 and the signal synthesizing circuits 5a, 5b, 5c according to the signal output from the timing generating circuit 3 of the light projecting unit LA.
Is controlled to drive the light projecting elements 7a, 7b, 7c. Then, the light projecting elements 7a, 7b, 7c project the four-pulse optical synchronizing signal L SYC at the same time, as shown in FIGS. 4 (a), (b), and (c), and then the light projecting elements 7a, 7b, 7c. Three-pulse optical signal L S with a different delay time from the optical synchronization signal L SYC is projected in the order of 7b and 7c.

【0006】一方、光同期信号LSYC が投光されるとき
には、タイミング発生回路15から図4(d),(e),(f) に示
すようにゲート信号G1,G2,G3を同時に所定時間立上げ
て、ゲート回路10a,10b,10c をともにオンさせる。また
光同期信号LSYC を受光した受光素子8a,8b,8cの出力信
号をアンプ9a,9b,9cが増幅し、アンプ9a,9b,9cの出力信
号S1 ,S2 ,S3 は図4(g),(h),(i) に示すように光
同期信号LSYC に応じてレベル変化し、つまりアンプ9
a,9b,9cから同期信号VSYC を出力する。
On the other hand, when the optical synchronization signal L SYC is projected, the timing generation circuit 15 outputs the gate signals G1, G2 and G3 simultaneously for a predetermined time as shown in FIGS. 4 (d), (e) and (f). Start up and turn on the gate circuits 10a, 10b, 10c together. Further, the output signals of the light receiving elements 8a, 8b, 8c receiving the optical synchronization signal L SYC are amplified by the amplifiers 9a, 9b, 9c, and the output signals S 1 , S 2 , S 3 of the amplifiers 9a, 9b, 9c are shown in FIG. As shown in (g), (h), and (i), the level changes according to the optical synchronization signal L SYC , that is, the amplifier 9
The synchronizing signal V SYC is output from a, 9b, 9c.

【0007】アンプ9a,9b,9cの出力信号S1 , S2 , S
3 はゲート回路10a,10b,10c を各別に通ってアンプ11a,
11b へ順次入力されて増幅され、コンパレータ12で2値
信号に変換して同期信号検出回路13へ入力される。同期
信号検出回路13が同期信号V SYC を検出し、受光対象の
同期信号VSYC と判定するとタイミング発生回路15に制
御指令信号を与える。そうするとタイミング発生回路15
は、図4(d),(e),(f)に示すように光信号LS , LS ,
S に対応してゲート信号G1,G2,G3を所定時間立上げ
る。これにより、投光素子7a,7b,7cからの光信号LS ,
S , LS を受光した受光素子8a,8b,8cの出力信号がア
ンプ9a,9b,9cにより増幅され、アンプ9a,9b,9cの出力信
号S1 , S2 , S3 は各別にゲート回路10a,10b,10c か
ら出力される。そして投光素子7a,7b,7cのいずれの投光
も遮光していない場合は、出力信号S1 , S2 , S3
2値化した信号がコンパレータ12から出力され、それに
よって非遮光状態を検出する。
Output signals S of the amplifiers 9a, 9b, 9c1 , S2 , S
3Passes through the gate circuits 10a, 10b, 10c separately and the amplifier 11a,
It is sequentially input to 11b, amplified, and binary by comparator 12.
It is converted into a signal and input to the synchronization signal detection circuit 13. Sync
The signal detection circuit 13 outputs the synchronization signal V SYCOf the light receiving target
Sync signal VSYCIf it is determined that the timing generation circuit 15
Give a command signal. Then the timing generation circuit 15
Is the optical signal L as shown in FIGS. 4 (d), (e) and (f).S, LS,
LSCorresponding to, rising the gate signals G1, G2, G3 for a predetermined time
It Thereby, the optical signal L from the light projecting elements 7a, 7b, 7cS,
LS, LSThe output signals of the photo detectors 8a, 8b, and 8c that received
Amplifiers 9a, 9b, 9c, and output signals of amplifiers 9a, 9b, 9c
Issue S1 , S2 , S3Are the gate circuits 10a, 10b, 10c
Is output from Any of the light emitting elements 7a, 7b, 7c
Output signal S1 , S2 , S3To
The binarized signal is output from the comparator 12,
Therefore, the non-light-shielded state is detected.

【0008】ここで、例えば投光素子7bの投光を遮光板
Aにより遮光した場合には、受光素子8bは投光素子7bか
らの光を受光せず、投光素子7a,7c からの漏れ光を受光
してアンプ9bの出力信号S2 は図4(h) に示す如く投光
素子7a,7c からの漏れ光により僅かな信号レベル変化を
する。また受光素子8a(8c)は投光素子7a(7c)からの光を
受光し、投光素子7bからの漏れ光を受光してアンプ9a(9
c)の出力信号S1 (S 3 )は図4(g)((i))に示すよう
に、投光素子7a(7c)からの光によって最も大きいレベル
変化をし、投光素子7a(7c)以外の投光素子7b,7c(7a,7b)
からの漏れ光によって僅かなレベル変化をすることにな
る。
Here, for example, a light-shielding plate for the light projected by the light projecting element 7b
When the light is shielded by A, the light receiving element 8b is the light emitting element 7b.
Light from the light emitting elements 7a and 7c
Output signal S of amplifier 9b2Is projected as shown in Fig. 4 (h)
Leaked light from the elements 7a and 7c causes a slight change in signal level.
To do. The light receiving element 8a (8c) receives light from the light emitting element 7a (7c).
The light is received and the leaked light from the light emitting element 7b is received, and the amplifier 9a (9
Output signal S of c)1(S 3) Is as shown in Fig. 4 (g) ((i))
The maximum level due to the light from the light emitting element 7a (7c)
Projecting elements 7b, 7c (7a, 7b) other than the projecting element 7a (7c)
There is a slight level change due to leakage light from the
It

【0009】そして、タイミング発生回路15により、前
述したように投光素子7a,7b,7cからの光信号LS に同期
して図4(d),(e),(f) に示すごとくゲート信号G1,G2,G3
を択一的に順次立上げていくと、図4(j) に示すよう
に、先ずゲート回路10a から光信号LS に対応したアン
プ9aの出力信号S1 が出力される。次にゲート回路10b
からアンプ9bの出力信号S2 が出力されることになる
が、受光素子8bは受光していないためアンプ9bの出力信
号S2 は出力されない。
Then, as described above, the timing generation circuit 15 synchronizes with the optical signals L S from the light projecting elements 7a, 7b and 7c, as shown in FIGS. 4 (d), (e) and (f). Signal G1, G2, G3
As shown in FIG. 4 (j), first, the gate circuit 10a outputs the output signal S 1 of the amplifier 9a corresponding to the optical signal L S. Next, gate circuit 10b
Although the output signal S 2 of the amplifier 9b is output from the optical receiver, the output signal S 2 of the amplifier 9b is not output because the light receiving element 8b does not receive light.

【0010】しかし、受光素子8a,8c は投光素子7bから
の漏れ光を受光しており、アンプ9a,9c からは出力信号
1 ,S3 が僅かに出力されていて、この出力信号
1 ,S 3 がオフしているゲート回路10a,10c の寄生容
量C0 を介して出力される。その後、ゲート回路10c が
オンして、ゲート回路10c から光信号LS に対応したア
ンプ9cの出力信号S3 が出力される。そしてこの順序で
出力された図4(j) に示す出力信号SG1 はアンプ11a,11
b に順次入力されて増幅され、アンプ11b からは図4
(k) に示すように増幅された出力信号SG2 を出力してコ
ンパレータ12へ入力し、コンパレータ12から出力信号SG
2 を2値信号に変換した信号を出力する。
However, the light receiving elements 8a and 8c are
It receives the leaked light and outputs the output signal from the amplifiers 9a and 9c.
S1, S3Is output slightly, and this output signal
S1, S 3The parasitic capacitance of the gate circuits 10a and 10c in which the
Quantity C0Is output via. After that, the gate circuit 10c
When turned on, the optical signal L from the gate circuit 10cSCorresponding to
Output signal S of pump 9c3Is output. And in this order
The output signal SG1 shown in Fig. 4 (j) is output from the amplifiers 11a and 11a.
The signals are sequentially input to b and amplified, and from the amplifier 11b, as shown in FIG.
As shown in (k), the amplified output signal SG2 is output and
Input to comparator 12 and output signal SG from comparator 12.
It outputs a signal that is a binary signal converted from 2.

【0011】[0011]

【発明が解決しようとする課題】前述したように従来の
多光軸光電スイッチは、複数の受光素子夫々の出力信号
を受光素子と対応させた夫々のアンプを常に増幅動作さ
せる。そしてそれらのアンプの出力信号を異なるタイミ
ングでゲート回路をオンさせて順次出力させているた
め、ゲート回路のアナログスイッチはオフ状態であって
も、その入, 出力端子間に寄生容量が存在し、入力され
た信号を完全に遮断し得ない。そのため、複数の投光素
子のうちの1つの投光素子の投光を、それと対応する受
光素子が受光しないように遮光した場合、その受光素子
の出力信号は消滅するが、他の受光素子は、遮光してい
る光の漏れ光を受光しており、漏れ光に応じた信号を出
力しアンプで増幅する。そしてアンプの出力信号がオフ
しているゲート回路の寄生容量C0 を介してゲート回路
から漏出されることになる。このようにして漏出した信
号が後段のアンプで更に増幅され、受光素子があたかも
受光している如き、出力信号が出力されて、投光素子と
受光素子間の遮光状態を誤検出する虞れがあるという問
題がある。
As described above, in the conventional multi-optical axis photoelectric switch, the respective amplifiers which correspond the output signals of the plurality of light receiving elements to the light receiving elements are always amplified. Since the output signals of these amplifiers are sequentially output by turning on the gate circuit at different timings, even if the analog switch of the gate circuit is in the off state, parasitic capacitance exists between its input and output terminals. The input signal cannot be completely cut off. Therefore, when the light emitted from one light emitting element of the plurality of light emitting elements is blocked so that the light receiving element corresponding thereto does not receive the light, the output signal of the light receiving element disappears, but the other light receiving elements do not. The leaked light of the blocked light is received, and a signal corresponding to the leaked light is output and amplified by an amplifier. Then, the output signal of the amplifier is leaked from the gate circuit via the parasitic capacitance C 0 of the gate circuit which is off. The signal leaked in this way is further amplified by the amplifier in the subsequent stage, and an output signal is output as if the light receiving element is receiving light, and there is a risk that the light blocking state between the light emitting element and the light receiving element may be erroneously detected. There is a problem.

【0012】本発明は斯かる問題に鑑み、ゲート回路の
寄生容量の影響をうけずに、投光素子からの光を遮光し
た状態を高精度に検出する多光軸光電スイッチを提供す
ることを目的とする。
In view of such a problem, the present invention provides a multi-optical axis photoelectric switch for detecting a state in which light from a light projecting element is shielded with high accuracy without being affected by a parasitic capacitance of a gate circuit. To aim.

【0013】[0013]

【課題を解決するための手段】第1発明に係る多光軸光
電スイッチは、複数の投光素子から順次、光を投光して
複数の受光素子へ各別に投光し、その投光順序に応じて
受光素子の出力を選択して、選択した出力により投光素
子と受光素子との間の遮光状態を検出する多光軸光電ス
イッチにおいて、前記複数の受光素子夫々の出力を各別
に増幅する複数の増幅手段と、該増幅手段夫々の出力を
選択する複数の選択手段とを備え、増幅手段及び選択手
段を連動すべく構成してあることを特徴とする。
SUMMARY OF THE INVENTION A multi-optical axis photoelectric switch according to a first aspect of the present invention sequentially projects light from a plurality of light projecting elements and individually projects light to a plurality of light receiving elements, and the order of projecting the light. In the multi-optical axis photoelectric switch that selects the output of the light receiving element according to the above, and detects the light blocking state between the light emitting element and the light receiving element based on the selected output, the output of each of the plurality of light receiving elements is amplified separately. A plurality of amplifying means and a plurality of selecting means for selecting respective outputs of the amplifying means, and the amplifying means and the selecting means are configured to interlock with each other.

【0014】第2発明に係る多光軸光電スイッチは、複
数の投光素子から順次、光を投光して複数の受光素子へ
各別に投光し、その投光順序に応じて受光素子の出力を
選択して、選択した出力により投光素子と受光素子との
間の遮光状態を検出する多光軸光電スイッチにおいて、
前記複数の受光素子夫々の出力を各別に増幅する複数の
アンプと、該アンプ夫々の出力を選択する複数のゲート
回路とを備え、アンプと該アンプと対応するゲート回路
とを、共通の信号により駆動すべく構成してあることを
特徴とする。
In the multi-optical axis photoelectric switch according to the second aspect of the invention, light is sequentially projected from a plurality of light projecting elements and separately projected to a plurality of light receiving elements, and the light receiving elements of the light receiving elements are arranged in accordance with the order of light projection. In the multi-optical axis photoelectric switch that selects the output and detects the light blocking state between the light emitting element and the light receiving element by the selected output,
A plurality of amplifiers that individually amplify the outputs of the plurality of light-receiving elements, and a plurality of gate circuits that select the outputs of the amplifiers are provided, and the amplifiers and the gate circuits corresponding to the amplifiers are provided by a common signal. It is characterized in that it is configured to be driven.

【0015】[0015]

【作用】第1発明では、複数の投光素子から順次、光を
投光して複数の受光素子へ各別に投光する。受光素子夫
々の出力を増幅手段により増幅し、増幅手段夫々の出力
を、選択手段により投光順序に応じて選択する。選択し
た増幅手段の出力により、投光素子と受光素子との間の
遮光状態を検出する。増幅手段を増幅動作させる場合、
それに連動して選択手段は増幅手段により増幅した出力
を選択する。増幅手段を増幅動作させない場合、それに
連動して選択手段は増幅手段の出力を選択しない。これ
により、選択手段は受光対象の投光素子からの光を受光
する受光素子の出力のみを選択できる。
In the first aspect of the invention, light is sequentially projected from a plurality of light projecting elements and separately projected to a plurality of light receiving elements. The output of each light receiving element is amplified by the amplifying means, and the output of each amplifying means is selected by the selecting means in accordance with the light projection order. The light blocking state between the light projecting element and the light receiving element is detected by the output of the selected amplifying means. When amplifying the amplifying means,
In conjunction with this, the selecting means selects the output amplified by the amplifying means. When the amplifying means is not operated for amplification, the selecting means does not select the output of the amplifying means in conjunction with it. Thereby, the selecting means can select only the output of the light receiving element that receives the light from the light projecting element that is the light receiving target.

【0016】第2発明では、複数の投光素子から順次、
光を投光して複数の受光素子へ各別に投光する。受光素
子夫々の出力をアンプにより増幅し、アンプ夫々の出力
をゲート回路により投光順序に応じて選択する。選択し
たアンプの出力により、投光素子と受光素子との間の遮
光状態を検出する。アンプを増幅動作させる場合、それ
に連動してゲート回路はアンプにより増幅した出力を選
択する。アンプを増幅動作させない場合、それに連動し
てゲート回路はアンプの出力を選択しない。これによ
り、ゲート回路は受光対象の投光素子からの光を受光す
る受光素子の出力のみを選択できる。
In the second invention, a plurality of light projecting elements are sequentially
The light is projected and separately projected onto a plurality of light receiving elements. The output of each light receiving element is amplified by an amplifier, and the output of each amplifier is selected by a gate circuit according to the order of light projection. Based on the output of the selected amplifier, the light blocking state between the light emitting element and the light receiving element is detected. When the amplifier is operated for amplification, the gate circuit interlocks with it to select the output amplified by the amplifier. When the amplifier is not operated for amplification, the gate circuit does not select the output of the amplifier in conjunction with it. Thus, the gate circuit can select only the output of the light receiving element that receives the light from the light projecting element that is the light receiving target.

【0017】[0017]

【実施例】以下本発明をその実施例を示す図面により詳
述する。図1は本発明に係る多光軸光電スイッチの構成
を示すブロック図である。クロック発生回路1により発
生させたクロック及び発光制御回路2から出力される制
御信号はタイミング発生回路3へ入力される。タイミン
グ発生回路3の出力信号は投光素子切替回路4及び信号
合成回路5a,5b,5cへ与えられる。投光素子切替回路4か
ら出力される信号は信号合成回路5a,5b,5cへ入力され、
その出力信号は各別に駆動回路6a,6b,6cへ入力される。
駆動回路6a,6b,6cの出力信号は各別に、例えば発光ダイ
オードからなる投光素子7a,7b,7cへ入力され、これらに
より投光部LAが構成されている。
The present invention will be described in detail below with reference to the drawings showing the embodiments thereof. FIG. 1 is a block diagram showing the configuration of a multi-optical axis photoelectric switch according to the present invention. The clock generated by the clock generation circuit 1 and the control signal output from the light emission control circuit 2 are input to the timing generation circuit 3. The output signal of the timing generating circuit 3 is given to the light projecting element switching circuit 4 and the signal synthesizing circuits 5a, 5b, 5c. The signal output from the light emitting element switching circuit 4 is input to the signal combining circuits 5a, 5b, 5c,
The output signals are individually input to the drive circuits 6a, 6b, 6c.
The output signals of the drive circuits 6a, 6b, 6c are individually input to the light projecting elements 7a, 7b, 7c, which are, for example, light emitting diodes, and these form a light projecting unit LA.

【0018】ホトダイオードからなる受光素子8a,8b,8c
の出力信号は、各別にアンプ9a,9b,9cへ入力される。ア
ンプ9a,9b,9cの出力信号は各別にゲート回路10a,10b,10
c へ入力され、ゲート回路10a,10b,10c の夫々の出力信
号はコンデンサC1 と抵抗R 1 との直列回路を介してア
ンプ11a の負入力端子−へ入力される。アンプ11a の負
入力端子−及び出力端子OP間には抵抗R2 が介装され
る。アンプ11a の正, 負入力端子+, −間にはゲート回
路20が介装され、正入力端子+は電源V1 と接続され
る。アンプ11a の出力信号はコンデンサC2 と抵抗R3
との直列回路を介してアンプ11b の負入力端子−へ入力
される。
Light receiving elements 8a, 8b, 8c composed of photodiodes
The output signals of are separately input to the amplifiers 9a, 9b, 9c. A
The output signals of the amplifiers 9a, 9b, 9c are gate circuits 10a, 10b, 10
is input to c and the output signals of the gate circuits 10a, 10b, 10c, respectively.
No. is capacitor C1And resistance R 1Via a series circuit with
It is input to the negative input terminal- of the amplifier 11a. Amplifier 11a negative
A resistor R is placed between the input terminal-and the output terminal OP.2Is interposed
It A gate circuit is connected between the positive and negative input terminals + and − of the amplifier 11a.
The path 20 is interposed, and the positive input terminal + is the power supply V1Connected with
It The output signal of amplifier 11a is capacitor C2And resistance R3
Input to the negative input terminal-of amplifier 11b through the series circuit of
To be done.

【0019】アンプ11b の負入力端子−と出力端子OPと
の間にはゲート回路21と抵抗R4 との並列回路が介装さ
れる。アンプ11b の正入力端子+は電源V2 と接続され
る。アンプ11b の出力信号は、一側入力端子に基準電圧
ref が入力されているコンパレータ12の他側入力端子
へ入力される。コンパレータ12の出力信号は同期信号検
出回路13及び信号検波回路14へ入力される。同期信号検
出回路13の出力信号はタイミング発生回路15へ入力さ
れ、その出力信号たるゲート信号G1 (G2 ,G 3 )は
各別にゲート回路10a(10b,10c)及びアンプ9a(9b,9c) の
電源端子へ与えられる。タイミング発生回路15の出力
は、信号検波回路14へ入力され、信号検波回路14は、投
光の1走査における一連の信号が入力された場合に信号
を出力するようになっている。
The negative input terminal-and the output terminal OP of the amplifier 11b
Between the gate circuit 21 and the resistor RFourParallel circuit with
Be done. The positive input terminal + of the amplifier 11b is the power supply V2Connected with
It The output signal of the amplifier 11b has a reference voltage at one input terminal.
VrefThe other input terminal of comparator 12 to which is input
Is input to. The output signal of the comparator 12 is the sync signal detection.
It is input to the output circuit 13 and the signal detection circuit 14. Sync signal detection
The output signal of the output circuit 13 is input to the timing generation circuit 15.
And its output signal is the gate signal G1(G2, G 3) Is
Separately for the gate circuit 10a (10b, 10c) and amplifier 9a (9b, 9c)
It is given to the power supply terminal. Output of timing generation circuit 15
Is input to the signal detection circuit 14, and the signal detection circuit 14
Signal when a series of signals for one scanning of light is input
Is output.

【0020】またタイミング発生回路15は、ゲート信号
1 , G2 ,G3 の立上り, 立下り時点に同期して、ク
ロックCLK を出力するようになしており、このクロック
CLKは、ゲート回路20,21 へ与えられる。これらにより
受光部LBを構成している。なお、投光素子7a,7b,7cの投
光面と、受光素子8a,8b,8cの受光面とを対向させてい
る。
The timing generating circuit 15 outputs the clock CLK in synchronism with the rising and falling points of the gate signals G 1 , G 2 and G 3.
CLK is supplied to the gate circuits 20 and 21. These constitute the light receiving section LB. The light projecting surfaces of the light projecting elements 7a, 7b, 7c are opposed to the light receiving surfaces of the light receiving elements 8a, 8b, 8c.

【0021】次にこのように構成した多光軸光電スイッ
チの動作を、各部信号のタイミングチャートを示す図2
とともに説明する。投光部LAのタイミング発生回路3か
ら出力されるタイミング信号により、投光素子切替回路
4及び信号合成回路5a,5b,5cを制御して投光素子7a,7b,
7cを駆動する。そうすると投光素子7a,7b,7cが図2(a),
(b),(c) に示すように、先ず4パルスの光同期信号L
SYC を同時に投光し、続いて投光素子7a,7b,7cの順に、
光同期信号LSYC からの遅れ時間が異なる3パルスの光
信号LS を投光する。
Next, the operation of the multi-optical axis photoelectric switch configured as described above will be described with reference to FIG.
Will be explained together. The light emitting element switching circuit 4 and the signal synthesizing circuits 5a, 5b, 5c are controlled by the timing signal output from the timing generating circuit 3 of the light emitting unit LA to project the light emitting elements 7a, 7b,
Drive 7c. Then, the light projecting elements 7a, 7b, and 7c are arranged as shown in FIG.
As shown in (b) and (c), first, a 4-pulse optical synchronization signal L
SYC is emitted at the same time, then the light emitting elements 7a, 7b, 7c in that order.
The three-pulse optical signal L S having a different delay time from the optical synchronization signal L SYC is projected.

【0022】一方、光同期信号LSYC が投光されるとき
には、タイミング発生回路15から図2(d),(e),(f) に示
すようにゲート信号G1,G2,G3を所定時間同時に立上げ
て、アンプ9a,9b,9cを増幅動作させ、ゲート回路10a,10
b,10c をオンさせる。そして光同期信号LSYC を受光し
た受光素子8a,8b,8cの出力信号がアンプ9a,9b,9cにより
増幅され、アンプ9a,9b,9cの出力信号S1 , S2 , S3
は図2(g),(h),(i) に示すように光同期信号LSYC に同
期する。
On the other hand, when the optical synchronization signal L SYC is projected, the timing generation circuit 15 outputs the gate signals G1, G2 and G3 simultaneously for a predetermined time as shown in FIGS. 2 (d), (e) and (f). Start up, amplify the amplifiers 9a, 9b, 9c, and operate the gate circuits 10a, 10
Turn on b and 10c. Then, the output signals of the light receiving elements 8a, 8b, 8c that received the optical synchronization signal L SYC are amplified by the amplifiers 9a, 9b, 9c, and the output signals S 1 , S 2 , S 3 of the amplifiers 9a, 9b, 9c are amplified.
Are synchronized with the optical synchronizing signal L SYC as shown in FIGS. 2 (g), 2 (h) and 2 (i).

【0023】また、アンプ9a,9b,9cの出力信号S1 , S
2 , S3 はゲート回路10a,10b,10cを各別に通ってアン
プ11a,11b へ順次入力されて増幅され、コンパレータ12
で2値信号に変換されて同期信号検出回路13へ入力され
る。同期信号検出回路13が同期信号VSYC を検出し受光
対象の同期信号VSYC と判定すると、タイミング発生回
路15に制御指令信号を与える。そうするとタイミング発
生回路15は、図2(d),(e),(f) に示すように光信号
S , LS , LS に同期してゲート信号G1,G2,G3を択一
的に順次所定時間立上げる。これにより先ずゲート信号
G1のみが立上るとアンプ9aに電源が供給されてアンプ9a
が増幅動作を開始し、同時にゲート回路10aがオンす
る。
The output signals S 1 , S of the amplifiers 9a, 9b, 9c
2 and S 3 pass through the gate circuits 10a, 10b and 10c separately and are sequentially input to the amplifiers 11a and 11b to be amplified and the comparator 12
Is converted into a binary signal and input to the synchronization signal detection circuit 13. When the synchronization signal detection circuit 13 detects a sync signal V SYC determines that sync signal V SYC light receiving object, give a control command signal to the timing generation circuit 15. Then, the timing generation circuit 15 selectively outputs the gate signals G1, G2, and G3 in synchronization with the optical signals L S , L S , and L S as shown in FIGS. 2 (d), (e), and (f). Start up for a predetermined period of time. This gives the gate signal
When only G1 starts up, power is supplied to amplifier 9a and amplifier 9a
Starts the amplification operation, and at the same time, the gate circuit 10a is turned on.

【0024】そして受光素子8aの出力信号を増幅したア
ンプ9aの出力信号S1 は図2(g) に示すように投光素子
7aの光信号LS に応じた変化をする。そしてゲート回路
10aの出力側の信号SG1 は図2(j) に示すように出力信
号S1 に応じて変化する。またゲート信号G1の立上り,
立下り時点でアンプ9aの電源が入断されるため、その入
断時点で図2(j) に示すようにノイズパルスTPが発生す
るが、そのタイミングで図2(k) に示すクロックCLK を
ゲート回路20,21 へ与えて、ゲート回路20,21をオンさ
せ、そのノイズパルスTPをカットしてアンプ11b から
は、光信号LS に対応した出力信号S1 をアンプ9a,11
a,11bで増幅した図2(l) に示す信号SG2 を出力する。
Then, the output signal S 1 of the amplifier 9a, which is obtained by amplifying the output signal of the light receiving element 8a, is output as shown in FIG. 2 (g).
It changes according to the optical signal L S of 7a. And the gate circuit
The signal SG1 on the output side of 10a changes according to the output signal S 1 as shown in FIG. 2 (j). Also, when the gate signal G1 rises,
Since the power of the amplifier 9a is turned off at the time of falling, the noise pulse TP is generated at the time of turning on and off as shown in Fig. 2 (j). At that timing, the clock CLK shown in Fig. 2 (k) is generated. The output signal S 1 corresponding to the optical signal L S is supplied from the amplifier 11b to the gate circuits 20 and 21 to turn on the gate circuits 20 and 21 and cut the noise pulse TP.
The signal SG2 shown in FIG. 2 (l) amplified by a and 11b is output.

【0025】次に、ゲート信号G2のみを立上げると、ア
ンプ9bが増幅動作を開始し、同時にゲート回路10がオン
する。そして受光素子8bの出力信号を増幅するが、投光
素子7bからの光を遮光している場合は、受光素子8bから
の出力信号がなく図2(h) に示すように出力信号S2
光信号LS に応じた変化をしない。そのため、ゲート回
路10b の出力側の信号SG1 は図2(j) に示すように出力
信号S2 と同様に変化しない。この出力信号SG1 は前記
同様にアンプ11a,11b へ順次入力されるが、アンプ11b
からは図2(l) に示すように出力信号SG2 を出力しな
い。
Next, when only the gate signal G2 is raised, the amplifier 9b starts the amplification operation, and at the same time, the gate circuit 10 is turned on. Then, the output signal of the light receiving element 8b is amplified, but when the light from the light projecting element 7b is blocked, there is no output signal from the light receiving element 8b, and the output signal S 2 is as shown in FIG. 2 (h). It does not change according to the optical signal L S. Therefore, the signal SG1 on the output side of the gate circuit 10b does not change like the output signal S 2 as shown in FIG. 2 (j). This output signal SG1 is sequentially input to the amplifiers 11a and 11b as described above, but the amplifier 11b
Does not output the output signal SG2 as shown in FIG.

【0026】この場合、受光素子8a,8c は、投光素子7b
からの光の漏れ光を受光するが、ゲート信号G1,G3 は立
下っていてアンプ9a,9c 及びゲート回路10a,10c がとも
に不動作であるため、アンプ9a,9c の出力信号がない。
そのためゲート回路10a,10cの寄生容量C0 が存在して
いてもゲート回路10a,10c からの信号の漏出がない。そ
して投光素子7bの光を遮光している場合は、図2(l) に
示すようにアンプ11bから出力信号SG2 を出力しない。
In this case, the light receiving elements 8a and 8c are the light emitting elements 7b.
Although the leak light of the light from is received, since the gate signals G1 and G3 are falling and the amplifiers 9a and 9c and the gate circuits 10a and 10c are both inoperative, there is no output signal from the amplifiers 9a and 9c.
Therefore, even if the parasitic capacitance C 0 of the gate circuits 10a and 10c exists, no signal leaks from the gate circuits 10a and 10c. When the light of the light projecting element 7b is blocked, the output signal SG2 is not output from the amplifier 11b as shown in FIG. 2 (l).

【0027】次にゲート信号G3を立上げると、前記同様
アンプ9cが増幅動作を開始し同時にゲート回路10c がオ
ンする。そして受光素子8cの出力信号を増幅し、アンプ
9cの出力信号S3 は図2(i) に示すように光信号LS
応じた変化をする。そしてゲート回路10c の出力側の信
号SG1 は図2(j) に示すように出力信号S3 に応じて変
化する。
Next, when the gate signal G3 is raised, the amplifier 9c starts the amplifying operation and the gate circuit 10c is turned on at the same time. Then, the output signal of the light receiving element 8c is amplified and
The output signal S 3 of 9c changes according to the optical signal L S as shown in FIG. 2 (i). The output side of the signal SG1 of the gate circuit 10c is changed in accordance with the output signal S 3 as shown in FIG. 2 (j).

【0028】またアンプ10c の電源の入断時に発生する
ノイズパルスは前記同様クロックCLK によりゲート回路
20,21 をオンさせてカットし、アンプ11b から図2(l)
に示す出力信号SG1 を増幅した出力信号SG2 を出力する
ことになる。なお、投光素子7bの光を遮光したが、他の
投光素子7a,7c の光を遮光しても同様の効果がある。
The noise pulse generated when the power source of the amplifier 10c is turned on / off is the gate circuit by the clock CLK as described above.
Turn on 20 and 21 to cut, and from amplifier 11b to Figure 2 (l)
An output signal SG2 obtained by amplifying the output signal SG1 shown in is output. Although the light of the light projecting element 7b is blocked, the same effect can be obtained by blocking the light of the other light projecting elements 7a and 7c.

【0029】このように、受光素子の出力信号を増幅す
るアンプと、このアンプの出力信号を入力すべきゲート
回路とに、共通の信号を与えてアンプを増幅動作させる
とともにゲート回路をオンさせるようにすると、ゲート
回路がオフしているときはアンプが増幅動作をしなくな
り、ゲート回路からの信号の漏出を防止できる。したが
って、1つの投光素子の光を遮光している場合に、他の
受光素子が遮光している光の漏れ光を受光していても、
その受光素子の出力信号がゲート回路から出力されるこ
とがない。またゲート回路を択一的に順次オンさせるか
ら、それに応じてアンプに電源が供給されることにな
り、アンプの消費電流を低減でき、光軸数、即ち投, 受
光素子数が多い程、消費電流をより低減できる。
In this way, a common signal is applied to the amplifier for amplifying the output signal of the light receiving element and the gate circuit to which the output signal of this amplifier is input so that the amplifier is amplified and the gate circuit is turned on. With this setting, the amplifier does not perform the amplifying operation when the gate circuit is off, and the leakage of the signal from the gate circuit can be prevented. Therefore, when the light of one light projecting element is shielded, even if the leak light of the light blocked by the other light receiving element is received,
The output signal of the light receiving element is not output from the gate circuit. Also, since the gate circuits are selectively turned on sequentially, power is supplied to the amplifier accordingly, and the current consumption of the amplifier can be reduced, and the more the number of optical axes, that is, the number of light emitting and receiving elements, the more The current can be further reduced.

【0030】[0030]

【発明の効果】以上詳述したように本発明によれば、複
数の投光素子のいずれかの光を、その投光素子と対向し
ている受光素子が受光しないように遮光した場合に、遮
光している光の漏れ光を他の受光素子が受光しても、そ
の受光素子の出力信号に関連する信号がゲート回路から
出力されることがなく、それにより遮光状態を誤検出す
る虞れがなく信頼性を高め得る。また、受光素子の出力
信号を増幅する複数のアンプを同時に動作させないか
ら、その消費電流を低減できる、等の優れた効果を奏す
る。
As described above in detail, according to the present invention, when light of any one of a plurality of light projecting elements is shielded so as not to be received by a light receiving element facing the light projecting element, Even if another light receiving element receives the leaked light of the blocked light, the signal related to the output signal of the light receiving element is not output from the gate circuit, which may cause a false detection of the light blocking state. Can improve reliability without Further, since a plurality of amplifiers for amplifying the output signal of the light receiving element are not operated at the same time, it is possible to reduce the current consumption, which is an excellent effect.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る多光軸光電スイッチの構成を示す
ブロック図である。
FIG. 1 is a block diagram showing a configuration of a multi-optical axis photoelectric switch according to the present invention.

【図2】各部信号のタイミングチャートである。FIG. 2 is a timing chart of signals of respective parts.

【図3】従来の多光軸光電スイッチの構成を示すブロッ
ク図である。
FIG. 3 is a block diagram showing a configuration of a conventional multi-optical axis photoelectric switch.

【図4】各部信号のタイミングチャートである。FIG. 4 is a timing chart of signals of respective parts.

【符号の説明】[Explanation of symbols]

7a〜7c 投光素子 8a〜8c 受光素子 9a〜9c アンプ 10a 〜10c ゲート回路 7a to 7c Emitter 8a to 8c Photodetector 9a to 9c Amplifier 10a to 10c Gate circuit

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複数の投光素子から順次、光を投光して
複数の受光素子へ各別に投光し、その投光順序に応じて
受光素子の出力を選択して、選択した出力により投光素
子と受光素子との間の遮光状態を検出する多光軸光電ス
イッチにおいて、前記複数の受光素子夫々の出力を各別
に増幅する複数の増幅手段と、該増幅手段夫々の出力を
選択する複数の選択手段とを備え、増幅手段及び選択手
段を連動すべく構成してあることを特徴とする多光軸光
電スイッチ。
1. Light is sequentially projected from a plurality of light projecting elements to be individually projected to a plurality of light receiving elements, and the output of the light receiving element is selected according to the order of light projection. In a multi-optical axis photoelectric switch for detecting a light blocking state between a light emitting element and a light receiving element, a plurality of amplifying means for individually amplifying outputs of the plurality of light receiving elements and outputs of the amplifying means are selected. A multi-optical axis photoelectric switch, comprising: a plurality of selecting means, wherein the amplifying means and the selecting means are interlocked with each other.
【請求項2】 複数の投光素子から順次、光を投光して
複数の受光素子へ各別に投光し、その投光順序に応じて
受光素子の出力を選択して、選択した出力により投光素
子と受光素子との間の遮光状態を検出する多光軸光電ス
イッチにおいて、前記複数の受光素子夫々の出力を各別
に増幅する複数のアンプと、該アンプ夫々の出力を選択
する複数のゲート回路とを備え、アンプと該アンプと対
応するゲート回路とを、共通の信号により駆動すべく構
成してあることを特徴とする多光軸光電スイッチ。
2. Light is sequentially projected from a plurality of light emitting elements to be separately projected to a plurality of light receiving elements, and the output of the light receiving element is selected according to the order of light projection, and the selected output is used. In a multi-optical axis photoelectric switch that detects a light blocking state between a light emitting element and a light receiving element, a plurality of amplifiers that individually amplify the outputs of the plurality of light receiving elements, and a plurality of amplifiers that select the output of each of the amplifiers. A multi-optical axis photoelectric switch comprising a gate circuit, and an amplifier and a gate circuit corresponding to the amplifier are configured to be driven by a common signal.
JP5410394A 1994-03-24 1994-03-24 Multiple optical axes photoelectric switch Pending JPH07264036A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5410394A JPH07264036A (en) 1994-03-24 1994-03-24 Multiple optical axes photoelectric switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5410394A JPH07264036A (en) 1994-03-24 1994-03-24 Multiple optical axes photoelectric switch

Publications (1)

Publication Number Publication Date
JPH07264036A true JPH07264036A (en) 1995-10-13

Family

ID=12961286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5410394A Pending JPH07264036A (en) 1994-03-24 1994-03-24 Multiple optical axes photoelectric switch

Country Status (1)

Country Link
JP (1) JPH07264036A (en)

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