JPH0722334B2 - Image signal processor - Google Patents
Image signal processorInfo
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- JPH0722334B2 JPH0722334B2 JP61304248A JP30424886A JPH0722334B2 JP H0722334 B2 JPH0722334 B2 JP H0722334B2 JP 61304248 A JP61304248 A JP 61304248A JP 30424886 A JP30424886 A JP 30424886A JP H0722334 B2 JPH0722334 B2 JP H0722334B2
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Description
【発明の詳細な説明】 産業上の利用分野 本発明は、階調画像を含む画像情報を２値再生する機能
を備えた画像信号処理装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing device having a function of binary-reproducing image information including a gradation image.
従来の技術 近年事務処理の機械化や画像通信の急速な普及に伴っ
て、従来の白黒２値原稿の他に、階調画像や印刷画像の
高品質での画像再現に対する要望が高まって来ている。2. Description of the Related Art In recent years, with the mechanization of office processing and the rapid spread of image communication, there has been an increasing demand for high-quality image reproduction of gradation images and printed images in addition to the conventional monochrome binary document. .
特に、階調画像の２値画像による擬似階調再現は、表示
装置や記録装置との適合性が良く、多くの提案がなされ
ている。In particular, the pseudo gradation reproduction by the binary image of the gradation image has good compatibility with the display device and the recording device, and many proposals have been made.
これらの擬似階調再現の１つの手段として、ディザ法が
最もよく知られている。この方法は、予め定められた一
定面積において、その面積内に再現するドットの数によ
って階調を再現しようとするもので、ディザマトリクス
に用意した閾値と入力画情報を１画素毎に比較しながら
２値化処理を行っている。この方法は階調特性と分解能
特性がディザマトリクスの大きさに直接依存し、互いに
両立できない関係にある。また印刷画像などに用いた再
現画像におけるモアレ模様の発生は避けがたい。The dither method is best known as one means for reproducing these pseudo gradations. This method attempts to reproduce gradation in a predetermined fixed area by the number of dots reproduced in that area. While comparing the threshold value prepared in the dither matrix with the input image information for each pixel. Binarization processing is performed. In this method, the gradation characteristics and the resolution characteristics are directly dependent on the size of the dither matrix, and are incompatible with each other. In addition, it is difficult to avoid the occurrence of moire patterns in reproduced images used for printed images.
上記階調特性と高分解能が両立し、かつモアレ模様の発
生抑制効果の大きい方法として、誤差拡散法（文献：ア
ール（Ｒ）・フーイドアンドエル（FLOYD＆Ｌ）．ステ
インバーグ（STEINBERG），“アン アダブテイブ ア
ルゴリズム フオー スペシヤル グレー スケール
（An Adaptive Algorithm for Spatial Grey Sca
le）",エスアイデイ（SID）75 ダイジエスト（DIGES
T）,pp36−37）が提案されている。As a method that achieves both the above gradation characteristics and high resolution and has a great effect of suppressing the generation of moire patterns, an error diffusion method (reference: R. FOYD & L. STEINBERG), "Ann. Adaptive Algorithm for Spatial Gray Sca
le) ", SID 75 (DIGES)
T), pp36-37) have been proposed.
第３図は上記誤差拡散法を実現するための装置の要部ブ
ロック図である。FIG. 3 is a block diagram of an essential part of an apparatus for realizing the above error diffusion method.
原画像における注目画素の座標を（x,y）とするとき、3
01は誤差記憶手段、302は誤差配分係数マトリクスの示
す注目画素の周辺の未処理画素領域、303は座標（x,y）
における集積誤差Sxyの記憶位置、304は座標（x,y）に
おける入力レベルIxyの入力端子、305はＩ′xy（＝Ixy
＋Sxy）の入力補正手段、306は出力レベル０またはＲの
出力画信号Pxyの出力端子、307は一定閾値R/2を印加す
る信号端子、308は入力信号Ｉ′xyと一定閾値R/2を比較
してＩ′xy＞R/2の時Pxy＝Ｒを、その他の場合はPxy＝
０を出力する２値化手段、309はExy（＝Ｉ′xy−Pxy）
の注目画素に対する２値化誤差を求める差分演算手段で
ある。When the coordinates of the pixel of interest in the original image are (x, y), 3
01 is the error storage means, 302 is the unprocessed pixel area around the pixel of interest indicated by the error distribution coefficient matrix, and 303 is the coordinate (x, y)
Where 304 is the storage position of the integrated error Sxy, 304 is the input terminal of the input level Ixy at the coordinates (x, y), and 305 is I′xy (= Ixy
+ Sxy) input correction means, 306 is an output terminal of an output image signal Pxy of output level 0 or R, 307 is a signal terminal for applying a constant threshold value R / 2, 308 is an input signal I′xy and a constant threshold value R / 2. By comparison, Pxy = R when I'xy> R / 2, and Pxy = otherwise.
Binarizing means for outputting 0, 309 is Exy (= I'xy-Pxy)
It is a difference calculation means for obtaining a binarization error for the pixel of interest.
さて、注目画素に対する集積誤差Sxyは第（１），
（２）式で表わされる。Now, the integration error Sxy for the pixel of interest is (1),
It is expressed by equation (2).
Sxy＝ΣKij・Ex-j+2、y-i+1 ・・・・・・（１） （但し、i,jは誤差配分係数マトリクス内の座標を示
す。） この誤差配分係数Kijは誤差Exyの注目画素の周辺画素へ
の配分の重み付けをするもので前記文献では （但し、＊は注目画素の位置） を例示している。Sxy = ΣKij · Ex - j +2 , y - i +1 ··· (1) (However, i and j indicate coordinates in the error distribution coefficient matrix.) This error distribution coefficient Kij is the error Exy The weighting is applied to the distribution of the target pixel of FIG. (However, * indicates the position of the pixel of interest).
第３図の構成では、上記の演算は注目画素に対する２値
化誤差Exyに、未処理の周辺画素領域302内の各画素Ａ〜
Ｄに対応する配分係数を乗算し、誤差記憶手段301内の
値に加算し再び該当位置へ記憶させる誤差配分演算手段
310によって実現している。ただし、誤差記憶手段301の
画素位置Ｂの集積誤差は予め０にクリアされている。In the configuration shown in FIG. 3, the above calculation results in the binarization error Exy for the pixel of interest and each pixel A to A in the unprocessed peripheral pixel region 302.
Error distribution calculation means for multiplying D by a distribution coefficient corresponding to D, adding to the value in the error storage means 301, and storing again in the corresponding position
It is realized by 310. However, the integration error at the pixel position B of the error storage means 301 is cleared to 0 in advance.
発明が解決しようとする問題点 さて上記の誤差拡散法は、ディザ法に比して階調特性や
分解能の点ですぐれた性能を持ち、印刷画像の再現時に
おいてもモアレ模様の出現は極めて少く、原理的には入
力レベルIxyのすべてのレベルに応じた黒画素（または
白画素）密度の階調を再現できる方式である。Problems to be Solved by the Invention The error diffusion method described above has excellent performance in terms of gradation characteristics and resolution compared with the dither method, and the appearance of moire patterns is extremely small even when reproducing a printed image. , In principle, it is a method that can reproduce the gradation of black pixel (or white pixel) density according to all the levels of the input level Ixy.
しかし、上記の処理方式を実用的な整数演算型の処理回
路で実現しようとすると、２値化誤差Exyと周辺画素へ
の誤差配分値の総和ΣKij・Exyが必ずしも一致しない。
このことは、２値化誤差Exyのすべて値を周辺画素に配
分していないことを意味し、入力レベルIxyの全レベル
に対応した階調を再現できず、特に入力レベルIxyが低
濃度および高濃度レベルのとき、この現象が顕著で、階
調再現領域が狭められた再生画像となる。However, if it is attempted to implement the above processing method by a practical integer arithmetic processing circuit, the binarization error Exy and the sum ΣKij · Exy of the error distribution values to the peripheral pixels do not necessarily match.
This means that not all values of the binarization error Exy are distributed to the peripheral pixels, and the gradation corresponding to all the levels of the input level Ixy cannot be reproduced, especially when the input level Ixy has low density and high density. At the density level, this phenomenon is remarkable, and the reproduced image has a narrowed tone reproduction area.
本発明は、上記の誤差拡散法の実施に当って階調再現特
性を改良し、モアレ模様の極めて少い画像信号処理装置
を提供するものである。The present invention provides an image signal processing apparatus which has improved tone reproduction characteristics when the above-mentioned error diffusion method is implemented and has an extremely small number of moire patterns.
問題点を解決するための手段 本発明は、画素単位でサンプリングした多階調の濃度レ
ベルを２値化する際に、注目画素の２値化誤差をその周
辺の画素位置に対応させて記憶する誤差記憶手段と、注
目画素の入力レベルと前記誤差記憶手段内の注目画素位
置に対応した集積誤差を加算し補正レベルを出力する入
力補正手段と、前記補正レベルを予め定められた閾値と
比較し注目画素の２値化レベルを決定する２値化手段
と、前記補正レベルと２値化レベルの差分である２値化
誤差を求める差分演算手段と、前記２値化誤差を注目画
素の周辺の未処理画素に配分する配分係数を発生させる
配分係数発生手段と、前記差分演算手段からの２値化誤
差と前記配分係数発生手段からの配分係数とから注目画
素周辺の未処理画素に対応する誤差配分値を演算する誤
差配分値演算手段と、前記誤差配分値演算手段からの注
目画素周辺の未処理画素に対応する誤差配分値の総和を
求め、前記差分演算手段からの２値化誤差との差である
剰余誤差を演算し出力する剰余誤差演算手段と、前記誤
差配分値の内の１つと前記剰余誤差演算手段からの剰余
誤差と加算し、残りの誤差配分値とともに前記誤差記憶
手段内の対応する画素位置の集積誤差とを加算し再び記
憶させる誤差更新手段から成る画像信号処理装置を構成
し、上記目的を達成しようとするものである。Means for Solving the Problems According to the present invention, when binarizing multi-tone density levels sampled on a pixel-by-pixel basis, the binarization error of the pixel of interest is stored in association with the pixel positions in the surroundings. An error storage unit, an input correction unit for adding an input level of the pixel of interest and an integrated error corresponding to the position of the pixel of interest in the error storage unit and outputting a correction level, and comparing the correction level with a predetermined threshold value. Binarization means for determining the binarization level of the pixel of interest, difference calculation means for obtaining a binarization error that is the difference between the correction level and the binarization level, and the binarization error of the pixel around the pixel of interest. An error corresponding to an unprocessed pixel around the pixel of interest from a distribution coefficient generating means for generating a distribution coefficient to be distributed to unprocessed pixels, a binarization error from the difference calculating means, and a distribution coefficient from the distribution coefficient generating means. Play allocation value This is the difference between the error distribution value calculating means for calculating and the sum of the error distribution values corresponding to the unprocessed pixels around the pixel of interest from the error distribution value calculating means, and the binarization error from the difference calculating means. Residual error calculating means for calculating and outputting a residual error, one of the error distribution values and the residual error from the residual error calculating means are added, and the remaining error distribution value and corresponding pixel in the error storage means are added. The present invention aims to achieve the above object by constructing an image signal processing device comprising an error updating means for adding the position integration error and storing again.
また前記剰余誤差演算手段は誤差配分値演算手段からの
注目画素周辺の未処理画素に対応する誤差配分値の総和
を求め、前記差分演算手段からの２値化誤差との差分で
ある剰余誤差を演算し、一時記憶するとともに次画素処
理時に読み出し出力する手段を用いる構成によっても上
記目的を達成することができる。Further, the residual error calculating means obtains the sum of the error distribution values corresponding to the unprocessed pixels around the target pixel from the error distribution value calculating means, and calculates the residual error which is the difference from the binarization error from the difference calculating means. The above object can also be achieved by a configuration in which means for performing calculation, temporarily storing, and reading out and outputting at the time of next pixel processing is used.
また、配分係数発生手段は、配分係数を4/8、2/8、1/
8、1/8の組み合わせで発生させ、剰余誤差演算手段は２
値化誤差の下位３ビットの信号レベルのビットの和から
求めることを構成によって回路構成を簡略化し上記目的
を達成することができる。Also, the distribution coefficient generating means sets the distribution coefficient to 4/8, 2/8, 1 /
8 and 1/8 combinations are generated, and the residual error calculation means is 2
It is possible to achieve the above object by simplifying the circuit configuration by the configuration of obtaining from the sum of the signal level bits of the lower 3 bits of the digitization error.
作 用 本発明は上記構成により、２値化誤差と注目画素の周辺
画素に対応する誤差配分値の総和との差分である剰余誤
差で次画素処理時に補正することで、２値化誤差と周辺
画素の誤差配分値の総和を一致させ入力レベルの低濃度
および高濃度領域の階調再現特性を改良し、モアレ模様
が発生しないようにしたものである。Operation The present invention has the above-described configuration, and corrects the binarization error and the surroundings by correcting the residual error, which is the difference between the binarization error and the sum of the error distribution values corresponding to the peripheral pixels of the pixel of interest, during the next pixel processing. The sum of the error distribution values of the pixels is made to coincide with each other to improve the tone reproduction characteristics in the low-density and high-density areas of the input level so that moire patterns do not occur.
実 施 例 第１図は本発明の一実施例における画像信号処理装置の
要部ブロック構成図である。Practical Example FIG. 1 is a block diagram showing the main part of an image signal processing apparatus according to an embodiment of the present invention.
同図において、101〜109の各ブロックの構成と作用は第
３図の従来の誤差拡散法の301〜309の各部と同様であ
る。第３図の構成と異なる誤差配分値演算手段110と配
分係数発生手段111と誤差更新手段112と剰余誤差演算手
段13について詳細に述べる。In the figure, the configuration and operation of each block of 101 to 109 is the same as that of each section of 301 to 309 of the conventional error diffusion method of FIG. The error distribution value calculating means 110, the distribution coefficient generating means 111, the error updating means 112, and the residual error calculating means 13 different from the configuration of FIG. 3 will be described in detail.
配分係数発生手段111は、注目画素周辺の未処理画素に
対する配分係数セットを予め用意し、周辺画素領域102
内の画素位置Ａ〜Ｄに対する２値化誤差Exyの配分係数K
A〜KDを誤差配分値演算手段110へ出力する。The distribution coefficient generation means 111 prepares a distribution coefficient set for unprocessed pixels around the target pixel in advance,
Distribution coefficient K of binarization error Exy for pixel positions A to D in
Output A to K D to the error distribution value calculation means 110.
前記誤差配分値演算手段110は、画素処理周期に同期し
た同期信号に同期しながら、前記配分係数KA〜KDと差分
演算手段109からの注目画素に対する２値化誤差Exyとで
誤差記憶手段101の周辺画素領域102内の画素位置Ａ、
Ｂ、Ｃ、Ｄに対応する誤差配分値GA〜GDを式（３）によ
り求める。The error distribution value calculation unit 110 stores an error storage unit based on the distribution coefficients K A to K D and the binarization error Exy for the pixel of interest from the difference calculation unit 109 in synchronization with a synchronization signal that is synchronized with the pixel processing cycle. A pixel position A in the peripheral pixel region 102 of 101,
The error distribution values G A to G D corresponding to B, C and D are obtained by the equation (3).
さらに誤差更新手段112と剰余誤差演算手段113に誤差配
分値GA〜GDを出力する。 Further, the error distribution values G A to G D are output to the error updating unit 112 and the residual error calculating unit 113.
剰余誤差演算手段113は、前記誤差配分値GA〜GDと前記
２値化誤差Exyから誤差配分値GA〜GDの総和と２値化誤
差Exyとの差分である剰余誤差JBを第（４）式により求
める。The residual error calculating means 113 calculates a residual error J B which is a difference between the sum of the error distribution values G A to G D and the binarization error Exy from the error distribution values G A to G D and the binarization error Exy. It is calculated by the equation (4).
JB＝Exy−（GA＋GB＋GC＋GD） ・・・・・・（４） さらに、剰余誤差JBは後述の誤差更新手段112に出力さ
れる。J B = Exy− (G A + G B + G C + G D ) (4) Further, the residual error J B is output to the error updating means 112 described later.
誤差更新手段112は、前記同期信号に同期しながら、前
記誤差配分値演算手段110からの誤差配分値GA〜GDと前
記剰余誤差演算手段113からの剰余誤差JBと前記誤差記
憶手段101の周辺画素領域102内の画素位置Ａ、Ｂ、Ｃ、
Ｄに対応する記憶装置に記憶されているそれ以前の画素
処理課程にのける集積誤差SA′・SC′・SD′を読み出
し、新な集積誤差SA〜SDを第（５）式により求める。The error updating means 112 synchronizes with the synchronization signal, and the error distribution values G A to G D from the error distribution value calculating means 110, the residual error J B from the residual error calculating means 113, and the error storing means 101. Pixel positions A, B, C in the peripheral pixel region 102 of
The integration errors S A ′, S C ′, S D ′ stored in the storage device corresponding to D in the previous pixel processing process are read out, and new integration errors S A ˜ S D are calculated (5). Calculate by formula.
さらに、誤差更新手段112は新な集積誤差SA〜SDを誤差
記憶手段101の画素位置Ａ〜Ｄに対応する記憶装置に書
込む更新処理をする。 Further, the error updating unit 112 performs an updating process of writing the new integrated errors S A to S D in the storage device corresponding to the pixel positions A to D of the error storage unit 101.
ただし、第（５）式では剰余誤差JBを周辺画素領域102
内の画素位置Ｂに加算したが、画素位置Ａ、Ｂ、Ｃ、Ｄ
の内いずれかの位置に加算してもよく、以後画素位置Ｂ
に加算するものとして説明する。However, in the equation (5), the residual error J B is calculated as the peripheral pixel area 102
Pixel position A, B, C, D
May be added to any position of
Will be described as an addition.
また、剰余誤差JBは内部レジスタの一時記憶し、次画素
処理時に読み出し、新たな周辺画素領域102内の画素位
置Ａ、Ｂ、Ｃ、Ｄのいずれかの位置に加算してもよい。Further, the residual error J B may be temporarily stored in the internal register, read at the time of the next pixel processing, and added to any one of the pixel positions A, B, C and D in the new peripheral pixel region 102.
これら誤差配分値演算手段110と配分係数発生手段111と
誤差更新手段112および剰余誤差演算手段113の具体的構
成を第２図（ａ）に例示する。同図において、剰余誤差
JBは内部レジスタに一時記憶し周辺画素位置Ｂに反映さ
せるものとして以下に説明する。A concrete configuration of the error distribution value calculating means 110, the distribution coefficient generating means 111, the error updating means 112, and the residual error calculating means 113 is illustrated in FIG. 2 (a). In the figure, the residual error
J B will be described below as being temporarily stored in an internal register and reflected in the peripheral pixel position B.
配分係数発生手段205は配分係数KA〜KDを予め格納する
ために記憶手段206を設け画素処理の開始に先だって収
納する。また、記憶手段206は配分係数KA〜KDを予め書
込んだROM（リード・オンリ・メモリ）を用いてもよ
い。The distribution coefficient generating means 205 is provided with a storage means 206 for storing the distribution coefficients K A to K D in advance, and stores them before starting the pixel processing. Further, the storage unit 206 may use a ROM (Read Only Memory) in which the distribution coefficients K A to K D are written in advance.
誤差配分値演算手段207は、前記２値化誤差Exyと前記配
分係数KA〜KDとから誤差配分値GA〜GDを乗算し求め、誤
差更新手段210と剰余誤差演算手段208に出力する。The error distribution value calculation means 207 obtains by multiplying the error distribution values G A to G D from the binarization error Exy and the distribution coefficients K A to K D, and outputs it to the error update means 210 and the residual error calculation means 208. To do.
剰余誤差演算手段208は、前記誤差配分値演算手段207か
らの誤差配分値GA〜GDの総和209と前記２値化誤差Exyと
の差分である剰余誤差JBを演算し、内部レジスタ203（R
J）に一時記憶する。内部レジスタ203（RJ）から読み出
された前画素処理時の剰余誤差JB′を誤差更新手段210
に出力する。The residual error calculating means 208 calculates the residual error J B which is the difference between the sum 209 of the error distribution values G A to G D from the error distribution value calculating means 207 and the binarization error Exy, and the internal register 203 (R
Temporarily store in J ). The residual error J B ′ at the time of the previous pixel processing read from the internal register 203 (R J ) is updated by the error updating means 210.
Output to.
誤差更新手段210は同期信号入力端子204から入力した画
素処理に同期した同期信号214に同期しながら、誤差配
分値GAと誤差記憶手段201より読込んだ画素位置Ａに対
応する集積誤差Ｓ′Ａを加算し次の画素処理における集
積誤差Sxyとして使用するため内部レジスタ211（RA）に
一時記憶する。画素位置Ｂに対する集積誤差は誤差配分
値GBと剰余誤差演算手段208からの前画素処理において
一時記憶しておいた剰余誤差JB′と加算し画素位置Ｂに
対応する集積誤差（SB）として内部レジスタ212（RB）
に一時記憶する。誤差配分値GCと前画素処理において一
時記憶している内部レジスタ212（RB）のデータを加算
し画素位置Ｃの集積誤差（SC）として内部レジスタ
（RC）に一時記憶する。誤差配分値GDと前画素処理にお
いて一時記憶している内部レジスタ213（RC）のデータ
と加算し画素位置Ｄの集積誤差SD）として誤差記憶手段
201の画素位置Ｄに対応する記憶装置に記憶させる。The error updating means 210 synchronizes with the synchronizing signal 214 which is synchronized with the pixel processing inputted from the synchronizing signal input terminal 204, and the integrated error S ′ corresponding to the error distribution value G A and the pixel position A read from the error storing means 201. A is added and temporarily stored in the internal register 211 (R A ) for use as the integration error Sxy in the next pixel processing. The integrated error for the pixel position B is added to the error distribution value G B and the residual error J B ′ temporarily stored in the previous pixel processing from the residual error calculation means 208, and the integrated error (S B ) corresponding to the pixel position B is added. As internal register 212 (R B )
Temporarily store in. The error distribution value G C and the data of the internal register 212 (R B ) temporarily stored in the previous pixel processing are added and temporarily stored in the internal register (R C ) as the integrated error (S C ) of the pixel position C. The error distribution means G D and the data of the internal register 213 (R C ) temporarily stored in the previous pixel processing are added to obtain an integrated error S D of the pixel position D as error storage means.
The data is stored in the storage device corresponding to the pixel position D of 201.
このような誤差更新手段210により、誤差記憶手段201内
の記憶装置へのアクセスは、画素位置Ａに対応する読込
みアクセスと画素位置Ｄに対応する書込みアクセスのみ
となり容易に実現可能な構成となる。With such an error updating means 210, the access to the storage device in the error storage means 201 is limited to the read access corresponding to the pixel position A and the write access corresponding to the pixel position D, which is easily realized.
また、２値化誤差Exyを注目画素の周辺の未処理画素に
配分する配分係数を とした場合の剰余誤差演算手段の具体的構成を示す。２
値化誤差Exyを15から８の場合を例にして、誤差配分値
演算手段110の整数演算によって切り捨てられた剰余誤
差JBを（４）式で求め表に示す。この表から、剰余誤差
JBは０〜最大３であることが判明し、第２図（ｂ）に示
すように２値化誤差Exyの下位３ビットデータExy′を入
力し、表に示すような２ビットの剰余誤差JBを出力する
テーブル216を構成する。In addition, the distribution coefficient for distributing the binarization error Exy to unprocessed pixels around the pixel of interest is A specific configuration of the residual error calculating means in the case of is shown. Two
Taking the case where the value error Exy is 15 to 8 as an example, the residual error J B rounded down by the integer operation of the error distribution value operation means 110 is obtained by the equation (4) and shown in the table. From this table, the residual error
It was found that J B is 0 to maximum 3, and the lower 3 bits data Exy ′ of the binarization error Exy is input as shown in FIG. 2 (b), and the 2-bit residual error as shown in the table. Configure a table 216 that outputs J B.
剰余誤差TBは内部レジスタ217（RJ）に一時記憶し、次
画素処理時に読み出し剰余誤差JB′を出力する。このよ
うに、配分係数を第（６）式のようにすることにより複
雑な演算が不用となり実用的な回路構成となる。 The residual error T B is temporarily stored in the internal register 217 (R J ) and the read residual error J B ′ is output during the next pixel processing. As described above, by setting the distribution coefficient as shown in the equation (6), complicated calculation becomes unnecessary and a practical circuit configuration is obtained.
発明の効果 以上のように本発明では、注目画素の周辺画素に対する
２値化誤差を配分する際、２値化誤差と配分された誤差
配分値の総和とから整数演算の切り捨て誤差である剰余
誤差を求め次画素処理時に補正することにより、誤差拡
散法を実用的な整数演算型の処理回路で構成したときに
問題となった入力レベルの低濃度および高濃度領域の階
調再現特性が大幅に改善され、実用的な画像信号処理装
置を提供することが可能となった。As described above, according to the present invention, when the binarization error is distributed to the peripheral pixels of the pixel of interest, the remainder error which is a truncation error of the integer operation is calculated from the binarization error and the sum of the distributed error distribution values. By correcting the error diffusion method with a practical integer arithmetic processing circuit, the gradation reproduction characteristics in the low density and high density areas of the input level, which is a problem when the error diffusion method is configured with a practical integer arithmetic processing circuit, are significantly improved. It is possible to provide an improved and practical image signal processing device.
第１図は本発明の一実施例における画像信号処理装置の
要部ブロック構成図、第２図は同装置における誤差配分
値演算手段と配分係数発生手段と誤差更新手段および剰
余誤差演算手段のブロック構成図、第３図は従来の誤差
拡散法を実施する画像信号処理装置の要部ブロック構成
図である。 101・201……誤差記憶手段、110……誤差配分値演算手
段、111……配分係数発生手段、112……誤差更新手段、
113……剰余誤差演算手段、206……記憶手段、203・211
〜213……内部レジスタ、216……テーブル。FIG. 1 is a block diagram of a main part of an image signal processing apparatus according to an embodiment of the present invention, and FIG. 2 is a block of error distribution value calculating means, distribution coefficient generating means, error updating means, and residual error calculating means in the same apparatus. FIG. 3 is a block diagram of a main part of an image signal processing apparatus that implements a conventional error diffusion method. 101.201 ... error storage means, 110 ... error distribution value calculation means, 111 ... distribution coefficient generation means, 112 ... error update means,
113 ... Residual error calculation means, 206 ... Storage means, 203 ・ 211
~ 213 …… Internal register, 216 …… Table.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 高橋 潔 神奈川県川崎市多摩区東三田３丁目10番１ 号 松下技研株式会社内 (72)発明者 土屋 博義 神奈川県川崎市多摩区東三田３丁目10番１ 号 松下技研株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kiyoshi Takahashi 3-10-1, Higashisanda, Tama-ku, Kawasaki, Kanagawa Matsushita Giken Co., Ltd. (72) Hiroyoshi Tsuchiya 3-chome, Higashisanda, Tama-ku, Kawasaki, Kanagawa No. 10 No. 1 Matsushita Giken Co., Ltd.
Claims (3)
レベルを２値化する際に、注目画素の２値化誤差をその
周辺の画素位置に対応させて記憶する誤差記憶手段と、
注目画素の入力レベルと前記誤差記憶手段内の注目画素
位置に対応した集積誤差を加算し補正レベルを出力する
入力補正手段と、前記入力補正手段からの補正レベルを
予め定められた閾値と比較し注目画素の２値化レベルを
決定する２値化手段と、前記入力補正手段からの補正レ
ベルと前記２値化手段からの２値化レベルの差分である
２値化誤差を求める差分演算手段と、前記差分演算手段
から２値化誤差を注目画素周辺の未処理画素に配分する
整数の配分係数を発生させる配分係数発生手段と、前記
差分演算手段からの２値化誤差と前記配分係数発生手段
からの配分係数とから注目画素周辺の未処理画素に対応
する誤差配分値を演算する誤差配分値演算手段と、前記
誤差配分値演算手段からの注目画素周辺の未処理画素に
対応する誤差配分値の総和を求め、前記差分演算手段か
らの２値化誤差との差である切り捨て誤差を演算し剰余
誤差として出力する剰余誤差演算手段と、前記誤差配分
値演算手段からの誤差配分値の１つと前記剰余誤差演算
手段からの剰余誤差を加算し、残りの誤差配分値ととも
に前記誤差記憶手段内の対応する画素位置の集積誤差と
を加算し再び記憶させる誤差更新手段とを具備する画像
信号処理装置。1. An error storage means for storing a binarization error of a pixel of interest in association with a pixel position in the vicinity thereof when binarizing a multi-tone density level sampled in pixel units.
An input correction means for adding the input level of the target pixel and the integrated error corresponding to the position of the target pixel in the error storage means to output a correction level, and the correction level from the input correction means are compared with a predetermined threshold value. Binarization means for determining the binarization level of the pixel of interest, and difference calculation means for obtaining a binarization error that is the difference between the correction level from the input correction means and the binarization level from the binarization means. Distribution coefficient generating means for generating an integer distribution coefficient for distributing the binarization error from the difference calculating means to the unprocessed pixels around the pixel of interest, and the binarization error from the difference calculating means and the distribution coefficient generating means Error distribution value calculating means for calculating an error distribution value corresponding to an unprocessed pixel around the pixel of interest from the distribution coefficient from, and an error distribution corresponding to an unprocessed pixel around the pixel of interest from the error distribution value calculating means. A residual error calculating means for calculating the sum of the above, calculating a truncation error which is a difference from the binarizing error from the difference calculating means and outputting it as a residual error, and one of the error distribution values from the error distribution value calculating means. An image signal processing apparatus comprising: an error updating means for adding the residual error from the residual error calculating means, adding the remaining error distribution value, and the integrated error of the corresponding pixel position in the error storing means, and storing again. .
からの注目画素周辺の未処理画素に対応する誤差配分値
の総和を求め、差分演算手段からの２値化誤差との差分
である切り捨て誤差を演算し剰余誤差として一時記憶す
ると共に次画素処理時に読み出し出力する事を特徴とす
る特許請求の範囲第１項記載の画像信号処理装置。2. The residual error calculating means obtains the sum of error distribution values corresponding to unprocessed pixels around the pixel of interest from the error distribution value calculating means, which is the difference from the binarization error from the difference calculating means. The image signal processing apparatus according to claim 1, wherein the truncation error is calculated and temporarily stored as a remainder error, and is read out and output during the next pixel processing.
8、1/8、1/8の組み合わせで発生させ、剰余誤差演算手
段は２値化誤差の下位３ビットの信号レベルのビットの
和から求めることを特徴とする特許請求の範囲第１項及
び第２項記載の画像信号処理装置。3. The distribution coefficient generating means sets the distribution coefficient to 4/8, 2 /
Claims 1 and 2, wherein the remainder error calculation means is generated by a combination of 8, 1/8, and 1/8, and is calculated from the sum of the signal levels of the lower 3 bits of the binarization error. The image signal processing device according to item 2.
Priority Applications (10)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61304248A JPH0722334B2 (en) | 1986-12-19 | 1986-12-19 | Image signal processor |
| EP92110355A EP0512578B1 (en) | 1986-12-19 | 1987-12-18 | Bi-level image display signal processing apparatus |
| DE3751916T DE3751916D1 (en) | 1986-12-19 | 1987-12-18 | Device for processing signals for displaying images with two levels |
| EP92110032A EP0507354B1 (en) | 1986-12-19 | 1987-12-18 | Bi-level image display signal processing apparatus |
| EP87311205A EP0272147B2 (en) | 1986-12-19 | 1987-12-18 | Bi-level image display signal processing apparatus |
| DE3785558T DE3785558T3 (en) | 1986-12-19 | 1987-12-18 | Device for processing signals for displaying images with two levels. |
| EP92110386A EP0507356B1 (en) | 1986-12-19 | 1987-12-18 | Bi-level image display signal processing apparatus |
| DE3751957T DE3751957T2 (en) | 1986-12-19 | 1987-12-18 | Device for processing signals for displaying images with two levels |
| DE3752022T DE3752022T2 (en) | 1986-12-19 | 1987-12-18 | Device for processing signals for displaying images with two levels |
| US07/136,486 US4891710A (en) | 1986-12-19 | 1987-12-21 | Bi-level image display signal processing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61304248A JPH0722334B2 (en) | 1986-12-19 | 1986-12-19 | Image signal processor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63155953A JPS63155953A (en) | 1988-06-29 |
| JPH0722334B2 true JPH0722334B2 (en) | 1995-03-08 |
Family
ID=17930771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61304248A Expired - Lifetime JPH0722334B2 (en) | 1986-12-19 | 1986-12-19 | Image signal processor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0722334B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2839095B2 (en) * | 1988-08-24 | 1998-12-16 | キヤノン株式会社 | Image processing device |
-
1986
- 1986-12-19 JP JP61304248A patent/JPH0722334B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63155953A (en) | 1988-06-29 |
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